Patents by Inventor Kuo Wang

Kuo Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7562326
    Abstract: A method of generating a standard cell layout includes analyzing a circuit of a standard cell layout and obtaining an analysis result, selecting a plurality of leaf cell layout according to the analysis result, and piecing together the leaf cell layouts to generate the standard cell layout.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: July 14, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Wei-Jen Wang, Chen-Hsien Hsu, Chien-Kuo Wang, Dar-Sun Tsien
  • Publication number: 20090133046
    Abstract: The present invention discloses a disc guiding apparatus including a logic apparatus and a first and a second disc guiding elements. The logic apparatus has a rod, a first and a second guiding elements, and a first and a second moving parts. The first and the second disc guiding elements are connected to the first moving part and the second moving part, respectively. The first and the second moving parts move along the extended direction of the rod by the first and the second guiding elements. The rod has a central portion and two ends, wherein the width of the central portion is narrower than each of the two ends. The first and the second moving parts are disposed at the different ends of the rod.
    Type: Application
    Filed: November 20, 2007
    Publication date: May 21, 2009
    Applicant: LITE-ON IT CORPORATION
    Inventor: Tai-Kuo Wang
  • Publication number: 20090044163
    Abstract: A method of generating a standard cell layout includes analyzing a circuit of a standard cell layout and obtaining an analysis result, selecting a plurality of leaf cell layout according to the analysis result, and piecing together the leaf cell layouts to generate the standard cell layout.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 12, 2009
    Inventors: Wei-Jen Wang, Chen-Hsien Hsu, Chien-Kuo Wang, Dar-Sun Tsien
  • Publication number: 20090044213
    Abstract: A disk drive includes a chassis having a spindle motor for rotating a disk and a read/write head for reading or writing data on the disk, a slide block disposed at one side of the chassis and slidable reciprocally along an entrance-and-exit route defined by the disk, and a support member mounted on the slide member so as to be movable together therewith. The support member supports the disk from below during inserting the disk into the disk drive.
    Type: Application
    Filed: July 1, 2008
    Publication date: February 12, 2009
    Applicant: LITE-ON IT CORPORATION
    Inventors: Tai-Kuo Wang, Fu-Jen Yang, Chieh-Li Chen
  • Publication number: 20090021266
    Abstract: A defect detection system and related method take advantage of multilevel detection technique for detecting defects on an integrated circuit. The defect detection system utilizes an analog-to-digital converter for converting an analog sensing signal into an output code having a plurality of bits. The defect detection methods include an open test method and a short test method. The open and short test methods both include a calibrating method and a testing method individually. The calibrating method functions to determine a preset reference voltage for the analog-to-digital converter based on a predetermined code. The testing method makes use of the preset reference voltage and the predetermined code for generating the output code having a plurality of bits. The output code is then utilized to determine whether or not there are open or short defects on the integrated circuit and to classify the defects.
    Type: Application
    Filed: July 16, 2007
    Publication date: January 22, 2009
    Inventors: Chien-Kuo Wang, Tai-Chi Kao, Tsuoe-Hsiang Liao, Yuan-Che Lee, Yu-Ming Sun
  • Patent number: 7473007
    Abstract: An adjustable lamp includes a lamp and a scattering shade which is slidable on the lamp. The scattering shade has a front end coupled with a reflective blade which is bent at a selected angle to reflect light. By sliding the scattering shade on a light penetrative shade, the position of the reflective blade can be changed to alter the reflective direction of the light.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: January 6, 2009
    Inventor: Cheng-Kuo Wang
  • Publication number: 20080316661
    Abstract: A chip includes a core circuit, a main electrostatic discharge immunizing circuit, and a secondary electrostatic discharge immunizing circuit. The secondary electrostatic discharge immunizing circuit is disposed beneath a core power ring formed between the core circuit and the main electrostatic discharge immunizing circuit for reaching the aim of protecting the core circuit from damage by electrostatic discharges without area penalty of the chip. Both the main electrostatic discharge immunizing circuit and the secondary electrostatic discharge immunizing circuit include a power clamp and a plurality of current limiters, and keep electrostatic currents from reaching the core circuit with the aid of the power clamp.
    Type: Application
    Filed: June 20, 2007
    Publication date: December 25, 2008
    Inventors: Kuey-Lung Hsueh, Chien-Kuo Wang, Yu-Ming Sun, Te-Chang Wu
  • Publication number: 20080310059
    Abstract: The invention discloses a method for electrostatic discharge (ESD) protection design. The method includes: placing a first input/output cell (I/O cell) and a second input/output cell at a side of a chip, wherein a routing area exists at the side of the chip and is positioned between the first input/output cell and the second input/output cell; providing an electrostatic discharge protection circuit unit; and placing the electrostatic discharge protection circuit unit in the routing area.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 18, 2008
    Inventors: Te-Chang Wu, Yu-Ming Sun, Chien-Kuo Wang
  • Publication number: 20080295057
    Abstract: IC design flow includes RTL design, synthesis, APR, and layout. An IC designer can choose a suitable standard cell for an integrated circuit according to the timing, area, and BCI (best cell index) of each standard cell. Further, the BCI of a standard cell can be generated by generating critical dimensions of a standard cell in a plurality of surroundings, generating a plurality of circuit parameters corresponding to the plurality of surroundings, calculating the differences of the plurality of circuit parameters and the ideal circuit parameter of the standard cell, and analyzing the distribution of the differences.
    Type: Application
    Filed: May 22, 2007
    Publication date: November 27, 2008
    Inventors: Dar-Sun Tsien, Chien-Kuo Wang, Chen-Hsien Hsu, Wei-Jen Wang
  • Publication number: 20080266220
    Abstract: A scan driver for a liquid crystal display (LCD) includes first and second address logic units, first and second level shifters and a decoder. The first address logic unit enables an ith first address signal among N first address signals during a Kth clock period according to a control signal, wherein the number i is equal to a remainder of K/N. The second address logic unit enables a jth second address signal among M second address signals during the Kth clock period according to the control signal, wherein the number j is equal to a quotient of K/N plus 1. The first and second level shifters respectively increase swings of the first and second address signals. When the ith first address signal and the jth second address signal are enabled, the decoder enables a (j?1)×N+i)th scan signal among M×N scan signals.
    Type: Application
    Filed: April 2, 2008
    Publication date: October 30, 2008
    Applicant: Raydium Semiconductor Corporation
    Inventors: Chien-Kuo Wang, Hsin-Yeh Wu, Shao-Ping Hung, Chin-Chieh Chao
  • Patent number: 7344954
    Abstract: A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: March 18, 2008
    Assignee: United Microelectonics Corp.
    Inventors: Ta-Chuan Yeh, Ni-Min Chung, Kao-Su Huang, Yung-Chang Lin, Ruey-Chyr Lee, Chien-Kuo Wang
  • Publication number: 20080038931
    Abstract: A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.
    Type: Application
    Filed: October 12, 2007
    Publication date: February 14, 2008
    Inventors: Ta-Chuan Yeh, Ni-Min Chung, Kao-Su Huang, Yung-Chang Lin, Ruey-Chyr Lee, Chien-Kuo Wang
  • Publication number: 20080020539
    Abstract: A dynamic random access memory including a substrate, an isolation structure, two transistors, two trench capacitors and two passing gates is provided. The isolation structure, including a first isolation structure and a second isolation structure, is disposed in the substrate. The second isolation structure is disposed in the substrate above the first isolation structure and the bottom surface of the second isolation structure is lower than the top surface of the substrate. The periphery of the second isolation structure is beyond that of the first isolation structure. The transistors are disposed on the substrate respectively at two sides of the isolation structure. The trench capacitors are respectively disposed between the transistors and the isolation structures. A portion of the second isolation structure is disposed in the trench capacitor. The passing gates are completely disposed on the second isolation structure.
    Type: Application
    Filed: October 1, 2007
    Publication date: January 24, 2008
    Inventors: CHIEN-KUO WANG, JUN-CHI HUANG, RUEY-CHYR LEE, YUNG-CHANG LIN
  • Publication number: 20070269946
    Abstract: A dynamic random access memory including a substrate, an isolation structure, two transistors, two trench capacitors and two passing gates is provided. The isolation structure, including a first isolation structure and a second isolation structure, is disposed in the substrate. The second isolation structure is disposed in the substrate above the first isolation structure and the bottom surface of the second isolation structure is lower than the top surface of the substrate. The periphery of the second isolation structure is beyond that of the first isolation structure. The transistors are disposed on the substrate respectively at two sides of the isolation structure. The trench capacitors are respectively disposed between the transistors and the isolation structures. A portion of the second isolation structure is disposed in the trench capacitor. The passing gates are completely disposed on the second isolation structure.
    Type: Application
    Filed: May 19, 2006
    Publication date: November 22, 2007
    Inventors: Chien-Kuo Wang, Jun-Chi Huang, Ruey-Chyr Lee, Yung-Chang Lin
  • Publication number: 20070155089
    Abstract: A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.
    Type: Application
    Filed: January 3, 2006
    Publication date: July 5, 2007
    Inventors: Ta-Chuan Yeh, Ni-Min Chung, Kao-Su Huang, Yung-Chang Lin, Ruey-Chyr Lee, Chien-Kuo Wang
  • Publication number: 20070070040
    Abstract: A product of computer peripheral designed based on ergonomics and fabricating method thereof is to integrate all components of the computer system based on ergonomic analysis and the system housing design of the computer. The integration of the components can be done with screening the portable storage media device and the keyboard in the components required and feasible for integration based on affirmed criterion before integrating as an integral ergonomic component is performed such that the computer system and the product of computer peripheral are operated by the user easily and it is favorable for development of enhancing function of the system housing.
    Type: Application
    Filed: January 13, 2006
    Publication date: March 29, 2007
    Inventors: Chun-Hung Chen, Ming-Chao Lee, Ming-Feng Hsieh, I-Hsuan Chu, Tai - Kuo Wang
  • Publication number: 20070044601
    Abstract: An adjustable device for pliers includes an operation member movably extending through a through hole in the first part and a slot in the second part. The operation member includes an exterior smooth section and a toothed section which can be disengageably engaged with teeth defined in the slot to set the width between the two jaws. A spring is biased to the operation member and stopped by an end member which is connected to a positioning member mounted to the operation member. The operation member is pushed to disengage the toothed section from the teeth of the slot so that the two parts can be pivoted to adjust the two jaws to a desired width and the operation member is released which is pushed back by the spring to engage the toothed section of the operation member with the teeth of the slot.
    Type: Application
    Filed: August 23, 2005
    Publication date: March 1, 2007
    Inventor: Chien-Kuo Wang
  • Patent number: 7182004
    Abstract: An adjustable device for pliers includes an operation member movably extending through a through hole in the first part and a slot in the second part. The operation member includes an exterior smooth section and a toothed section which can be disengageably engaged with teeth defined in the slot to set the width between the two jaws. A spring is biased to the operation member and stopped by an end member which is connected to a positioning member mounted to the operation member. The operation member is pushed to disengage the toothed section from the teeth of the slot so that the two parts can be pivoted to adjust the two jaws to a desired width and the operation member is released which is pushed back by the spring to engage the toothed section of the operation member with the teeth of the slot.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: February 27, 2007
    Inventor: Chien-Kuo Wang
  • Patent number: 7141962
    Abstract: An EMI (Electrical Magnetic Interference) test system is provided. The system includes a testing table, a horizontal antenna, a vertical antenna and a processing unit. The testing table is used for supporting an Equipment Under Test (EUT). The horizontal antenna is positioned at a first location in an EMI chamber. The vertical antenna is positioned at a second location in the EMI chamber. The vertical antenna and the horizontal antenna are used for receiving the electromagnetic wave radiated from the EUT, and producing a vertical electric wave and a horizontal electric wave respectively. The processing unit is coupled to the vertical antenna and the horizontal antenna for transforming and analyzing the vertical electric wave and the horizontal electric wave.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: November 28, 2006
    Assignee: Avision Inc.
    Inventors: Chin-Yuan Lin, Ming-Fang Wu, Pei-Chih Liu, Yu-Kuo Wang, Yi-Kai Lin, Sheng-Lee Lin
  • Patent number: D529716
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: October 10, 2006
    Inventor: Chien-Kuo Wang