Abstract: A method for forming an isolation structure includes following operations. A trench is formed in a semiconductor substrate. A first insulating layer covering a bottom and sidewalls of the trench is formed. A charge-trapping layer is formed on the first insulating layer. The trench is filled with a second insulating layer. The charge-trapping layer include a material different from those of the first insulating layer and the second insulating layer.

Abstract: The present disclosure provides an optical structure and a method for fabricating an optical structure, the method includes forming a light detection region in a substrate, forming an isolation structure at surrounding the light detection region, and forming a primary grid over the isolation structure, including forming a metal layer over the isolation structure, forming a first dielectric layer over the metal layer, and partially removing the metal layer and the first dielectric layer with a first mask by patterning, and forming a secondary grid at least partially surrounded by the primary grid laterally.

Abstract: A semiconductor structure includes a semiconductor substrate, an image sensor, and an isolation structure. The isolation structure is adjacent to the image sensor and disposed in the semiconductor substrate. The isolation structure includes a first oxide layer, a second oxide layer over the first oxide layer, and a charge-trapping layer disposed between the first oxide layer and the second oxide layer. The charge-trapping layer includes a material different from those of the first oxide layer and the second oxide layer.

Abstract: A plurality of photovoltaic junctions for a subpixel may be formed in a semiconductor substrate. After thinning the backside of the semiconductor substate, at least one transparent refraction structure may be formed on the backside surface of the thinned semiconductor substrate. Each transparent refraction structure has a variable thickness that decreases with a lateral distance from a vertical axis passing through a geometrical center of the second-conductivity-type pillar structures for the subpixel. A subpixel optics assembly including an optical lens may be formed over the at least one transparent refraction structure. Each transparent refraction structure may reduce the tilt angle of light that propagate downward into the photodetectors, and increases total internal reflection of light and increase the efficiency of the photodetectors.

Abstract: A plurality of photovoltaic junctions for a subpixel may be formed in a semiconductor substrate. After thinning the backside of the semiconductor substrate, at least one transparent refraction structure may be formed on the backside surface of the thinned semiconductor substrate. Each transparent refraction structure has a variable thickness that decreases with a lateral distance from a vertical axis passing through a geometrical center of the second-conductivity-type pillar structures for the subpixel. A subpixel optics assembly including an optical lens may be formed over the at least one transparent refraction structure. Each transparent refraction structure may reduce the tilt angle of light that propagate downward into the photodetectors, and increases total internal reflection of light and increase the efficiency of the photodetectors.

Abstract: A semiconductor device, a back-side deep trench isolation (BDTI) structure of a semiconductor device, and method of manufacturing a semiconductor structure are provided. The semiconductor device, comprising: a pixel region disposed within a substrate and comprising an image sensing element configured to convert electromagnetic radiation into an electrical signal; and one or more BDTI structures extending from a first-side of the substrate to positions within the substrate; wherein the one or more of BDTI structures comprise one or more ferroelectric materials.

Abstract: A semiconductor structure includes a semiconductor substrate, an image sensor, and an isolation structure. The isolation structure is adjacent to the image sensor and disposed in the semiconductor substrate. The isolation structure includes a first oxide layer, a second oxide layer over the first oxide layer, and a charge-trapping layer disposed between the first oxide layer and the second oxide layer. The charge-trapping layer includes a material different from those of the first oxide layer and the second oxide layer.

Abstract: The present disclosure provides an optical structure and a method for fabricating an optical structure, the method includes forming a light detection region in a substrate, forming an isolation structure at surrounding the light detection region, and forming a primary grid over the isolation structure, including forming a metal layer over the isolation structure, forming a first dielectric layer over the metal layer, and partially removing the metal layer and the first dielectric layer with a first mask by patterning, and forming a secondary grid at least partially surrounded by the primary grid laterally.

Abstract: The present disclosure provides an optical structure, including a substrate, a light detection region in the substrate, an isolation structure in the substrate, surrounding the light detection region, a color filter layer over the substrate, and a dielectric grid structure in the color filter layer, the dielectric grid structure overlapping with the light detection region.

Abstract: A plurality of photovoltaic junctions for a subpixel may be formed in a semiconductor substrate. After thinning the backside of the semiconductor substrate, at least one transparent refraction structure may be formed on the backside surface of the thinned semiconductor substrate. Each transparent refraction structure has a variable thickness that decreases with a lateral distance from a vertical axis passing through a geometrical center of the second-conductivity-type pillar structures for the subpixel. A subpixel optics assembly including an optical lens may be formed over the at least one transparent refraction structure. Each transparent refraction structure may reduce the tilt angle of light that propagate downward into the photodetectors, and increases total internal reflection of light and increase the efficiency of the photodetectors.

Abstract: The present disclosure provides an optical structure, including a substrate, a light detection region in the substrate, an isolation structure in the substrate, surrounding the light detection region, a color filter layer over the substrate, and a dielectric grid structure in the color filter layer, the dielectric grid structure overlapping with the light detection region.

Abstract: An operating system including a voltage converter, a processing circuit, and a protector is provided. The voltage converter converts an input voltage according to a feedback voltage to generate an output voltage. The processing circuit is coupled to the voltage converter and processes the output voltage according to a control signal to generate the feedback voltage. The protector is coupled to the voltage converter and the processing circuit and activates or deactivates the voltage converter according to the feedback voltage.

Abstract: A hub device and corresponding method include a first chip having at least a first upstream port and a plurality of first downstream ports, a second chip, having at least a second upstream port and at least one second downstream port; and an external memory device, storing firmware data corresponding to the first chip and the second chip. One one of the first downstream ports of the first chip is coupled to the second upstream port of the second chip to form a tiered hub, and the first chip and the second chip are sequentially enabled and the first chip and the second chip sequentially load the corresponding firmware data.

Abstract: An operating system including a voltage converter, a processing circuit, and a protector is provided. The voltage converter converts an input voltage according to a feedback voltage to generate an output voltage. The processing circuit is coupled to the voltage converter and processes the output voltage according to a control signal to generate the feedback voltage. The protector is coupled to the voltage converter and the processing circuit and activates or deactivates the voltage converter according to the feedback voltage.

Abstract: A hub device and corresponding method include a first chip having at least a first upstream port and a plurality of first downstream ports, a second chip, having at least a second upstream port and at least one second downstream port; and an external memory device, storing firmware data corresponding to the first chip and the second chip. One one of the first downstream ports of the first chip is coupled to the second upstream port of the second chip to form a tiered hub, and the first chip and the second chip are sequentially enabled and the first chip and the second chip sequentially load the corresponding firmware data.

Abstract: A method of calibrating or monitoring an exposing tool including forming a substrate pattern in a substrate, wherein forming the substrate pattern includes providing a first patterned photo resist layer having an etch coating layer disposed thereon and using the first patterned photo resist layer and the etch coating layer to pattern an underlying layer. The patterned underlying layer is then used as a masking element when etching the substrate pattern into the substrate. A second photo resist pattern is formed over the substrate pattern. An overlay measurement is executed of the second photo resist pattern to the substrate pattern.

Abstract: An adaptive universal serial bus (USB) charging method and system are disclosed. In a low-power state, a USB device is charged with a non-USB charging mode. The non-USB charging mode is retained when no variation of a data signal coupled to the USB device is detected. When the data signal possesses variation for a first period, it is switched to a third proprietary charging mode.

Abstract: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.

Abstract: A method of calibrating or monitoring an exposing tool including forming a substrate pattern in a substrate, wherein forming the substrate pattern includes providing a first patterned photo resist layer having an etch coating layer disposed thereon and using the first patterned photo resist layer and the etch coating layer to pattern an underlying layer. The patterned underlying layer is then used as a masking element when etching the substrate pattern into the substrate. A second photo resist pattern is formed over the substrate pattern. An overlay measurement is executed of the second photo resist pattern to the substrate pattern.

Abstract: An embodiment of a method of forming a substrate pattern including forming a bottom layer and an overlying middle layer on the substrate. A photo resist pattern is formed on the middle layer. An etch coating layer is deposited on the photo resist pattern. The etch coating layer and the photo resist pattern are used as a masking element to pattern at least one of the middle layer and the bottom layer. The substrate is etched to form the substrate pattern using the at least one of the patterned middle layer and the patterned bottom layer as a masking element. The substrate pattern may be used as an element of an overlay measurement process.