Abstract: A method is provided for fabricating an integrated micro fuel cell that derives power from a three-dimensional fuel/oxidant interchange having increased surface area and that is positioned on a second substrate that may be either porous or flexible with gas access holes, thereby avoiding precise alignment requirements of the openings providing fuel thereto. The method comprises forming on a first substrate, a plurality of pedestals including an anode and a cathode each comprising a porous metal; positioning an electrolyte between the anode and the cathode; and forming first metal contacts on the anode and cathode. The first substrate is removed and a second substrate is positioned against the fuel cell wherein the first metal contacts are selectively positioned to make electrical contact with second metal contacts on the second substrate.

Abstract: A monolithically integrated lithium thin film battery (10) provides increased areal capacity on a single level (without stacking of multiple cells). The Lithium thin film battery (10) comprises a substrate (12) having a surface (13) textured to comprise a plurality of openings (16) having sides (15) angled between 10 and 80 degrees to the surface (13). A current collector (18) and a cathode (22) are formed on the substrate (12) and within the openings (16). An electrolyte (24) comprising lithium phosphorous oxynitride is formed by physical vapor deposition on the cathode (22), thereby providing a layer on the surface of the cathode (22) and within the openings (16) of the cathode having substantially the same thickness. An anode (26) and a capping layer (28) are then formed on the electrolyte (24).

Abstract: A method of making a plurality of photovoltaic cells (400, 800, 1112) for charging a battery (1230) of an electronic device (1010) includes forming by a self-assembly process a plurality of interdigitated photovoltaic cells (400, 800, 1112) between two terminal electrodes (102, 202, 132, 232) coupled to the battery (1230). One electrode is a transport conductive material (102, 202) including a conductive material (106, 206) having sidewalls (110, 210) defining a plurality of pores (112). A conductive electrode material (126, 226) is formed over an electrolyte (124, 224) which is formed over a sensitizing material (122, 222) which is formed over an active transport material (114, 214) on the sidewalls (110, 210).

Abstract: A method is provided for fabricating an integrated micro fuel cell (50) that derives power from a three-dimensional fuel/oxidant interchange having increased surface area and that is positioned on a second substrate (60) that may be either porous or flexible with gas access holes, thereby avoiding precise alignment requirements of the openings providing fuel thereto. The method comprises forming a fuel cell (51) on a second substrate (12), wherein forming the fuel cell (51) comprises forming, on the substrate (12), a plurality of pedestals (48) including an anode (47) and a cathode (49) each comprising a porous metal (34); positioning an electrolyte (46) between the anode (47) and the cathode (49); and forming first metal contacts (52, 54) on the anode (47) and cathode (49). The fuel cell (51) is then removed from the rigid substrate (12).

Abstract: A sensitized photovoltaic device (10) provides for a reduction of the charge recombination rate and charge transport time. The device (10) includes a first electrode (12) comprising a transparent conducting oxide and a plurality of carbon nanostructures (16) formed thereon. A first layer (18) is formed on the carbon nanostructure (16) and comprises a first conduction band level (44). A second layer (20) is formed on the first oxide (18) and comprises a second conduction band level (46) higher than the first conduction band level (44). A sensitizer (22) is formed on the second layer (20) and comprises a lowest unoccupied molecular orbital level (48) higher than the second conduction band level (46). An electrolyte (24) is positioned over the sensitizer (22), and a second electrode (26) comprising a transparent conducting oxide and a layer of catalyst is formed over the electrolyte (24).

Abstract: A monolithically integrated lithium thin film battery (10) provides increased areal capacity on a single level (without stacking of multiple cells). The Lithium thin film battery (10) comprises a substrate (12) having a surface (13) textured to comprise a plurality of openings (16) having sides (15) angled between 10 and 80 degrees to the surface (13). A current collector (18) and a cathode (22) are formed on the substrate (12) and within the openings (16). An electrolyte (24) comprising lithium phorphous oxynitride is formed by physical vapor deposition on the cathode (22), thereby providing a layer on the surface of the cathode (22) and within the openings (16) of the cathode having substantially the same thickness. An anode (26) and a capping layer (28) are then formed on the electrolyte (24).

Abstract: The present invention provides a method of fabricating a silicon fin useful in preparing FinFET type semiconductor structures. The method is particularly useful for creating fins with a width and smoothness appropriate for sub-50 nm type gates. The method begins with a silicon fin prepared by lithographic means from an SOI type structure such that the fin is larger in dimension, particularly width, than is desired in the final fin. If desired the silicon fin can include a nitride cap. A conformal diffusion layer, such as of silicon dioxide, is then deposited onto the fin and silicon dioxide substrate. A PECVD deposition using TEOS gas is one method to deposit the diffusion layer. The coated fin is then heated and exposed to oxygen. The oxygen diffuses through the diffusion layer and converts a portion of the silicon material to silicon dioxide. This oxidation continues until a desired amount of silicon material is converted to SiO2 such that the remaining silicon has the desired dimensions.

Abstract: A semiconductor device includes a continuous doped substrate with a surface, a sulfur-based dielectric material layer positioned on the surface of the continuous doped substrate, a dielectric material layer positioned on the sulfur-based dielectric material layer, and a gate contact region positioned on the sulfur-based dielectric material layer. The continuous doped substrate includes silicon (Si) and the sulfur-based dielectric material includes a transition metal sulfide such as strontium zirconium sulfur (SrZrS), barium zirconium sulfur (BaZrS), strontium hafnium sulfur (SrHfS), barium hafnium sulfur (BaHfS), or the like. Further, the gate contact region includes a layer of one of strontium titanium sulfur (SrTiS), barium titanium sulfur (BaTiS), or the like positioned adjacent to the dielectric material layer.

Abstract: High quality epitaxial layers of monocrystalline piezoelectric materials and compound semiconductor materials can be grown overlying monocrystalline substrates (22) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer (24) comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer (28) of silicon oxide. An integrated circuit including at least one surface acoustic wave device can be formed in and over the high quality epitaxial layers.

Abstract: A semiconductor device includes a continuous doped substrate with a surface, a sulfur-based dielectric material layer positioned on the surface of the continuous doped substrate, a dielectric material layer positioned on the sulfur-based dielectric material layer, and a gate contact region positioned on the sulfur-based dielectric material layer. The continuous doped substrate includes silicon (Si) and the sulfur-based dielectric material includes a transition metal sulfide such as strontium zirconium sulfur (SrZrS), barium zirconium sulfur (BaZrS), strontium hafnium sulfur (SrHfS), barium hafnium sulfur (BaHfS), or the like. Further, the gate contact region includes a layer of one of strontium titanium sulfur (SrTiS), barium titanium sulfur (BaTiS), or the like positioned adjacent to the dielectric material layer.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. A monocrystalline layer is then formed over the accommodating buffer layer, such that a lattice constant of the monocrystalline layer substantially matches the lattice constant of a subsequently grown monocrystalline film.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline material spaced apart from the silicon wafer (102) by an amorphous interface layer (108) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Utilizing this technique permits the fabrication of thin film pyroelectric devices (150) on a monocrystalline silicon substrate.

Abstract: High-density metal-insulator transition field effect transistors are grown on an advanced substrate using buried channel or surface channel designs. With respect to the advanced substrate, high quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: Multijunction solar cell structures (100) including high quality epitaxial layers of monocrystalline semiconductor materials that are grown overlying monocrystalline substrates (102) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers are disclosed. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (104) on a silicon wafer. The accommodating buffer (104) layer is a layer of monocrystalline material spaced apart from the silicon wafer by an amorphous interface layer (112) of silicon oxide. The amorphous interface layer (112) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Multiple and varied accommodating buffer layers can be used to achieve the monolithic integration of multiple non-lattice matched solar cell junctions.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. A monocrystalline layer is then formed over the accommodating buffer layer, such that a lattice constant of the monocrystalline layer substantially matches the lattice constant of a subsequently grown monocrystalline film.

Abstract: The present invention provides a monolithic piezoelectrically-tunable optoelectronic device structure which includes an epitaxial piezoelectric material that is monolithically integrated with an optical device, such as a laser structure or a photodetector structure for example. In alternate embodiments, the epitaxial piezoelectric material may be monolithically integrated either above or below the active layer of the optical device or may be positioned adjacent to the optical device. A vertical cavity surface emitting laser diode which monolithically integrates a piezoelectric thin-film exhibits high tunability and improved performance.

Abstract: A semiconductor structure with selective doping includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, at least one monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, and a transistor in the at least one monocrystalline compound semiconductor material and including active regions having different conductivity levels under substantially identical bias conditions.

Abstract: Light emitting devices (262) and optically-active material (264) can be formed overlying monocrystalline substrates such as large silicon wafers (266) using a compliant substrate for growing the devices (262). One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer (266). The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer.

Abstract: A high contrast reflective mirror includes a plurality of alternating first monocrystalline layers and second monocrystalline layers. The first monocrystalline layers are formed of an oxide material that has a cubic structure and a first index of refraction. The second monocrystalline layers are formed of a semiconductor material that has a second index of refraction. The first index of refraction and the second index of refraction differ by at least about 0.