Patents by Inventor Kurt W. Eisenbeiser

Kurt W. Eisenbeiser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020136931
    Abstract: High quality epitaxial layers of monocrystalline piezoelectric materials (106) and acousto-optic materials (108) can be grown overlying monocrystalline substrates (102) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide (110). The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Acousto-Optic devices (1018) may be formed using the piezoelectric materials (106) and the acousto-optic materials (108) and integrated with devices formed within the substrate (102) or other devices (1016, 1018) formed using other epitaxially grown monocrystalline layers.
    Type: Application
    Filed: March 20, 2001
    Publication date: September 26, 2002
    Applicant: Motorola, Inc.
    Inventors: Kurt W. Eisenbeiser, Jeffrey M. Finder
  • Publication number: 20020072245
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline material spaced apart from the silicon wafer (102) by an amorphous interface layer (108) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Utilizing this technique permits the fabrication of thin film pyroelectric devices (150) on a monocrystalline silicon substrate.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 13, 2002
    Applicant: Motorola, Inc.
    Inventors: William J. Ooms, Jeffrey M. Finder, Kurt W. Eisenbeiser, Jerald A. Hallmark
  • Publication number: 20020030246
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates (22) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer (24) comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer (28) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer (24). The accommodating buffer layer (24) is substantially lattice matched to both the underlying silicon wafer (22) and the overlying monocrystalline material layer (26). Any lattice mismatch between the accommodating buffer layer (24) and the underlying silicon substrate (22) is taken care of by the amorphous interface layer (28).
    Type: Application
    Filed: July 25, 2001
    Publication date: March 14, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Kurt W. Eisenbeiser, Jamal Ramdani
  • Publication number: 20020000584
    Abstract: High quality epitaxial layers of conductive monocrystalline materials can be grown overlying monocrystalline substrates (22) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer(24) on a silicon wafer (22). The accommodating buffer layer (24) is a layer of monocrystalline material spaced apart from the silicon wafer (22) by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer (28) dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer (24).
    Type: Application
    Filed: January 5, 2001
    Publication date: January 3, 2002
    Applicant: Motorola, Inc.
    Inventors: Kurt W. Eisenbeiser, Ravindranath Droopad, Zhiyi Yu
  • Patent number: 6057566
    Abstract: A semiconductor device includes a buffer layer (23) having a doped region (24), a barrier layer (26) over the buffer layer (23) and having a doped region (27), and a channel layer (25) located between the buffer layer (23) and the barrier layer (26) where the doping density of the doped region (27) in the barrier layer (26) is higher than the doping densities of the channel layer (25) and the doped region (24) in the first buffer layer (23).
    Type: Grant
    Filed: April 29, 1998
    Date of Patent: May 2, 2000
    Assignee: Motorola, Inc.
    Inventors: Kurt W. Eisenbeiser, Yang Wang, Jenn-Hwa Huang, Vijay K. Nair