Abstract: A display substrate includes a signal line, a test switch, a test pad, and a first electrostatic dispersion line. The signal line is formed in the display area of a base substrate. The test switch is formed in a peripheral area of the base substrate surrounding the display area. The test switch applies a test signal to the signal line. The test pad is electrically connected to the test switch and receives the test signal The first electrostatic dispersion line is extended from the test pad to an end of the base substrate.

Abstract: The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

Abstract: A thin film transistor for a display device includes a substrate, a gate electrode formed on the substrate, a gate insulating layer formed on the gate electrode, a polycrystalline semiconductor formed on the gate insulating layer and overlapping the gate electrode, a source electrode partially overlapping the polycrystalline semiconductor, and a drain electrode partially overlapping the polycrystalline semiconductor. The polycrystalline semiconductor includes a plurality of first polycrystalline semiconductors that are doped with conductive impurities and a plurality of second polycrystalline semiconductors that are not doped with conductive impurities, and the first polycrystalline semiconductors are disposed between and connected in series with adjacent ones of the second polycrystalline semiconductors.

Abstract: A liquid crystal display includes first and second substrates. The first substrate has a first insulating substrate, and a pixel electrode formed on the first insulating substrate with a first opening pattern. The second substrate has a second insulating substrate, and a common electrode formed on the second insulating substrate with a second opening pattern. The first and the second opening patterns proceed parallel to each other while being arranged in an alternate manner. A liquid crystal material is injected between the first and the second substrates. A spacer is positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

Abstract: A display device and a manufacturing method thereof are provided. The display device includes a substrate, first and second signal lines formed on the substrate, a first thin film transistor connected to the first and second signal lines., a gate driver and a data driver connected to the first signal line and the second signal line, respectively, and a second thin film transistor formed in at least one of the gate driver and the data driver The first thin film transistor and the second thin film transistor include a first semiconductor and a second semiconductor, respectively, and the first semiconductor and the second semiconductor are formed at the different layers from each other.

Abstract: There are provided a TFT, a TFT substrate using the TFT, a method of fabricating the TFT substrate, and an LCD. The TFT includes a source region, a drain region, and a gate electrode having an opening. The opening of the gate electrode is to enhance the light sensing ability of the TFT when it is used as a light sensor, since light is incident into a region where the opening is formed. The TFT including the gate having the opening can be used in a substrate of a flat display or an LCD using such a substrate. The above TFT can sense light incident from outside the display to adjust the brightness of the screen according to the external illumination.

Abstract: A thin film transistor array substrate is provided. The substrate includes an insulating substrate, a first signal line formed on the insulating substrate, a first insulating layer formed on the first signal line, a second signal line formed on the first insulating layer while crossing over the first signal line, a thin film transistor connected to the first and the second signal lines, a second insulating layer formed on the thin film transistor, the second insulating layer having dielectric constant about 4.0 or less, and the second insulating layer having a first contact hole exposing a predetermined electrode of the thin film transistor, and a first pixel electrode formed on the second insulating layer while being connected to the predetermined electrode of the thin film transistor through the first contact hole.

Abstract: A liquid crystal display includes first and second substrates. The first substrate has a first insulating substrate, and a pixel electrode formed on the first insulating substrate with a first opening pattern. The second substrate has a second insulating substrate, and a common electrode formed on the second insulating substrate with a second opening pattern. The first and the second opening patterns proceed parallel to each other while being arranged in an alternate manner. A liquid crystal material is injected between the first and the second substrates. A spacer is positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

Abstract: A thin film transistor array substrate is provided. The substrate includes an insulating substrate, a first signal line formed on the insulating substrate, a first insulating layer formed on the first signal line, a second signal line formed on the first insulating layer while crossing over the first signal line, a thin film transistor connected to the first and the second signal lines, a second insulating layer formed on the thin film transistor, the second insulating layer having dielectric constant about 4.0 or less, and the second insulating layer having a first contact hole exposing a predetermined electrode of the thin film transistor, and a first pixel electrode formed on the second insulating layer while being connected to the predetermined electrode of the thin film transistor through the first contact hole.

Abstract: In a pixel for displays capable of simplifying manufacturing process, a display apparatus having a simplified pixel structure and a method of manufacturing a cost competitive display device, a display pixel includes a channel layer, first to third signal lines, first and second insulating layers and a pixel electrode. The first signal line is formed on the first insulating layer. The first insulating layer insulates the channel layer from the first signal line. The second insulating layer insulates the first signal line from the second and third signal lines, and includes contact holes. The second and third signal lines are connected to the channel layer through the contact holes. The pixel electrode including indium zinc oxide is formed on the identical layer with the first and second signal lines, and disposed on the second insulating layer. Therefore, manufacturing process is simplified and manufacturing time is reduced.

Abstract: A liquid crystal display includes first and second substrates. The first substrate has a first insulating substrate, and a pixel electrode formed on the first insulating substrate with a first opening pattern. The second substrate has a second insulating substrate, and a common electrode formed on the second insulating substrate with a second opening pattern. The first and the second opening patterns proceed parallel to each other while being arranged in an alternate manner. A liquid crystal material is injected between the first and the second substrates. A spacer is positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

Abstract: A method for manufacturing a semiconductor device including forming a first wire on a substrate, forming a lower film on the first wire, forming a photosensitive pattern on the lower film using a photosensitive material, forming contact holes for exposing the first wire by etching the lower film using the photosensitive film as an etching mas, removing part of the photosensitive film pattern by an ashing process to expose a borderline of the lower film defining the contact holes and forming second wire connected to the firs wire via the contact holes.

Abstract: A gate wire is formed on a substrate. Next, after forming a gate insulating film, a semiconductor layer and an ohmic contact layer subsequently are formed thereon. Next, a data wire is formed. Next, a passivation layer and an organic insulating film are deposited, and patterned to form contact holes for exposing the drain electrode, the gate pad and the data pad, respectively. Here, the organic insulating film around the contact holes is formed thinner than that in the other portions. Next, the organic insulating film around the contact holes is removed by an ashing process to expose the borderline of the passivation layer in the contact holes, thereby removing an under-cut. Then, a pixel electrode, an assistant gate pad and an assistant data pad respectively connected to the drain electrode, the gate pad and the data pad are formed.

Abstract: A liquid crystal display includes the first and second substrates. The first substrate has a first insulating substrate. A pixel electrode is formed on the first insulating substrate. The second substrate has a second insulating substrate. A common electrode is formed on the second insulating substrate. The first and second protrusions having different thicknesses are formed on the common electrode. A liquid crystal material is injected between the first and the second substrates.

Abstract: An organic light emitting diode (OLED) display device and a manufacturing method thereof to improve a luminous character are provided. The OLED display device includes a first transistor, a second transistor and an OLED. An image is displayed by applying a driving current to OLED through the first transistor and the second transistor. The thickness of the gate insulating layers of the first and the second transistor are different. The OLED is provided with the sufficient driving current to improve the luminous character without decreasing emissive area.

Abstract: The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of lowdielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

Abstract: The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

Abstract: A gate wire is formed on a substrate. Next, after forming a gate insulating film, a semiconductor layer and an ohmic contact layer subsequently are formed thereon. Next, a data wire is formed. Next, a passivation layer and an organic insulating film are deposited, and patterned to form contact holes for exposing the drain electrode, the gate pad and the data pad respectively. Here, the organic insulating film around the contact holes is formed thinner than that in the other portions. Next, the organic insulating film around the contact holes is removed by an ashing process to expose the borderline of the passivation layer in the contact holes, thereby removing an under-cut. Then, a pixel electrode, an assistant gate pad and an assistant data pad respectively connected to the drain electrode, the gate pad and the data pad are formed.

Abstract: The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

Abstract: A thin film transistor array substrate is provided. The substrate includes an insulating substrate, a first signal line formed on the insulating substrate, a first insulating layer formed on the first signal line, a second signal line formed on the first insulating layer while crossing over the first signal line, a thin film transistor connected to the first and the second signal lines, a second insulating layer formed on the thin film transistor, the second insulating layer having dielectric constant about 4.0 or less, and the second insulating layer having a first contact hole exposing a predetermined electrode of the thin film transistor, and a first pixel electrode formed on the second insulating layer while being connected to the predetermined electrode of the thin film transistor through the first contact hole.