Patents by Inventor Kwang-Ho Lee

Kwang-Ho Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230172865
    Abstract: Provided is a method of controlling local release of target compounds by patterning a hydrogel carrying a bone morphogenetic protein or anticancer drug as the target compounds onto an electrospun nanoporous membrane. The hydrogel is capable of controlling local release of the bone morphogenetic protein or anticancer drug as a carrier of the bone morphogenetic protein or anticancer. And the electrospun nanoporous membrane performs a basic function of the membrane of preventing infiltration of connective tissue. Thus, there is an advantage in that the hydrogel patterned nanoporous membrane can facilitate generation of controlled bone in a local region and degradation of cancer in a local region.
    Type: Application
    Filed: January 12, 2023
    Publication date: June 8, 2023
    Inventor: Kwang Ho LEE
  • Publication number: 20230160974
    Abstract: The present invention relates to a device and method for detecting a surge arrester resistive leakage current for reducing the computational load, which may significantly reduce the computational load as the Fourier transform process need not be repeated in the process of searching to match a section to be Fourier transformed to a section in-phase with AC voltage to extract the resistive leakage current component from the Fourier series of surge arrester leakage current and enables real-time detection of the resistive leakage current by shortening the section searching process of one-period leakage current by searching for the section of one-period leakage current, which is to be initially Fourier-transformed, based on the characteristic pattern that it is repeatedly generated by application of an AC voltage.
    Type: Application
    Filed: July 17, 2020
    Publication date: May 25, 2023
    Inventors: Song yop HAHN, Kwang Ho LEE
  • Publication number: 20230081495
    Abstract: A semiconductor device includes a plurality of blocks on a substrate. Trenches are disposed between the plurality of blocks. Conductive patterns are formed inside the trenches. A lower end of an outermost trench among the trenches is formed at a level higher than a level of a lower end of the trench adjacent to the outermost trench. Each of the blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked. Pillars pass through the insulating layers and the gate electrodes along a direction orthogonal to an upper surface of the substrate.
    Type: Application
    Filed: November 9, 2022
    Publication date: March 16, 2023
    Inventors: Seung Hyun CHO, Kwang Ho Lee, Ji Hwan Yu, Jong Soo Kim
  • Publication number: 20230052897
    Abstract: The present invention relates to resistive leakage current in a surge arrester that measures not voltage but leakage current alone in the surge arrester to obtain a resistive leakage current included in the leakage current so as to compensate for shortcomings in conventional metal-oxide surge arresters.
    Type: Application
    Filed: September 20, 2019
    Publication date: February 16, 2023
    Inventors: Song Yop HAN, Jeong Woo LEE, Kwang Ho LEE
  • Patent number: 11543707
    Abstract: A display panel includes a base substrate. A semiconductor layer is disposed on the base substrate. A source electrode and a drain electrode are disposed on the semiconductor layer. A first insulating layer is disposed on both the source electrode and the drain electrode. A data line is disposed on the first insulating layer. The data line is electrically connected to the source electrode via a contact hole penetrating through the first insulating layer.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: January 3, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwang Ho Lee, Yeo Geon Yoon, Joong Gun Chong, Yong Hwan Shin
  • Patent number: 11471563
    Abstract: The present disclosure relates to a method for preparing a nerve conduit, more particularly to a method for preparing a porous nerve conduit having micropores formed in microchannels and the nerve conduit prepared according to the present disclosure can be usefully used in in-vitro and in-vivo researches on nerves.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 18, 2022
    Assignee: Wiregene Co., Ltd.
    Inventors: Jung Keun Hyun, Kwang-Ho Lee, Jin Ho Lee, Jun-Hyeog Jang, Jonathan Campbell Knowles, Dong-Wook Han
  • Publication number: 20220293935
    Abstract: Provided is a method of manufacturing a cathode active material for a lithium secondary battery. The method of manufacturing a cathode active material for a lithium secondary battery includes mixing a transition metal macro precursor and a lithium precursor to prepare a preliminary lithium-transition metal composite oxide particle; calcining the prepared preliminary lithium-transition metal composite oxide particle; and pulverizing the calcined preliminary lithium-transition metal composite oxide particle to form lithium-transition metal composite oxide particle. Accordingly, the process may be easily performed and a single crystal cathode active material having a uniform size may be manufactured.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 15, 2022
    Inventors: Kook Hyun Han, Ji Hoon Choi, Jik Soo Kim, Kwang Ho Lee
  • Publication number: 20220131145
    Abstract: The cathode active material according to embodiments of the present invention includes a lithium composite oxide particle having a form of secondary particle in which a plurality of primary particle are aggregated, wherein the primary particles respectively include a lithium conduction pathway through which lithium ions are diffused. Wherein the primary particles include a first particle, and the first particle has an angle of 45° to 90° formed by a direction from a center of the first particle to a center of the lithium composite oxide particle and a direction of the lithium conduction pathway included in the first particle, wherein a ratio of the number of the first particles among the primary particles located on a surface of the lithium composite oxide particle is 20% or more.
    Type: Application
    Filed: October 22, 2021
    Publication date: April 28, 2022
    Inventors: Sung Soon Park, Ji Hoon Choi, Jik Soo Kim, Kwang Ho Lee, Jeong Hoon Jeun
  • Patent number: 11312982
    Abstract: The present invention relates to a novel variant RNA polymerase sigma factor 70 (?70) polypeptide, a polynucleotide encoding the same, a microorganism containing the polypeptide, and a method for producing L-threonine by using the microorganism.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: April 26, 2022
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Ji Sun Lee, Kwang Ho Lee, Hyo Jin Kim, Keun Chul Lee, Young Bin Hwang
  • Publication number: 20210313352
    Abstract: A semiconductor device includes a plurality of blocks on a substrate. Trenches are disposed between the plurality of blocks. Conductive patterns are formed inside the trenches. A lower end of an outermost trench among the trenches is firmed at a level higher than a level of a lower end of the trench adjacent to the outermost trench. Each of the blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked. Pillars pass through the insulating layers and the gate electrodes along a direction orthogonal to an upper surface of the substrate.
    Type: Application
    Filed: June 22, 2021
    Publication date: October 7, 2021
    Inventors: Seung Hyun CHO, Kwang Ho LEE, Ji Hwan YU, Jong Soo KIM
  • Publication number: 20210271123
    Abstract: A display panel includes a base substrate. A semiconductor layer is disposed on the base substrate. A source electrode and a drain electrode are disposed on the semiconductor layer. A first insulating layer is disposed on both the source electrode and the drain electrode. A data line is disposed on the first insulating layer. The data line is electrically connected to the source electrode via a contact hole penetrating through the first insulating layer.
    Type: Application
    Filed: May 18, 2021
    Publication date: September 2, 2021
    Inventors: Kwang Ho Lee, Yeo Geon Yoon, Joong Gun Chong, Yong Hwan Shin
  • Patent number: 11056506
    Abstract: A semiconductor device includes a plurality of blocks on a substrate. Trenches are disposed between the plurality of blocks. Conductive patterns are formed inside the trenches. A lower end of an outermost trench among the trenches is formed at a level higher than a level of a lower end of the trench adjacent to the outermost trench. Each of the blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked. Pillars pass through the insulating layers and the gate electrodes along a direction orthogonal to an upper surface of the substrate.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: July 6, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Hyun Cho, Kwang Ho Lee, Ji Hwan Yu, Jong Soo Kim
  • Patent number: 11036095
    Abstract: A display panel includes a base substrate. A semiconductor layer is disposed on the base substrate. A source electrode and a drain electrode are disposed on the semiconductor layer. A first insulating layer is disposed on both the source electrode and the drain electrode. A data line is disposed on the first insulating layer. The data line is electrically connected to the source electrode via a contact hole penetrating through the first insulating layer.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: June 15, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwang Ho Lee, Yeo Geon Yoon, Joong Gun Chong, Yong Hwan Shin
  • Patent number: 10968467
    Abstract: The present invention relates to a novel variant RNA polymerase sigma factor 70 (?70) polypeptide, a polynucleotide encoding the same, a microorganism containing the polypeptide, and a method for producing L-threonine by using the microorganism.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: April 6, 2021
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Ji Sun Lee, Kwang Ho Lee, Hyo Jin Kim, Keun Chul Lee, Young Bin Hwang
  • Patent number: 10907749
    Abstract: Provided is a fluid control solenoid valve including: a valve body; a valve seat mounted on a lower portion thereof; a coil mounted on an outer circumferential surface thereof and to which power is applied; a core mounted on an inner surface thereof; a lower plunger movably disposed on the inner surface thereof and formed with an orifice and integrally formed with a tight contact portion to be in tight contact with the valve seat on a bottom surface thereof; and an actuating unit arranged to be linearly moved on an upper side of the lower plunger, actuated by interlocking the lower plunger and formed with an actuating rod which is linearly moved and which is in close contact with the orifice. A fluid flow delay unit is provided on an outer surface of the lower plunger to generate pressure difference between upper and lower portions of the lower plunger.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: February 2, 2021
    Assignee: YOUNGDO IND. CO., LTD.
    Inventor: Kwang Ho Lee
  • Publication number: 20200340023
    Abstract: The present invention relates to a novel variant RNA polymerase sigma factor 70 (?70) polypeptide, a polynucleotide encoding the same, a microorganism containing the polypeptide, and a method for producing L-threonine by using the microorganism.
    Type: Application
    Filed: July 15, 2020
    Publication date: October 29, 2020
    Inventors: Ji Sun LEE, Kwang Ho LEE, Hyo Jin KIM, Keun Chul LEE, Young Bin HWANG
  • Patent number: 10815510
    Abstract: The present application relates to a microorganism of the genus Escherichia producing L-tryptophan and, more specifically, to a microorganism of the genus Escherichia with improved activity of producing L-tryptophan by weakening or inactivating the activity of endogenous 6-phosphogluconate dehydratase and 2-keto-3-deoxy-6-phosphogluconate aldolase. Additionally, the present application relates to a method for producing L-tryptophan using the microorganism of the genus Escherichia.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: October 27, 2020
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Ki Yong Cheong, Kyung Rim Kim, Seok Myung Lee, Kwang Ho Lee, Keun Cheol Lee, Hyeong Pyo Hong
  • Patent number: 10801048
    Abstract: Provided is a method of producing L-amino acids by using a recombinant coryneform microorganism in which the expression of a target gene is weakened by using a gene transcription inhibition method.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: October 13, 2020
    Assignee: CJ CHEILJEDANG CORP.
    Inventors: Jun Ok Moon, Sang Jo Lim, Do Hyun Kwon, Kwang Ho Lee, Hyun Won Bae
  • Patent number: 10787692
    Abstract: The present invention relates to a microorganism able to produce L-threonine or L-tryptophan, and to a method for producing L-threonine or L-tryptophan by using same. More specifically, the present invention relates to: recombinant Escherichia coli which is more efficient in producing L-threonine or L-tryptophan by increasing the ability to produce ATP which is used as the most plentiful energy source in cells when producing L-threonine or L-tryptophan; and a method for producing L-threonine or L-tryptophan by using same.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: September 29, 2020
    Assignee: CJ Cheiljedang Corporation
    Inventors: Ki Yong Cheong, Seok Myung Lee, Young Bin Hwang, Keun Cheol Lee, Kwang Ho Lee
  • Publication number: 20200303412
    Abstract: A semiconductor device includes a plurality of blocks on a substrate. Trenches are disposed between the plurality of blocks. Conductive patterns are formed inside the trenches. A lower end of an outermost trench among the trenches is formed at a level higher than a level of a lower end of the trench adjacent to the outermost trench. Each of the blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked. Pillars pass through the insulating layers and the gate electrodes along a direction orthogonal to an upper surface of the substrate.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 24, 2020
    Inventors: Seung Hyun CHO, Kwang Ho LEE, Ji Hwan YU, Jong Soo KIM