Abstract: A transceiver includes a transmission module for generating an output signal, a controller for controlling the transmission module to allow an output signal to have one of a first frequency and a second frequency, a reception module for controlling the controller to allow a control signal to be outputted based on completion information received from the outside. The transmission module outputs an output signal having a first frequency to perform human body communication. When the reception module receives completion information, the transmission module outputs an output signal having a second frequency in response to the control signal in order to perform wireless communication. The first frequency is lower than the second frequency.

Abstract: Provided is a method for generating a preamble of a transmission signal for human body communication, the method including using a frequency shift code (FSC) of which a length is adjusted according to an operating clock frequency or a transmission rate and a first pseudo random binary sequence (PRBS) code of p chips where p is a natural number to generate a first preamble unit block of n chips where n is a natural number, using the FSC and a second PRBS code of p? chips to generate a second preamble unit block of n? chips, and arraying the first preamble unit block consecutively and repeatedly and disposing the second preamble unit block at a next stage to form the preamble of the transmission signal.

Abstract: The present invention relates to a source driver of a display apparatus, and relates to a source driver for display apparatus insensitive to power noise, which forcibly decides an internal operation state as normality in a specific period including a power noise generation period and operates insensitively to the power noise. Accordingly, the display apparatus can normally output an image voltage even though power noise occurs.

Abstract: Disclosed is a display device. The display device may use one transmission line to perform bidirectional data transmission between a timing controller and a source driver. Furthermore, the display device may control the timing controller to transmit a Tx signal to the source driver and control the source driver to transmit correction data, through one transmission line.

Abstract: A clock recovery circuit for recovering a clock signal from a clock-embedded data signal, a data receiving device for recovering a clock signal and a data signal from a clock-embedded data signal, and a data transmitting and receiving system for improving the protocol of a clock-embedded data signal. The data transmitting and receiving system includes a data transmitting device configured to transmit a clock-embedded data signal in which an embedded clock signal is embedded in a data signal; and a data receiving device configured to recover a clock signal corresponding to the embedded clock signal from the clock-embedded data signal.

Abstract: Provided are a display device and a source driver. The source driver may perform a power down mode in response to any one of a vertical blank period, a horizontal blank period, a state in which the load of a panel is maintained at a preset value or less, a state in which a current supplied to the panel is maintained at a preset value or less, or a state in which resolution is maintained at a preset value or less. The source driver can realize the power down mode using various power options, thereby reducing power consumption.

Abstract: A clock recovery circuit for recovering a clock signal from a clock-embedded data signal, a data receiving device for recovering a clock signal and a data signal from a clock-embedded data signal, and a data transmitting and receiving system for improving the protocol of a clock-embedded data signal. The data transmitting and receiving system includes a data transmitting device configured to transmit a clock-embedded data signal in which an embedded clock signal is embedded in a data signal; and a data receiving device configured to recover a clock signal corresponding to the embedded clock signal from the clock-embedded data signal.

Abstract: The present invention relates to a source driver of a display apparatus, and relates to a source driver for display apparatus insensitive to power noise, which forcibly decides an internal operation state as normality in a specific period including a power noise generation period and operates insensitively to the power noise. Accordingly, the display apparatus can normally output an image voltage even though power noise occurs.

Abstract: Disclosed is a source driver for a display apparatus which is insensitive to power noise, and a configuration of filtering an influence of power noise, which is introduced from an exterior of the source driver or occurs in an interior thereof, to an operation of the source driver. The present invention is applied to the case of receiving a clock signal and a data signal through the single signal line, and is embodied such that a source driver for driving a display apparatus for achieving a high speed operation and a large screen has a characteristic insensitive to power noise.

Abstract: Embodiments of the present invention provide a method and apparatus for transmitting data between a timing controller and a source driver. In some embodiments, the method includes a bit error rate test (BERT) function for sensing an error rate in real time when data is transmitted and received between the timing controller and the source driver.

Abstract: Disclosed is a method and apparatus for transmitting data between a timing controller and a source driver, and more particularly, a data transmission method and apparatus between a timing controller and a source driver, which has a bit error rate test (BERT) function for sensing an error rate in real time when data is transmitted and received between the timing controller and the source driver.

Abstract: A chip-on-glass (COG) type liquid crystal display device minimizes a reflected wave from an input terminal of a source driver IC, regardless of the resistance value of a transmission line on a glass substrate, through the use of impedance matching at a front terminal of an LOG and impedance matching at an output terminal of a timing controller, thereby enhancing the frequency characteristic while maintaining a slim and lightweight design, so that it is possible to express a high-resolution high-quality image.