Abstract: A semiconductor device is disclosed. A semiconductor device according to an example of the present disclosure includes a gate electrode of a ring shape having an opening area on a substrate; a P-type deep well region formed in the opening area; a drain region formed on the P-type deep well region; an N-type well region overlapping with the gate electrode; a source region formed in the N-type well region; a bulk tab region formed by being isolated from the source region by a first isolation region; a P-type drift region formed in contact with the N-type well region; and a second isolation region formed near the bulk tab region.

Abstract: A semiconductor device includes a ring-shaped gate electrode having an opening area disposed on a substrate, a source region and a bulk tap region disposed in the opening area, a well region disposed to overlap the ring-shaped gate electrode, a drift region disposed to be in contact with the well region, a first insulating isolation region disposed, on the drift region, to partially overlap the gate electrode, a second insulating isolation region enclosing the bulk tap region, a drain region disposed to be spaced apart from the ring-shaped gate electrode, and a deep trench isolation region disposed adjacent to the drain region.

Abstract: A semiconductor device is disclosed. A semiconductor device according to an example of the present disclosure includes a gate electrode of a ring shape having an opening area on a substrate; a P-type deep well region formed in the opening area; a drain region formed on the P-type deep well region; an N-type well region overlapping with the gate electrode; a source region formed in the N-type well region; a bulk tab region formed by being isolated from the source region by a first isolation region; a P-type drift region formed in contact with the N-type well region; and a second isolation region formed near the bulk tab region.

Abstract: A semiconductor device includes a ring-shaped gate electrode having an opening area disposed on a substrate, a source region and a bulk tap region disposed in the opening area, a well region disposed to overlap the ring-shaped gate electrode, a drift region disposed to be in contact with the well region, a first insulating isolation region disposed, on the drift region, to partially overlap the gate electrode, a second insulating isolation region enclosing the bulk tap region, a drain region disposed to be spaced apart from the ring-shaped gate electrode, and a deep trench isolation region disposed adjacent to the drain region.

Abstract: Proposed is a folding seat which can be folded by manipulating a lever at various positions so as to improve the utilization of space around the folding seat. The folding seat includes: a seat frame; a seat back frame located at a rear of the seat frame and coupled rotatably to the seat frame or a vehicle; and a first latch part provided with a side support, a first end of the side support being coupled to the vehicle and a second end of the side support being coupled to the rear of the seat frame through a rotation shaft such that the seat frame is rotatable.

Abstract: Proposed is a folding seat that is capable of being folding to various positions by controlling a lever and the folding seat is capable of improving utilization of space around the folding seat. According to an embodiment of the present disclosure, the folding seat includes: a seat frame; a seat back frame cross-arranged in back of the seat frame, the seat back frame having a first side rotatably coupled to the seat frame; and a locking portion coupled at a first side thereof to the seat back frame and rotatably coupled at a second side thereof to the seat frame at a position between the seat frame and the seat back frame, wherein the locking portion is configured to be inserted into a rear portion of the seat frame or to be separated from the seat frame according to an operation thereof.

Abstract: A semiconductor device includes a substrate, a buried doped layer formed on the substrate, a trench gate formed on the buried doped layer, a source region formed adjacent the trench gate, an interlayer dielectric layer formed on the trench gate and the source region, a source contact plug formed to extend and connect to the source region, and a drain contact plug, extending and connecting to the buried doped layer, formed deeper than the source contact plug.

Abstract: A learning apparatus for creating an emotion expression video according to an embodiment disclosed include first generative adversarial networks (GAN) that receive text for creating an emotion expression video, extract vector information by performing embedding on the input text, and create an image based on the extracted vector information, and second generative adversarial networks that receive an emotion expression image and a frame of comparison video, and create a frame of emotion expression video from the emotion expression image and the frame of comparison video.

Abstract: A semiconductor device includes a first N-type deep well region and a second N-type deep well region formed in a substrate, an N-type diffused well region formed between the first N-type deep well region and the second N-type deep well region, wherein a concentration of the N-type diffused well region is less than a concentration of the first N-type deep well region or the second N-type deep well region, a first P-type well region formed in the first N-type deep well region, a second P-type well region formed in the N-type diffused well region, an insulating film formed to be in contact with the first P-type well region, and a silicide formed on the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well.

Abstract: A semiconductor device is disclosed. A semiconductor device according to an example of the present disclosure includes a gate electrode of a ring shape having an opening area on a substrate; a P-type deep well region formed in the opening area; a drain region formed on the P-type deep well region; an N-type well region overlapping with the gate electrode; a source region formed in the N-type well region; a bulk tab region formed by being isolated from the source region by a first isolation region; a P-type drift region formed in contact with the N-type well region; and a second isolation region formed near the bulk tab region.

Abstract: A semiconductor device includes a ring-shaped gate electrode having an opening area disposed on a substrate, a source region and a bulk tap region disposed in the opening area, a well region disposed to overlap the ring-shaped gate electrode, a drift region disposed to be in contact with the well region, a first insulating isolation region disposed, on the drift region, to partially overlap the gate electrode, a second insulating isolation region enclosing the bulk tap region, a drain region disposed to be spaced apart from the ring-shaped gate electrode, and a deep trench isolation region disposed adjacent to the drain region.

Abstract: A semiconductor device includes a first N-type deep well region and a second N-type deep well region formed in a substrate, an N-type diffused well region formed between the first N-type deep well region and the second N-type deep well region, wherein a concentration of the N-type diffused well region is less than a concentration of the first N-type deep well region or the second N-type deep well region, a first P-type well region formed in the first N-type deep well region, a second P-type well region formed in the N-type diffused well region, an insulating film formed to be in contact with the first P-type well region, and a silicide formed on the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well.

Abstract: A semiconductor device includes a first N-type deep well region and a second N-type deep well region formed in a substrate, an N-type diffused well region formed between the first N-type deep well region and the second N-type deep well region, wherein a concentration of the N-type diffused well region is less than a concentration of the first N-type deep well region or the second N-type deep well region, a first P-type well region formed in the first N-type deep well region, a second P-type well region formed in the N-type diffused well region, an insulating film formed to be in contact with the first P-type well region, and a silicide formed on the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well.

Abstract: A printed circuit board includes first and second insulating layers forming a cavity, a first heat releasing layer formed on an exterior surface of the cavity, and a circuit layer formed above or below the first the insulating layer and at least between a surface of the cavity and the first insulating layer. The heat releasing layer is electrically connected to at least a portion of the circuit layer.

Abstract: An evaluation system of block copolymer patterns includes a supplier, a plurality of analyzers, and a homopolymer interference remover. The supplier provides a sample including a block copolymer and a homopolymer. The analyzers measure a molecular weight of the block copolymer in the sample, measure a preliminary block ratio, the preliminary block ratio corresponding to a total ratio in the sample of each block in the block copolymer, and selectively measure a ratio of the homopolymer in the sample. The homopolymer interference remover subtracts the ratio of the homopolymer from the preliminary block ratio.

Abstract: The present disclosure relates to an IoT-based modular robotics system where a function button for changing from a program mode to an automatic mode is installed in a master block, enabling instant execution of the automatic mode in the master block.

Abstract: Provided is a laser welding apparatus for spacer grid of nuclear fuel assembly comprising a base frame in which a chamber installment hole is formed horizontally to the center in a way that the hole penetrates the chamber and a guide rail is installed along the chamber installment hole; a welding chamber unit assembled with the base frame in guidance by the guide rail and equipped with an operable door in front and a glass window at the top to be airtight; a laser welding unit mounted on the base frame for radiating laser through the glass window to weld spacer grid in the welding chamber; and a locking member for fixing the welding chamber on the base frame.

Abstract: A method of fabricating a semiconductor device including a diffused metal-oxide-semiconductor (DMOS) transistor, an n-type metal-oxide-semiconductor (NMOS) transistor, and a p-type metal-oxide-semiconductor (PMOS) transistor includes forming separation regions in a semiconductor substrate, forming a gate insulating film, forming a DMOS gate electrode on the gate insulating film, forming a first mask pattern on the semiconductor substrate, performing a first ion implantation process, forming a second mask pattern on the semiconductor substrate, performing a second ion implantation process, forming a third mask pattern on the semiconductor substrate and performing a third ion implantation process into the semiconductor substrate, and forming a fourth mask pattern on the semiconductor substrate and performing a fourth ion implantation process.

Abstract: A semiconductor device includes a first N-type deep well region and a second N-type deep well region formed in a substrate, an N-type diffused well region formed between the first N-type deep well region and the second N-type deep well region, wherein a concentration of the N-type diffused well region is less than a concentration of the first N-type deep well region or the second N-type deep well region, a first P-type well region formed in the first N-type deep well region, a second P-type well region formed in the N-type diffused well region, an insulating film formed to be in contact with the first P-type well region, and a silicide formed on the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well.

Abstract: A conductivity detector includes a flow channel, an electrode arrangement, and a detector. The flow channel has a tube shape with a channel diameter through which a solution including ion components flows. The electrode arrangement is on the flow channel and includes at least an anode and at least a cathode. The anode and cathode are spaced apart by an electrode gap less than or equal to the channel diameter. The detector is connected to the electrode arrangement to detect electrical conductivity of the ion components.