Abstract: A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

Abstract: A display may have a thin-film transistor layer formed from a layer of thin-film, transistor circuitry on a substrate. The thin-film transistor layer may overlap a color filter layer. A portion of the thin-film transistor layer may extend past the color filter layer to for a ledge region. Components such as a flexible printed circuit and a display driver integrated circuit may be mounted to the thin-film transistor layer in the ledge region. The components may have alignment marks. The thin-film transistor layer may have a black masking layer that is patterned to form openings for display pixels. In a border area of the display that overlaps the ledge region, the thin-film transistor layer may have alignment mark viewing windows. Alignment marks formed from black masking material in the windows may be aligned with respective alignment marks on the components.

Abstract: A liquid crystal display may have a thin-film transistor layer with an array of pixel electrode structures for applying electric fields to a liquid crystal layer. The liquid crystal display may also have a color filter layer with an array of color filter elements. The color filter elements may allow the display to display color images. The color filter layer may be interposed between the thin-film transistor layer and a backlight. The liquid crystal layer may be sandwiched between the thin-film transistor layer and the color filter layer. The color filter layer may have a transparent substrate on which the color filter elements are formed. Black masking structures may be formed on a transparent overcoat layer that covers the color filter elements. Black column spacers may be formed from the same layer of material that forms the black masking structures.

Abstract: A display may include a color filter glass layer and a thin-film transistor glass layer that are attached with sealant. The thin-film transistor glass layer may have a recess in an inactive area of the display that accommodates a camera. The display layers may be provided with an opening that overlaps the recess. The recess may be a hole or a notch. The display may include circuitry and metal structures in the inactive area that are isolated from the recess with sealant. The sealant may have intersection points to isolate internal components from external contaminants and prevent reliability issues in the display. The display may be formed by cutting a motherglass layer into an individual display panel. The motherglass layer may include display layers attached with sealant. Cutting the mother glass layer may include cutting the sealant.

Abstract: A display may have a thin-film transistor (TFT) layer and color filter layer. Light blocking structures in an inactive area of the display may prevent stray backlight from leaking out of the display. The thin-film transistor layer may have a first substrate, a first black masking layer, a planarization layer, and a layer of TFT circuitry on the planarization layer. The color filter layer may have a second substrate and a second black masking layer on the second substrate. Light-cured sealant may be formed between the TFT layer and the color filter layer. Gaps may be formed in the second black masking layer to allow light to cure the sealant. At least a portion of the TFT circuitry may serve to block stray backlight penetrating through the gaps in the second black masking layer during normal operation of the display.

Abstract: A display may have an array of pixels controlled by display driver circuitry. The display driver circuitry may supply the pixels with data signals over data lines in columns of the pixels and may supply the pixels with gate line signals over gate lines in rows of the pixels. The display driver circuitry may have a display driver integrated circuit located on one of the edges of the display. The display driver circuitry may also have gate driver integrated circuits that extend along opposing edges of the display to form a pair of shift registers. Conductive lines in a display substrate may be coupled to opposing ends of the shift registers and to intermediate locations within the shift registers to minimize delays in distributing a gate high voltage signal from the display driver integrated circuit to the shift registers.

Abstract: A display has an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The pixels may be liquid crystal display pixels. Each pixel may have a common electrode voltage terminal. The display may have a transparent conductive film that forms a common electrode voltage layer that overlaps that array and that is shorted to the common electrode voltage terminals of the pixels. Metal common electrode voltage lines may run across the transparent conductive film to reduce resistance. Metal common electrode voltage paths that are coupled to the metal common electrode voltage lines may run along the left and right edge of the display. Common electrode voltage compensation circuits may receive feedback from the metal common electrode voltage paths. There may be two or more common electrode voltage compensation circuits for both the left and right edges of the display.

Abstract: A display may have a liquid crystal layer sandwiched between a thin-film transistor layer and a color filter layer. An upper polarizer may be placed on top of the thin-film transistor layer. A lower polarizer may be placed under the color filter layer. Components may be bonded to bond pads on the inner surface of the thin-film transistor layer using anisotropic conductive film. Bond quality may be assessed by probing probe pads that are coupled to the bond pads or by visually inspecting the bond pads through the thin-film transistor layer. Opaque masking material in the inactive area may be provided with openings to accommodate the bond pads. Additional opaque masking material may be placed on the underside of the upper polarizer and on the upper surface of the thin-film transistor layer to block the openings from view following visual inspection.

Abstract: A display may have an active area surrounded by an inactive border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. An upper polarizer may have a polarized central region that overlaps the active area of the display. The upper polarizer may also have an unpolarized portion in the inactive border area overlapping the border structures. The border structures may include colored material such as a white layer on the inner surface of the thin-film transistor layer. Binary information may be embedded into an array of programmable resonant circuits. The binary information may be a display identifier or other information associated with a display. The programmable resonant circuits may be tank circuits with adjustable capacitors, fuses, or other programmable components.

Abstract: A display may have a thin-film transistor (TFT) layer and a color filter layer. The TFT layer may have a first substrate, a first black masking layer, a planarization layer, and a layer of TFT circuitry on the planarization layer. The color filter layer may have a second substrate and a second black masking layer on the second substrate. A portion of the inactive area may serve as a logo area for displaying desired information to the user. A reflective structure may be formed on the bottom surface of the planarization layer, on the bottom surface of the first substrate, on the bottom surface of the second substrate, or on the upper surface of the first substrate in the logo area. In another embodiment, the logo area may be backlit by transmitting light through one or more openings in the first and second black masking layers in the logo area.

Abstract: A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver circuit may include multiple gate line driver segments each of which is activated by a separate gate start pulse. Each gate start pulse may only be released at the end of an IFP interval. In another suitable arrangement, dummy gate driver units may be interposed among active gate driver units. Gate output signals may propagate through the dummy gate driver units during the IFP internal. In another suitable arrangement, each active gate driver unit may be provided with a buffer portion that protects at least some transistor in the gate driver unit from undesired stress.

Abstract: A display may have an array of pixels to display images. Gate line driver circuitry may have stages that supply gate line signals. A gate line may be located in each row of the pixels. Each stage may have an output block that produces a respective one of the gate line signals and may have a carry block that separately produces a carry signal that is provided to a later stage in the gate line driver circuitry. A memory may be provided in at least some of the stages to store signals produced by the output blocks during intraframe pausing operations. At the end of an intraframe pause, the stored signals may be used in restarting production of the gate line signals by output blocks in the gate line driver stages. Circuitry may be used to separately reset the output block and suppress carry signal production by the carry block.

Abstract: A display may have a liquid crystal layer sandwiched between a thin-film transistor layer and a color filter layer. An upper polarizer may be placed on top of the thin-film transistor layer. A lower polarizer may be placed under the color filter layer. Components may be bonded to bond pads on the inner surface of the thin-film transistor layer using anisotropic conductive film. Bond quality may be assessed by probing probe pads that are coupled to the bond pads or by visually inspecting the bond pads through the thin-film transistor layer. Opaque masking material in the inactive area may be provided with openings to accommodate the bond pads. Additional opaque masking material may be placed on the underside of the upper polarizer and on the upper surface of the thin-film transistor layer to block the openings from view following visual inspection.

Abstract: A display may have a thin-film transistor layer formed from a layer of thin-film, transistor circuitry on a substrate. The thin-film transistor layer may overlap a color filter layer. A portion of the thin-film transistor layer may extend past the color filter layer to for a ledge region. Components such as a flexible printed circuit and a display driver integrated circuit may be mounted to the thin-film transistor layer in the ledge region. The components may have alignment marks. The thin-film transistor layer may have a black masking layer that is patterned to form openings for display pixels. In a border area of the display that overlaps the ledge region, the thin-film transistor layer may have alignment mark viewing windows. Alignment marks formed from black masking material in the windows may be aligned with respective alignment marks on the components.

Abstract: A display may have an active area surrounded by an inactive border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. An upper polarizer may have a polarized central region that overlaps the active area of the display. The upper polarizer may also have an unpolarized portion in the inactive border area overlapping the border structures. The border structures may include colored material such as a white layer on the inner surface of the thin-film transistor layer. Binary information may be embedded into an array of programmable resonant circuits. The binary information may be a display identifier or other information associated with a display. The programmable resonant circuits may be tank circuits with adjustable capacitors, fuses, or other programmable components.

Abstract: A display may have an active area surrounded by an inactive border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. An upper polarizer may have a polarized central region that overlaps the active area of the display. The upper polarizer may also have an unpolarized portion in the inactive border area overlapping the border structures. The border structures may include colored material such as a white layer on the inner surface of the thin-film transistor layer. Binary information may be embedded into an array of programmable resonant circuits. The binary information may be a display identifier or other information associated with a display. The programmable resonant circuits may be tank circuits with adjustable capacitors, fuses, or other programmable components.

Abstract: A liquid crystal display having an outer layer such as a thin-film transistor layer and an inner layer such as a color filter layer may be mounted in a metal device housing. Transparent conductive coating material may be formed on display layers. The transparent conductive coating material may include a layer on the upper surface of the thin-film transistor layer, a layer on the lower surface of the color filter layer, and an edge coating that extends between the upper surface layer and lower surface layer. Electrostatic discharge protection structures for the display may include a conductive elastomeric gasket that couples the upper surface layer to an inner surface of the housing, a conductive tape that couples the lower surface layer to the inner surface, and a conductive material on the inner surface that contacts the edge coating.

Abstract: A liquid crystal display may have a thin-film transistor layer with an array of pixel electrode structures for applying electric fields to a liquid crystal layer. The liquid crystal display may also have a color filter layer with an array of color filter elements. The color filter elements may allow the display to display color images. The color filter layer may be interposed between the thin-film transistor layer and a backlight. The liquid crystal layer may be sandwiched between the thin-film transistor layer and the color filter layer. The color filter layer may have a transparent substrate on which the color filter elements are formed. Black masking structures may be formed on a transparent overcoat layer that covers the color filter elements. Black column spacers may be formed from the same layer of material that forms the black masking structures.

Abstract: A display may have a thin-film transistor (TFT) layer and a color filter layer. The TFT layer may have a first substrate, a first black masking layer, a planarization layer, and a layer of TFT circuitry on the planarization layer. The color filter layer may have a second substrate and a second black masking layer on the second substrate. A portion of the inactive area may serve as a logo area for displaying desired information to the user. A reflective structure may be formed on the bottom surface of the planarization layer, on the bottom surface of the first substrate, on the bottom surface of the second substrate, or on the upper surface of the first substrate in the logo area. In another embodiment, the logo area may be backlit by transmitting light through one or more openings in the first and second black masking layers in the logo area.

Abstract: A display may have a thin-film transistor (TFT) layer and color filter layer. Light blocking structures in an inactive area of the display may prevent stray backlight from leaking out of the display. The thin-film transistor layer may have a first substrate, a first black masking layer, a planarization layer, and a layer of TFT circuitry on the planarization layer. The color filter layer may have a second substrate and a second black masking layer on the second substrate. Light-cured sealant may be formed between the TFT layer and the color filter layer. Gaps may be formed in the second black masking layer to allow light to cure the sealant. At least a portion of the TFT circuitry may serve to block stray backlight penetrating through the gaps in the second black masking layer during normal operation of the display.