Patents by Inventor Kwangduk Douglas Lee

Kwangduk Douglas Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325800
    Abstract: Techniques are disclosed for methods and apparatuses for increasing the breakdown voltage while substantially reducing the voltage leakage of an electrostatic chuck at temperatures exceeding about 300 degrees Celsius in a processing chamber.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: June 18, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Prashant Kulshreshtha, Kwangduk Douglas Lee, Bok Hoen Kim, Zheng John Ye, Swayambhu Prasad Behera, Ganesh Balasubramanian, Juan Carlos Rocha-Alvarez, Jian J. Chen
  • Publication number: 20190172714
    Abstract: Implementations described herein generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of amorphous carbon films on a substrate. In one implementation, a method of forming an amorphous carbon film is provided. The method comprises depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further comprises implanting a dopant or inert species into the amorphous carbon film in a second processing region. The dopant or inert species is selected from carbon, boron, nitrogen, silicon, phosphorous, argon, helium, neon, krypton, xenon or combinations thereof. The method further comprises patterning the doped amorphous carbon film. The method further comprises etching the underlayer.
    Type: Application
    Filed: November 13, 2018
    Publication date: June 6, 2019
    Inventors: Sarah BOBEK, Prashant KUMAR KULSHRESHTHA, Rajesh PRASAD, Kwangduk Douglas LEE, Harry WHITESELL, Hidetaka OSHIO, Dong Hyung LEE, Deven Matthew Raj MITTAL
  • Publication number: 20190122889
    Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about ?100 MPa to about 100 MPa.
    Type: Application
    Filed: December 13, 2018
    Publication date: April 25, 2019
    Inventors: Prashant Kumar KULSHRESHTHA, Ziqing DUAN, Karthik Thimmavajjula NARASIMHA, Kwangduk Douglas LEE, Bok Hoen KIM
  • Patent number: 10236225
    Abstract: The present disclosure generally relates to a method for performing semiconductor device fabrication, and more particularly, to improvements in lithographic overlay techniques. The method for improved overlay includes depositing a material on a substrate, heating a substrate in a chamber using thermal energy, measuring a local stress pattern of each substrate, wherein measuring the local stress pattern measures an amount of change in a depth of the deposited material on the substrate, plotting a plurality of points on a k map to determine a local stress pattern of the substrate, adjusting the thermal energy applied to the points on the k map, determining a sensitivity value for each of the points on the k map, and applying a correction factor to the applied thermal energy to adjust the local stress pattern.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: March 19, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yoichi Suzuki, Michael Wenyoung Tsiang, Kwangduk Douglas Lee, Takashi Morii, Yuta Goto
  • Publication number: 20180330951
    Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for depositing metal silicide layers on substrates and chamber components. In one embodiment, a method of forming a hardmask includes positioning the substrate having a target layer within a processing chamber, forming a seed layer comprising metal silicide on the target layer and depositing a tungsten-based bulk layer on the seed layer, wherein the metal silicide layer and the tungsten-based bulk layer form the hardmask. In another embodiment, a method of conditioning the components of a plasma processing chamber includes flowing an inert gas comprising argon or helium from a gas applicator into the plasma processing chamber, exposing a substrate support to a plasma within the plasma processing chamber and forming a seasoning layer including metal silicide on an aluminum-based surface of the substrate support.
    Type: Application
    Filed: May 11, 2018
    Publication date: November 15, 2018
    Applicant: Applied Materials, Inc.
    Inventors: Prashant Kumar KULSHRESHTHA, Jiarui WANG, Kwangduk Douglas LEE, Milind GADRE, Xiaoquan MIN, Paul CONNORS
  • Patent number: 10100408
    Abstract: Embodiments described herein relate to a faceplate for improving film uniformity. A semiconductor processing apparatus includes a pedestal, an edge ring and a faceplate having distinct regions with differing hole densities. The faceplate has an inner region and an outer region which surrounds the inner region. The inner region has a greater density of holes formed therethrough when compared to the outer region. The inner region is sized to correspond with a substrate being processed while the outer region is sized to correspond with the edge ring.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: October 16, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sungwon Ha, Kwangduk Douglas Lee, Ganesh Balasubramanian, Juan Carlos Rocha-Alvarez, Martin Jay Seamons, Ziqing Duan, Zheng John Ye, Bok Hoen Kim, Lei Jing, Ngoc Le, Ndanka Mukuti
  • Publication number: 20180226306
    Abstract: The present disclosure generally relates to a method for performing semiconductor device fabrication, and more particularly, to improvements in lithographic overlay techniques. The method for improved overlay includes depositing a material on a substrate, heating a substrate in a chamber using thermal energy, measuring a local stress pattern of each substrate, wherein measuring the local stress pattern measures an amount of change in a depth of the deposited material on the substrate, plotting a plurality of points on a k map to determine a local stress pattern of the substrate, adjusting the thermal energy applied to the points on the k map, determining a sensitivity value for each of the points on the k map, and applying a correction factor to the applied thermal energy to adjust the local stress pattern.
    Type: Application
    Filed: April 4, 2018
    Publication date: August 9, 2018
    Inventors: Yoichi SUZUKI, Michael Wenyoung TSIANG, Kwangduk Douglas LEE, Takashi MORII, Yuta GOTO
  • Patent number: 9947599
    Abstract: The present disclosure generally relates to a method for performing semiconductor device fabrication, and more particularly, to improvements in lithographic overlay techniques. The method for improved overlay includes depositing a material on a substrate, heating a substrate in a chamber using thermal energy, measuring a local stress pattern of each substrate, wherein measuring the local stress pattern measures an amount of change in a depth of the deposited material on the substrate, plotting a plurality of points on a k map to determine a local stress pattern of the substrate, adjusting the thermal energy applied to the points on the k map, determining a sensitivity value for each of the points on the k map, and applying a correction factor to the applied thermal energy to adjust the local stress pattern.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: April 17, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yoichi Suzuki, Michael Wenyoung Tsiang, Kwangduk Douglas Lee, Takashi Morii, Yuta Goto
  • Publication number: 20180096843
    Abstract: Methods for modulating local stress and overlay error of one or more patterning films may include modulating a gas flow profile of gases introduced into a chamber body, flowing gases within the chamber body toward a substrate, rotating the substrate, and unifying a center-to-edge temperature profile of the substrate by controlling the substrate temperature with a dual zone heater. A chamber for depositing a film may include a chamber body comprising one or more processing regions. The chamber body may include a gas distribution assembly having a blocker plate for delivering gases into the one or more processing regions. The blocker plate may have a first region and a second region, and the first region and second region each may have a plurality of holes. The chamber body may have a dual zone heater.
    Type: Application
    Filed: November 17, 2017
    Publication date: April 5, 2018
    Inventors: Prashant Kumar Kulshreshtha, Sudha Rathi, Praket P. Jha, Saptarshi Basu, Kwangduk Douglas Lee, Martin J. Seamons, Bok Hoen Kim, Ganesh Balasubramanian, Ziqing Duan, Lei Jing, Mandar B. Pandit
  • Publication number: 20180076032
    Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of thick hardmask films on a substrate. In one implementation, a method of forming a hardmask layer on a substrate is provided. The method comprises applying a chucking voltage to a substrate positioned on an electrostatic chuck in a processing chamber, forming a seed layer comprising boron on a film stack disposed on a substrate by supplying a seed layer gas mixture in the processing chamber while maintaining the chucking voltage, forming a transition layer comprising boron and tungsten on the seed layer by supplying a transition layer gas mixture in the processing chamber and forming a bulk hardmask layer on the transition layer by supplying a main deposition gas mixture in the processing chamber.
    Type: Application
    Filed: September 5, 2017
    Publication date: March 15, 2018
    Inventors: Jiarui WANG, Prashant Kumar KULSHRESHTHA, Eswaranand VENKATASUBRAMANIAN, Susmit Singha ROY, Kwangduk Douglas LEE
  • Publication number: 20170365450
    Abstract: Embodiments of the invention generally relate to methods for removing a boron-carbon layer from a surface of a processing chamber using water vapor plasma treatment. In one embodiment, a method for cleaning a surface of a processing chamber includes positioning the pedestal at a first distance from the showerhead, and exposing a deposited boron-carbon layer to a first plasma process where the first plasma process comprises generating a plasma that comprises water vapor and a first carrier gas by biasing a showerhead that is disposed over a pedestal, and positioning the pedestal at a second distance from the showerhead and exposing the deposited boron-carbon layer to a second plasma process where the second plasma process comprises generating a plasma that comprises water vapor and a second carrier gas by biasing the showerhead and biasing a side electrode relative to the showerhead.
    Type: Application
    Filed: June 16, 2017
    Publication date: December 21, 2017
    Inventors: Feng BI, Prashant Kumar KULSHRESHTHA, Kwangduk Douglas Lee, Paul CONNORS
  • Patent number: 9837265
    Abstract: Methods for modulating local stress and overlay error of one or more patterning films may include modulating a gas flow profile of gases introduced into a chamber body, flowing gases within the chamber body toward a substrate, rotating the substrate, and unifying a center-to-edge temperature profile of the substrate by controlling the substrate temperature with a dual zone heater. A chamber for depositing a film may include a chamber body comprising one or more processing regions. The chamber body may include a gas distribution assembly having a blocker plate for delivering gases into the one or more processing regions. The blocker plate may have a first region and a second region, and the first region and second region each may have a plurality of holes. The chamber body may have a dual zone heater.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 5, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Prashant Kumar Kulshreshtha, Sudha Rathi, Praket P. Jha, Saptarshi Basu, Kwangduk Douglas Lee, Martin J. Seamons, Bok Hoen Kim, Ganesh Balasubramanian, Ziqing Duan, Lei Jing, Mandar B. Pandit
  • Publication number: 20170309525
    Abstract: The present disclosure generally relates to a method for performing semiconductor device fabrication, and more particularly, to improvements in lithographic overlay techniques. The method for improved overlay includes depositing a material on a substrate, heating a substrate in a chamber using thermal energy, measuring a local stress pattern of each substrate, wherein measuring the local stress pattern measures an amount of change in a depth of the deposited material on the substrate, plotting a plurality of points on a k map to determine a local stress pattern of the substrate, adjusting the thermal energy applied to the points on the k map, determining a sensitivity value for each of the points on the k map, and applying a correction factor to the applied thermal energy to adjust the local stress pattern.
    Type: Application
    Filed: April 20, 2017
    Publication date: October 26, 2017
    Inventors: Yoichi SUZUKI, Michael Wenyoung TSIANG, Kwangduk Douglas LEE, Takashi MORII, Yuta GOTO
  • Patent number: 9711360
    Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-containing amorphous carbon films on a substrate with reduced particle contamination. In one implementation, the method comprises flowing a hydrocarbon-containing gas mixture into a processing volume having a substrate positioned therein, flowing a boron-containing gas mixture into the processing volume, stabilizing the pressure in the processing volume for a predefined RF-on delay time period, generating an RF plasma in the processing volume after the predefined RF-on delay time period expires to deposit a boron-containing amorphous film on the substrate, exposing the processing volume of the process chamber to a dry cleaning process and depositing an amorphous boron season layer over at least one surface in the processing volume of the process chamber.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: July 18, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Ziqing Duan, Kwangduk Douglas Lee, Abdul Aziz Khaja, Amit Kumar Bansal, Bok Hoen Kim, Prashant Kumar Kulshreshtha
  • Publication number: 20170178758
    Abstract: The present disclosure generally relates to a radiation shield for a process chamber which improves substrate temperature uniformity. The radiation shield may be disposed between a slit valve door of the process chamber and a substrate support disposed within the process chamber. In some embodiments, the radiation shield may be disposed under a heater of the process chamber. Furthermore, the radiation shield may block radiation and/or heat supplied from the process chamber, and in some embodiments, the radiation shield may absorb and/or reflect radiation, thus providing improved temperature uniformity as well as improving a planar profile of the substrate.
    Type: Application
    Filed: December 5, 2016
    Publication date: June 22, 2017
    Inventors: Sungwon HA, Paul CONNORS, Jianhua ZHOU, Juan Carlos ROCHA-ALVAREZ, Kwangduk Douglas LEE, Ziqing DUAN, Nicolas J. BRIGHT, Feng BI
  • Publication number: 20170162417
    Abstract: Techniques are disclosed for methods and apparatuses of an electrostatic chuck suitable for operating at high operating temperatures. In one example, a substrate support assembly is provided. The substrate support assembly includes a substantially disk-shaped ceramic body having an upper surface, a cylindrical sidewall, and a lower surface. The upper surface is configured to support a substrate thereon for processing the substrate in a vacuum processing chamber. The cylindrical sidewall defines an outer diameter of the ceramic body. The lower surface is disposed opposite the upper surface. An electrode is disposed in the ceramic body. A circuit is electrically connected to the electrode. The circuit includes a DC chucking circuit, a first RF drive circuit, and a second RF dive circuit. The DC chucking circuit, the first RF drive circuit and the second RF drive circuit are electrically coupled with the electrode.
    Type: Application
    Filed: December 6, 2016
    Publication date: June 8, 2017
    Inventors: Zheng John YE, Hiroji HANAWA, Juan Carlos ROCHA-ALVAREZ, Pramit MANNA, Michael Wenyoung TSIANG, Allen KO, Wenjiao WANG, Yongjing LIN, Prashant Kumar KULSHRESHTHA, Xinhai HAN, Bok Hoen KIM, Kwangduk Douglas LEE, Karthik Thimmavajjula NARASIMHA, Ziqing DUAN, Deenesh PADHI
  • Patent number: 9653327
    Abstract: Embodiments of the invention generally relate to methods of removing and/or cleaning a substrate surface having different material layers disposed thereon using water vapor plasma treatment. In one embodiment, a method for cleaning a surface of a substrate includes positioning a substrate into a processing chamber, the substrate having a dielectric layer disposed thereon forming openings on the substrate, exposing the dielectric layer disposed on the substrate to water vapor supplied into the chamber to form a plasma in the water vapor, maintaining a process pressure in the chamber at between about 1 Torr and about 120 Torr, and cleaning the contact structure formed on the substrate.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: May 16, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kwangduk Douglas Lee, Sudha Rathi, Chiu Chan, Martin J. Seamons, Bok Heon Kim
  • Publication number: 20170103893
    Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about ?100 MPa to about 100 MPa.
    Type: Application
    Filed: August 10, 2016
    Publication date: April 13, 2017
    Inventors: Prashant Kumar KULSHRESHTHA, Ziqing DUAN, Karthik Thimmavajjula NARASIMHA, Kwangduk Douglas LEE, Bok Hoen KIM
  • Publication number: 20170092511
    Abstract: Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield.
    Type: Application
    Filed: February 2, 2016
    Publication date: March 30, 2017
    Inventors: Saptarshi BASU, Jeongmin LEE, Paul CONNORS, Dale R. DU BOIS, Prashant Kumar KULSHRESHTHA, Karthik Thimmavajjula NARASIMHA, Brett BERENS, Kalyanjit GHOSH, Jianhua ZHOU, Ganesh BALASUBRAMANIAN, Kwangduk Douglas LEE, Juan Carlos ROCHA-ALVAREZ, Hiroyuki OGISO, Liliya KRIVULINA, Rick GILBERT, Mohsin WAQAR, Venkatanarayana SHANKARAMURTHY, Hari K. PONNEKANTI
  • Publication number: 20170069464
    Abstract: Implementations of the present disclosure generally relate to methods and apparatus for generating and controlling plasma, for example RF filters, used with plasma chambers. In one implementation, a plasma processing apparatus is provided. The plasma processing apparatus comprises a chamber body, a powered gas distribution manifold enclosing a processing volume and a radio frequency (RF) filter. A pedestal having a substrate-supporting surface is disposed in the processing volume. A heating assembly comprising one or more heating elements is disposed within the pedestal for controlling a temperature profile of the substrate-supporting surface. A tuning assembly comprising a tuning electrode is disposed within the pedestal between the one or more heating elements and the substrate-supporting surface. The RF filter comprises an air core inductor, wherein at least one of the heating elements, the tuning electrode, and the gas distribution manifold is electrically coupled to the RF filter.
    Type: Application
    Filed: July 19, 2016
    Publication date: March 9, 2017
    Inventors: Zheng John YE, Abdul Aziz KHAJA, Amit Kumar BANSAL, Kwangduk Douglas LEE, Xing LIN, Jianhua ZHOU, Addepalli Sai SUSMITA, Juan Carlos ROCHA-ALVAREZ