Patents by Inventor Kyle Jordan
Kyle Jordan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250232008Abstract: A system for facilitating analysis of dimensionality-reduced data is configurable to: (i) access an input dataset; (ii) generate a plurality of dimensionality-reduced datasets based on the input dataset; (iii) for each particular dimensionality-reduced dataset: generate one or more digital signals and apply digital signal processing to determine one or more relevance scores for the particular dimensionality-reduced dataset; and (iv) (a) generate a report based on the one or more relevance scores associated with each particular dimensionality-reduced dataset or (b) present at least a set of dimensionality-reduced datasets of the plurality of dimensionality-reduced datasets on a user interface, wherein the set of dimensionality-reduced datasets is selected based on the one or more relevance scores associated with the set of dimensionality-reduced datasets satisfying one or more conditions.Type: ApplicationFiled: November 18, 2024Publication date: July 17, 2025Inventors: Connor Clement GREEN, Kyle John CAMLIC, Connor Hamilton BAUGH, Eric Arash AHMADI, Kyle Jordan RUSSELL
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Patent number: 12354883Abstract: Various embodiments disclosed relate to methods of making omni-directional semiconductor interconnect bridges. The present disclosure includes semiconductor assemblies including a mold layer having mold material, a first filler material dispersed in the mold material, and a second filler material dispersed in the mold material, wherein the second filler material is heterogeneously dispersed.Type: GrantFiled: September 24, 2021Date of Patent: July 8, 2025Assignee: Intel CorporationInventors: Bohan Shan, Dingying Xu, Kristof Darmawikarta, Srinivas Venkata Ramanuja Pietambaram, Hongxia Feng, Gang Duan, Jung Kyu Han, Xiaoying Guo, Jeremy D. Ecton, Santosh Tripathi, Bai Nie, Haobo Chen, Kyle Jordan Arrington, Yue Deng, Wei Wei
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Publication number: 20250218880Abstract: Methods for fabricating glass cores with conductive vias (e.g., TGVs), as well as related devices, are disclosed. Methods described herein are based on fabricating pillars of conductive materials (e.g., metals or metal alloys) on a temporary support, inserting the pillars into corresponding via openings in a glass core, and at least partially filling the remaining space in the openings with a filler material.Type: ApplicationFiled: December 29, 2023Publication date: July 3, 2025Inventors: Bohan Shan, Hongxia Feng, Haobo Chen, Jose Waimin, Ryan Carrazzone, Bin Mu, Ziyin Lin, Yiqun Bai, Kyle Jordan Arrington, Srinivas Venkata Ramanuja Pietambaram, Gang Duan, Dingying Xu, Jeremy Ecton, Brandon C. Marin, Xiaoying Guo
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Publication number: 20250210426Abstract: Various techniques for alleviating crack formation and propagation in glass cores of microelectronic assemblies, and related devices and methods, are disclosed. The techniques are based on including fillers into glass cores and/or in layers provided on top and/or bottom of glass cores. The fillers have at least one characteristic indicative of material's resistance to breaking under stress being higher than that of glass, which may provide reinforcement and/or increase stiffness of glass, thereby strengthening glass cores. Examples of such characteristics include material strength, fracture toughness, or elastic modulus.Type: ApplicationFiled: December 20, 2023Publication date: June 26, 2025Applicant: Intel CorporationInventors: Bohan Shan, Mahdi Mohammadighaleni, Hiroki Tanaka, Kyle Jordan Arrington, Yiqun Bai, Whitney Bryks, Ryan Carrazzone, Haobo Chen, Gang Duan, Jeremy Ecton, Hongxia Feng, Xiaoying Guo, Shayan Kaviani, Ziyin Lin, Brandon C. Marin, Robert Alan May, Bin Mu, Bai Nie, Ala Omer, Srinivas Venkata Ramanuja Pietambaram, Dilan Seneviratne, Jose Waimin, Dingying Xu, Ehsan Zamani
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Publication number: 20250183182Abstract: Various techniques for alleviating (e.g., mitigating or reducing) stresses between glass core materials and electrically conductive materials deposited in through-glass vias (TGVs) and related devices and methods are disclosed. In one aspect, a microelectronic assembly includes a glass core having a first face and a second face opposite the first face, and a TGV extending through the glass core between the first face and the second face, wherein the TGV includes a conductive material and a buffer layer between the conductive material and the glass core, wherein a CTE of the buffer layer is smaller than a CTE of the conductive material.Type: ApplicationFiled: November 30, 2023Publication date: June 5, 2025Inventors: Bohan Shan, Mahdi Mohammadighaleni, Joshua Stacey, Ehsan Zamani, Aaditya Candadai, Jacob Vehonsky, Daniel Wandera, Mitchell Page, Srinivas Venkata Ramanuja Pietambaram, Gang Duan, Jeremy Ecton, Brandon C. Marin, Onur Ozkan, Vinith Bejugam, Dhruba Pattadar, Amm Hasib, Nicholas Haehn, Makoyi Watson, Sanjay Tharmarajah, Jason M. Gamba, Yuqin Li, Astitva Tripathi, Mohammad Mamunur Rahman, Haifa Hariri, Shayan Kaviani, Logan Myers, Darko Grujicic, Elham Tavakoli, Whitney Bryks, Dilan Seneviratne, Bainye Angoua, Peumie Abeyratne Kuragama, Hongxia Feng, Kyle Jordan Arrington, Bai Nie, Jose Waimin, Ryan Carrazzone, Haobo Chen, Dingying Xu, Ziyin Lin, Yiqun Bai, Xiaoying Guo, Bin Mu, Thomas S. Heaton, Rahul N. Manepalli
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Patent number: 12277668Abstract: A system for determining volume of a selectable region is configurable to (i) obtain user input directed to a 3D representation of a set of 2D images and (ii) based on the user input, selectively modify one or more mask pixels of one or more respective selection masks. Each 2D image of the set of 2D images is associated with a respective selection mask. The 3D representation represents pixels of the set of 2D images with corresponding voxels. The user input selects one or more voxels of the 3D representation. The one or more mask pixels is associated with one or more pixels of the set of 2D images that correspond to the one or more voxels of the 3D representation selected via the user input.Type: GrantFiled: January 26, 2022Date of Patent: April 15, 2025Assignee: INTUITIVE RESEARCH AND TECHNOLOGY CORPORATIONInventors: James S. Roznick, Kyle Jordan Russell
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Publication number: 20250105074Abstract: Glass cores including protruding through glass vias and related methods are disclosed herein. An example substrate disclosed herein includes a glass core including a surface and a copper through glass via (TGV) extending through the glass core, the TGV including a protrusion extending from the surface.Type: ApplicationFiled: December 11, 2024Publication date: March 27, 2025Applicant: Intel CorporationInventors: Bohan Shan, Haobo Chen, Wei Wei, Jose Fernando Waimin Almendares, Ryan Joseph Carrazzone, Kyle Jordan Arrington, Ziyin Lin, Dingying Xu, Hongxia Feng, Yiqun Bai, Hiroki Tanaka, Brandon Christian Marin, Jeremy Ecton, Benjamin Taylor Duong, Gang Duan, Srinivas Venkata Ramanuja Pietambaram, Rui Zhang, Mohit Gupta
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Publication number: 20250069948Abstract: Metal films, such as molybdenum films are deposited on a semiconductor substrate having one or more recessed features in a deposition process modulated by addition of a halogen-containing compound (e.g., an alkyl halide). In some implementations, a pre-treatment of a substrate with a halogen-containing compound is performed prior to contacting the substrate with a metal-containing precursor and a reducing agent. In some embodiments, the pre-treatment is performed such that the halogen-containing compound modifies the surface of the substrate to a greater degree in a field region of the substrate and near the opening of the recessed feature, as compared to the bottom portion of the recessed feature, where the modification of the substrate inhibits deposition of the metal. As a result, deposition of metals with improved step coverage can be achieved. In some implementations, modulation of deposition by halogen-containing compounds is used to achieve bottom-up metal growth in recessed features.Type: ApplicationFiled: November 30, 2022Publication date: February 27, 2025Applicant: Lam Research CorporationInventors: David Joseph MANDIA, Ishtak KARIM, Kyle Jordan BLAKENEY, Matthew Bertram Edward GRIFFITHS, Chiukin Steven LAI
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Publication number: 20250038003Abstract: Molybdenum-containing films are deposited on semiconductor substrates at relatively low temperatures of between about 100 and about 500° C., such as between about 200 and about 450° C. For example, molybdenum metal can be deposited at this temperature on a substrate having exposed metal and exposed dielectric in a substantially non-selective manner. In one implementation, a substrate having a recessed feature is provided, where the recessed feature has an exposed dielectric on the sidewalls and an exposed metal on the bottom. The substrate is exposed to a molybdenum-containing precursor, a reducing agent, and a silicon-containing reagent, to thereby reduce the molybdenum-containing precursor and form a molybdenum-containing layer that includes metallic molybdenum. The use of the silicon-containing reactant leads to a reduction in on-metal/on-dielectric selectivity of molybdenum deposition.Type: ApplicationFiled: December 2, 2022Publication date: January 30, 2025Applicant: Lam Research CorporationInventors: David Joseph Mandia, Kyle Jordan Blakeney, Chiukin Steven Lai
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Publication number: 20250014967Abstract: Systems, apparatus, articles of manufacture, and methods to improve thermal dissipation and mechanical loading of integrated circuit packages are disclosed. An example apparatus includes: a socket to receive an integrated circuit package; and a plate to apply a load on the integrated circuit package towards the socket. The plate includes an internal channel to carry a coolant through the plate. The liquid coolant is to facilitate cooling of the integrated circuit package.Type: ApplicationFiled: September 23, 2024Publication date: January 9, 2025Applicant: Intel CorporationInventors: Kyle Jordan Arrington, Prabhakar Subrahmanyam, Steven Adam Klein, Kelly Porter Lofgreen, Joseph Blane Petrini
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Publication number: 20240232154Abstract: A system for analyzing distinct datasets with a common index is configurable to (i) receive input data that includes a first set of data and a second set of data that share a common index; (ii) perform a clustering operation on the first set of data to generate a set of clustered data comprising groups representing related datapoints; (iii) identify a set of occurrences within the second set of data (where each occurrence is associated with a respective set of coordinates in the common index), (iv) for each of the set of occurrences: (a) localize search space(s) in the common index using the respective set of coordinates for the occurrence, and (b) facilitate analysis of group(s) of the set of clustered data that are located within the search space(s) to determine whether a relationship exists between the group(s) and the occurrence.Type: ApplicationFiled: December 27, 2023Publication date: July 11, 2024Inventors: Andrew Craig Hardwick, Kyle Jordan Russell
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Publication number: 20240222136Abstract: Mechanical or chemical processes can form roughened surfaces which can be used for coupling layers of electrical systems such as when forming dies, substrates, computer chips or the like that, when subjected to high stress, are robust enough to remain coupled together.Type: ApplicationFiled: December 29, 2022Publication date: July 4, 2024Inventors: Bohan Shan, Haobo Chen, Srinivas Venkata Ramanuja Pietambaram, Hongxia Feng, Gang Duan, Xiaoying Guo, Ashay A. Dani, Yiqun Bai, Dingying Xu, Bai Nie, Kyle Jordan Arrington, Wei Wei, Ziyin Lin
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Publication number: 20240219655Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.Type: ApplicationFiled: December 28, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Haobo Chen, Bohan Shan, Bai Nie, Brandon C. Marin, Dingying Xu, Gang Duan, Hongxia Feng, Jeremy D. Ecton, Kristof Darmawikarta, Kyle Jordan Arrington, Srinivas Venkata Ramanuja Pietambaram, Xiaoying Guo, Yiqun Bai, Ziyin Lin
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Publication number: 20240219659Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.Type: ApplicationFiled: December 28, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Ziyin Lin, Yiqun Bai, Bohan Shan, Kyle Jordan Arrington, Haobo Chen, Dingying Xu, Robert Alan May, Gang Duan, Bai Nie, Srinivas Venkata Ramanuja Pietambaram
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Publication number: 20240222238Abstract: An integrated circuit device substrate includes a glass substrate with a first major surface comprising a plateau region, a cavity region, and a wall between the plateau region and the cavity region. The first major surface includes thereon a first dielectric region, and the plateau region includes a plurality of conductive pillars. A second major surface of the glass substrate opposite the first major surface includes thereon a second dielectric layer, wherein the second dielectric layer includes at least one dielectric-free window underlying the cavity region.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Bohan Shan, Haobo Chen, Srinivas Venkata Ramanuja Pietambaram, Bai Nie, Gang Duan, Kyle Jordan Arrington, Ziyin Lin, Hongxia Feng, Yiqun Bai, Xiaoying Guo, Dingying Xu
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Publication number: 20240222210Abstract: An integrated circuit device substrate includes a first glass layer, a second glass layer, and a dielectric interface layer between the first glass layer and the second glass layer. A plurality of conductive pillars extend through the first glass layer, the dielectric layer and the second glass layer, wherein the conductive pillars taper from a first diameter in the dielectric layer to a second diameter in the first glass layer and the second glass layer, and wherein the first diameter is greater than the second diameter.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Bohan Shan, Haobo Chen, Bai Nie, Srinivas Venkata Ramanuja Pietambaram, Gang Duan, Kyle Jordan Arrington, Ziyin Lin, Hongxia Feng, Yiqun Bai, Xiaoying Guo, Dingying Xu, Kristof Darmawikarta
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Publication number: 20240219654Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.Type: ApplicationFiled: December 28, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Ziyin Lin, Yiqun Bai, Bohan Shan, Kyle Jordan Arrington, Haobo Chen, Dingying Xu, Robert Alan May, Gang Duan, Bai Nie, Srinivas Venkata Ramanuja Pietambaram
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Publication number: 20240219656Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.Type: ApplicationFiled: December 28, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Ziyin Lin, Yiqun Bai, Bohan Shan, Kyle Jordan Arrington, Haobo Chen, Dingying Xu, Robert Alan May, Gang Duan, Bai Nie, Srinivas Venkata Ramanuja Pietambaram
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Publication number: 20240219660Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.Type: ApplicationFiled: December 28, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Bohan Shan, Hongxia Feng, Haobo Chen, Yiqun Bai, Dingying Xu, Eric J.M. Moret, Robert Alan May, Srinivas Venkata Ramanuja Pietambaram, Tarek A. Ibrahim, Gang Duan, Xiaoying Guo, Ziyin Lin, Bai Nie, Kyle Jordan Arrington, Bin Mu
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Publication number: 20240222243Abstract: An integrated circuit device substrate includes a first glass layer with a redistribution layer mounting region and an integrated circuit device mounting region, wherein a first major surface of the first glass layer is overlain by a first dielectric layer, and wherein the first glass layer includes a first plurality of conductive pillars. A second glass layer is on the redistribution layer mounting region on the first glass layer, wherein the second glass layer includes a second dielectric layer on a second major surface thereof, and wherein the second dielectric layer is bonded to the first dielectric layer on the first major surface of the first glass layer, the second glass layer including a second plurality of conductive pillars electrically interconnected with the first plurality of conductive pillars in the first glass layer.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Bohan Shan, Haobo Chen, Bai Nie, Srinivas Venkata Ramanuja Pietambaram, Gang Duan, Kyle Jordan Arrington, Ziyin Lin, Hongxia Feng, Yiqun Bai, Xiaoying Guo, Dingying Xu, Kristof Darmawikarta