Patents by Inventor Kyle K. Kirby

Kyle K. Kirby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190172725
    Abstract: A semiconductor device assembly and method of forming a semiconductor device assembly that includes a first substrate, a second substrate disposed over the first substrate, at least one interconnect between the substrates, and at least one pillar extending from the bottom surface of the first substrate. The pillar is electrically connected to the interconnect and is located adjacent to a side of the first substrate. The pillar is formed by filling a via through the substrate with a conductive material. The first substrate may include an array of pillars extending from the bottom surface adjacent to a side of the substrate that are formed from a plurality of filled vias. The substrate may include a test pad located on the bottom surface or located on the top surface. The pillars may include a removable coating enabling the pillars to be probed without damaging the inner conductive portion of the pillar.
    Type: Application
    Filed: December 4, 2017
    Publication date: June 6, 2019
    Inventors: Owen R. Fay, Akshay N. Singh, Kyle K. Kirby
  • Publication number: 20190131260
    Abstract: A substrate or semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a solder cup. The semiconductor device assembly includes a substrate disposed over another substrate. At least one solder cup extends from one substrate towards an under bump metal (UBM) on the other substrate. The barrier on the exterior of the solder cup may be a standoff to control a bond line between the substrates. The barrier may reduce solder bridging during the formation of a semiconductor device assembly. The barrier may help to align the solder cup with a UBM when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of substrates and/or semiconductor devices.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventor: Kyle K. Kirby
  • Publication number: 20190051569
    Abstract: An interconnect assembly includes a bond pad and an interconnect structure configured to electrically couple an electronic structure to the bond pad. The interconnect structure physically contacts areas of the bond pad that are located outside of a probe contact area that may have been damaged during testing. Insulating material covers the probe contact area and defines openings spaced apart from the probe contact area. The interconnect structure extends through the openings to contact the bond pad.
    Type: Application
    Filed: October 16, 2018
    Publication date: February 14, 2019
    Inventors: Owen R. Fay, Kyle K. Kirby, Luke G. England, Jaspreet S. Gandhi
  • Publication number: 20190027437
    Abstract: A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.
    Type: Application
    Filed: September 21, 2018
    Publication date: January 24, 2019
    Inventor: Kyle K. Kirby
  • Patent number: 10157830
    Abstract: A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 18, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Kyle K. Kirby
  • Publication number: 20180342477
    Abstract: Microelectronic devices and methods for filling vias and forming conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece having a plurality of dies and at least one passage extending through the microfeature workpiece from a first side of the microfeature workpiece to an opposite second side of the microfeature workpiece. The method can further include forming a conductive plug in the passage adjacent to the first side of the microelectronic workpiece, and depositing conductive material in the passage to at least generally fill the passage from the conductive plug to the second side of the microelectronic workpiece.
    Type: Application
    Filed: August 6, 2018
    Publication date: November 29, 2018
    Inventors: William M. Hiatt, Kyle K. Kirby
  • Patent number: 10134647
    Abstract: An interconnect assembly includes a bond pad and an interconnect structure configured to electrically couple an electronic structure to the bond pad. The interconnect structure physically contacts areas of the bond pad that are located outside of a probe contact area that may have been damaged during testing. Insulating material covers the probe contact area and defines openings spaced apart from the probe contact area. The interconnect structure extends through the openings to contact the bond pad.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: November 20, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Owen R. Fay, Kyle K. Kirby, Luke G. England, Jaspreet S. Gandhi
  • Patent number: 10134671
    Abstract: A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: November 20, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Kyle K. Kirby
  • Publication number: 20180323144
    Abstract: A semiconductor device comprising first and second dies is provided. The first die includes a first through-substrate via (TSV) extending at least substantially through the first die and a first substantially helical conductor disposed around the first TSV. The second die includes a second TSV coupled to the first TSV and a second substantially helical conductor disposed around the second TSV. The first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 8, 2018
    Inventor: Kyle K. Kirby
  • Publication number: 20180323146
    Abstract: A semiconductor device comprising first and second dies is provided. The first die includes a first through-substrate via (TSV) extending at least substantially through the first die and a first substantially helical conductor disposed around the first TSV. The second die includes a second TSV coupled to the first TSV and a second substantially helical conductor disposed around the second TSV. The first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.
    Type: Application
    Filed: June 13, 2018
    Publication date: November 8, 2018
    Inventor: Kyle K. Kirby
  • Publication number: 20180323253
    Abstract: A semiconductor device comprising a substrate and a substantially spiral-shaped conductor is provided. The substantially spiral-shaped conductor extends substantially into the substrate and has a spiral axis substantially perpendicular to a surface of the substrate. The substantially spiral-shaped conductor can be configured to be wirelessly coupled to another substantially spiral-shaped conductor in another semiconductor device.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 8, 2018
    Inventor: Kyle K. Kirby
  • Publication number: 20180323145
    Abstract: A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 8, 2018
    Inventor: Kyle K. Kirby
  • Publication number: 20180323133
    Abstract: A semiconductor device includes a substrate, a plurality of circuit elements on a front side of the substrate, and a first substantially spiral-shaped conductor on a back side of the substrate is provided. The device further includes a first through-substrate via (TSV) electrically connecting a first end of the substantially spiral-shaped conductor to a first one of the plurality of circuit elements, and a second TSV electrically connecting a second end of the substantially spiral-shaped conductor to a second one of the plurality of circuit elements. The device may be a package further including a second die having a front side on which is disposed a second substantially spiral-shaped conductor. The front side of the second die is disposed facing the back side of the substrate, such that the first and second substantially spiral-shaped conductors are configured to wirelessly communicate.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 8, 2018
    Inventor: Kyle K. Kirby
  • Publication number: 20180323369
    Abstract: A semiconductor device comprising a substrate is provided. The device further comprises a through-substrate via (TSV) extending into the substrate, and a substantially helical conductor disposed around the TSV. The substantially helical conductor can be configured to generate a magnetic field in the TSV in response to a current passing through the helical conductor. More than one TSV can be included, and/or more than one substantially helical conductor can be provided.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 8, 2018
    Inventor: Kyle K. Kirby
  • Publication number: 20180323147
    Abstract: A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.
    Type: Application
    Filed: June 13, 2018
    Publication date: November 8, 2018
    Inventor: Kyle K. Kirby
  • Patent number: 10121739
    Abstract: A semiconductor device comprising first and second dies is provided. The first die includes a first through-substrate via (TSV) extending at least substantially through the first die and a first substantially helical conductor disposed around the first TSV. The second die includes a second TSV coupled to the first TSV and a second substantially helical conductor disposed around the second TSV. The first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: November 6, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Kyle K. Kirby
  • Patent number: 10020287
    Abstract: Pass-through interconnect structures for microelectronic dies and associated systems and methods are disclosed herein. In one embodiment, a microelectronic die assembly includes a support substrate, a first microelectronic die positioned at least partially over the support substrate, and a second microelectronic die positioned at least partially over the first die. The first die includes a semiconductor substrate, a conductive trace extending over a portion of the semiconductor substrate, a substrate pad between the trace and the portion of the semiconductor substrate, and a through-silicon via (TSV) extending through the trace, the substrate pad, and the portion of the semiconductor substrate. The second die is electrically coupled to the support substrate via a conductive path that includes the TSV.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: July 10, 2018
    Assignee: Micron Technology, Inc.
    Inventors: David S. Pratt, Kyle K. Kirby, Dewali Ray
  • Publication number: 20180166317
    Abstract: Semiconductor devices are described that have a metal interconnect extending vertically through a portion of the device to the back side of a semiconductor substrate. A top region of the metal interconnect is located vertically below a horizontal plane containing a metal routing layer. Method of fabricating the semiconductor device can include etching a via into a semiconductor substrate, filling the via with a metal material, forming a metal routing layer subsequent to filling the via, and removing a portion of a bottom of the semiconductor substrate to expose a bottom region of the metal filled via.
    Type: Application
    Filed: January 29, 2018
    Publication date: June 14, 2018
    Inventors: Kyle K. Kirby, Kunal R. Parekh
  • Patent number: 9966406
    Abstract: Semiconductor devices may include a semiconductor substrate comprising at least one of transistors and capacitors may be located at an active surface of the semiconductor substrate. An imperforate dielectric material may be located on the active surface, the imperforate dielectric material covering the at least one of transistors and the capacitors. Electrically conductive material in contact openings may be electrically connected to the at least one of transistors and capacitors and extend to a back side surface of the semiconductor substrate. Laterally extending conductive elements may extend over the back side surface of the semiconductor substrate and may be electrically connected to the conductive material in the contact openings.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: May 8, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Kyle K. Kirby, Steve Oliver
  • Publication number: 20180122762
    Abstract: Semiconductor devices with underfill control features, and associated systems and methods. A representative system includes a substrate having a substrate surface and a cavity in the substrate surface, and a semiconductor device having a device surface facing toward the substrate surface. The semiconductor device further includes at least one circuit element electrically coupled to a conductive structure. The conductive structure is electrically connected to the substrate, and the semiconductor device further has a non-conductive material positioned adjacent the conductive structure and aligned with the cavity of the substrate. An underfill material is positioned between the substrate and the semiconductor device. In other embodiments, in addition to or in lieu of the con-conductive material, a first conductive structure is connected within the cavity, and a second conductive structure connected outside the cavity.
    Type: Application
    Filed: October 31, 2016
    Publication date: May 3, 2018
    Inventors: Suresh Yeruva, Kyle K. Kirby, Owen R. Fay, Sameer S. Vadhavkar