Patents by Inventor Kyle Yazzie
Kyle Yazzie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220165686Abstract: An apparatus, comprising an Integrated Circuit (IC) package comprising a dielectric, the IC package has a first surface and an opposing second-surface, wherein the first surface is separated from the second surface by a thickness of the IC package, wherein sidewalls extend along a perimeter and through the thickness between the first surface and the second surface, and a structure comprising a frame that extends at least partially along the perimeter of the IC package, wherein the structure extends at least through the thickness of the IC package and inwardly from the sidewalls of the IC package.Type: ApplicationFiled: February 10, 2022Publication date: May 26, 2022Applicant: Intel CorporationInventors: Jimin Yao, Kyle Yazzie, Shawna M. Liff
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Patent number: 11327050Abstract: Disclosed herein are systems and methods for mechanical failure monitoring, detection, and classification in electronic assemblies. In some embodiments, a mechanical monitoring apparatus may include: a fixture to receive an electronic assembly; an acoustic sensor; and a computing device communicatively coupled to the acoustic sensor, wherein the acoustic sensor is to detect an acoustic emission waveform generated by a mechanical failure of the electronic assembly during testing.Type: GrantFiled: February 20, 2018Date of Patent: May 10, 2022Assignee: Intel CorporationInventors: Kyle Yazzie, Rajesh Kumar Neerukatti, Naga Sivakumar Yagnamurthy, David C. McCoy, Pramod Malatkar, Frank P. Prieto
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Patent number: 11322455Abstract: An apparatus, comprising an Integrated Circuit (IC) package comprising a dielectric, the IC package has a first surface and an opposing second-surface, wherein the first surface is separated from the second surface by a thickness of the IC package, wherein sidewalls extend along a perimeter and through the thickness between the first surface and the second surface, and a structure comprising a frame that extends at least partially along the perimeter of the IC package, wherein the structure extends at least through the thickness of the IC package and inwardly from the sidewalls of the IC package.Type: GrantFiled: December 18, 2017Date of Patent: May 3, 2022Assignee: Intel CorporationInventors: Jimin Yao, Kyle Yazzie, Shawna M. Liff
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Patent number: 11322456Abstract: A foundation layer having a stiffener and methods of forming a stiffener are described. One or more dies are formed over the foundation layer. Each die has a front side surface that is electrically coupled to the foundation layer and a back side surface that is opposite from the front side surface. A stiffening layer (or a stiffener) is formed on the back side surface of at least one of the dies. The stiffening layer may be directly coupled to the back side surface of the one or more dies without an adhesive layer. The stiffening layer may include one or more materials, including at least one of a metal, a metal alloy, and a ceramic. The stiffening layer may be formed to reduce warpage based on the foundation layer and the dies. The one or more materials of the stiffening layer can be formed using a cold spray.Type: GrantFiled: June 30, 2017Date of Patent: May 3, 2022Assignee: Intel CorporationInventors: Feras Eid, Venkata Suresh R. Guthikonda, Shankar Devasenathipathy, Chandra M. Jha, Je-Young Chang, Kyle Yazzie, Prasanna Raghavan, Pramod Malatkar
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Patent number: 11022792Abstract: Aspects of the embodiments are directed to coupling a permanent magnet (PM) with a microelectromechanical systems (MEMS) device. In embodiments, an adhesive, such as an epoxy or resin or other adhesive material, can be used to move the PM towards the MEMS device to magnetically couple the PM to the MEMS device. In embodiments, an adhesive that is configured to shrink up on curing can be applied (e.g., using a pick and place tool) to a location between the MEMS device and the PM. As a result of curing, the adhesive can pull the PM towards the MEMS device. In embodiments, an adhesive that is configured to expand as a result of curing can be applied to a location between the PM and a sidewall of the chassis. As a result of curing, the adhesive can push the PM towards the MEMS device. The adhesive can also secure the PM in place.Type: GrantFiled: December 27, 2016Date of Patent: June 1, 2021Assignee: Intel CorporationInventors: Kyle Yazzie, Anna M. Prakash, Suriyakala Ramalingam, Liwei Wang, Robert Starkston, Arnab Choudhury, Sandeep S. Iyer, Amanuel M. Abebaw, Nick Labanok
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Patent number: 10998275Abstract: An apparatus is provided which comprises: a substrate to couple with one or more integrated circuit die(s), an integrated circuit die coupled to the substrate, a metal component coupled to the substrate, wherein the metal component lacks a sealing coating, and a sacrificial metal conductively coupled with the metal component, wherein the sacrificial metal comprises a more anodic metal than the metal component. Other embodiments are also disclosed and claimed.Type: GrantFiled: December 30, 2016Date of Patent: May 4, 2021Assignee: Intel CorporationInventors: Kyle Yazzie, Mohit Mamodia
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Patent number: 10985080Abstract: An electronic package that includes a substrate and an electronic component attached to the substrate. A laminated layer is attached to an upper surface of the substrate such that the laminated layer covers the electronic component. The electronic package may further include a stiffener mounted on the laminated layer where the stiffener is over the electronic component.Type: GrantFiled: November 24, 2015Date of Patent: April 20, 2021Assignee: Intel CorporationInventors: Pramod Malatkar, Kyle Yazzie, Naga Sivakumar Yagnamurthy, Richard J. Harries, Dilan Seneviratne, Praneeth Akkinepally, Xuefei Wan, Yonggang Li, Robert L. Sankman
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Patent number: 10957656Abstract: Disclosed herein are integrated circuit (IC) packages with an electronic component having a patterned protective material on a face, as well as related devices and methods. In some embodiments, a computing device may include: an integrated circuit (IC) package with an electronic component having a protective material on the back face of the electronic component, where the protective material is patterned to include an area on the back face of the electronic component that is not covered by the protective material; a circuit board, where the IC package is electrically coupled to the circuit board; and a heat spreader, where the heat spreader is secured to the circuit board and in thermal contact with the area on the back face of the electronic component that is not covered by the protective material.Type: GrantFiled: September 27, 2017Date of Patent: March 23, 2021Assignee: Intel CorporationInventors: Kyle Yazzie, Naga Sivakumar Yagnamurthy, Pramod Malatkar, Chia-Pin Chiu, Mohit Mamodia, Mark J. Gallina, Rajesh Kumar Neerukatti, Joseph Bautista, Michael Gregory Drake
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Publication number: 20200357752Abstract: Disclosed herein are integrated circuit (IC) packages with an electronic component having a patterned protective material on a face, as well as related devices and methods. In some embodiments, a computing device may include: an integrated circuit (IC) package with an electronic component having a protective material on the back face of the electronic component, where the protective material is patterned to include an area on the back face of the electronic component that is not covered by the protective material; a circuit board, where the IC package is electrically coupled to the circuit board; and a heat spreader, where the heat spreader is secured to the circuit board and in thermal contact with the area on the back face of the electronic component that is not covered by the protective material.Type: ApplicationFiled: September 27, 2017Publication date: November 12, 2020Applicant: Intel CorporationInventors: Kyle Yazzie, Naga Sivakumar Yagnamurthy, Pramod Malatkar, Chia-Pin Chiu, Mohit Mamodia, Mark J. Gallina, Rajesh Kumar Neerukatti, Joseph Bautista, Michael Gregory Drake
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Publication number: 20200066655Abstract: A foundation layer having a stiffener and methods of forming a stiffener are described. One or more dies are formed over the foundation layer. Each die has a front side surface that is electrically coupled to the foundation layer and a back side surface that is opposite from the front side surface. A stiffening layer (or a stiffener) is formed on the back side surface of at least one of the dies. The stiffening layer may be directly coupled to the back side surface of the one or more dies without an adhesive layer. The stiffening layer may include one or more materials, including at least one of a metal, a metal alloy, and a ceramic. The stiffening layer may be formed to reduce warpage based on the foundation layer and the dies. The one or more materials of the stiffening layer can be formed using a cold spray.Type: ApplicationFiled: June 30, 2017Publication date: February 27, 2020Inventors: Feras EID, Venkata Suresh R. GUTHIKONDA, Shankar DEVASENATHIPATHY, Chandra M. JHA, Je-Young CHANG, Kyle YAZZIE, Prasanna RAGHAVAN, Pramod MALATKAR
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Publication number: 20200006256Abstract: An apparatus is provided which comprises: a substrate to couple with one or more integrated circuit die(s), an integrated circuit die coupled to the substrate, a metal component coupled to the substrate, wherein the metal component lacks a sealing coating, and a sacrificial metal conductively coupled with the metal component, wherein the sacrificial metal comprises a more anodic metal than the metal component. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: December 30, 2016Publication date: January 2, 2020Applicant: Intel CorporationInventors: Kyle Yazzie, Mohit Mamodia
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Publication number: 20190391386Abstract: Aspects of the embodiments are directed to coupling a permanent magnet (PM) with a microelectromechanical systems (MEMS) device. In embodiments, an adhesive, such as an epoxy or resin or other adhesive material, can be used to move the PM towards the MEMS device to magnetically couple the PM to the MEMS device. In embodiments, an adhesive that is configured to shrink up on curing can be applied (e.g., using a pick and place tool) to a location between the MEMS device and the PM. As a result of curing, the adhesive can pull the PM towards the MEMS device. In embodiments, an adhesive that is configured to expand as a result of curing can be applied to a location between the PM and a sidewall of the chassis. As a result of curing, the adhesive can push the PM towards the MEMS device. The adhesive can also secure the PM in place.Type: ApplicationFiled: December 27, 2016Publication date: December 26, 2019Applicant: Intel CorporationInventors: Kyle Yazzie, Anna M. Prakash, Suriyakala Ramalingam, Liwei Wang, Robert Starkston, Arnab Choudhury, Sandeep S. Iyer, Amanuel M. Abebaw, Nick Labanok
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Patent number: 10499461Abstract: A thermal heat for integrated circuit die processing is described that includes a thermal barrier. In one example, the thermal head has a ceramic heater configured to carry an integrated circuit die, a metal base, and a thermal barrier between the heater and the base.Type: GrantFiled: December 21, 2015Date of Patent: December 3, 2019Assignee: Intel CorporationInventors: Mohit Mamodia, Kyle Yazzie, Dingying Xu, Kuang Liu, Paul J. Diglio, Pramod Malatkar
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Publication number: 20190257793Abstract: Disclosed herein are systems and methods for mechanical failure monitoring, detection, and classification in electronic assemblies. In some embodiments, a mechanical monitoring apparatus may include: a fixture to receive an electronic assembly; an acoustic sensor; and a computing device communicatively coupled to the acoustic sensor, wherein the acoustic sensor is to detect an acoustic emission waveform generated by a mechanical failure of the electronic assembly during testing.Type: ApplicationFiled: February 20, 2018Publication date: August 22, 2019Applicant: Intel CorporationInventors: Kyle Yazzie, Rajesh Kumar Neerukatti, Naga Sivakumar Yagnamurthy, David C. McCoy, Pramod Malatkar, Frank P. Prieto
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Publication number: 20190189567Abstract: An apparatus, comprising an Integrated Circuit (IC) package comprising a dielectric, the IC package has a first surface and an opposing second-surface, wherein the first surface is separated from the second surface by a thickness of the IC package, wherein sidewalls extend along a perimeter and through the thickness between the first surface and the second surface, and a structure comprising a frame that extends at least partially along the perimeter of the IC package, wherein the structure extends at least through the thickness of the IC package and inwardly from the sidewalls of the IC package.Type: ApplicationFiled: December 18, 2017Publication date: June 20, 2019Applicant: Intel CorporationInventors: Jimin Yao, Kyle Yazzie, Shawna M. Liff
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Patent number: 10290569Abstract: An apparatus, comprising a first platform comprising a first working surface having a first non-planar portion; and a second platform comprising a second working surface having a second non-planar portion, wherein: the second working surface is opposite the first working surface, a distance between the first working surface and the second working surface is adjustable, the first non-planar portion comprises a first curved portion, and the second non-planar portion comprises a second curved portion opposite the first curved portion.Type: GrantFiled: September 29, 2017Date of Patent: May 14, 2019Assignee: Intel CorporationInventors: Kyle Yazzie, Venkata Suresh R. Guthikonda, Patrick Nardi, Santosh Sankarasubramanian, Kevin Y. Lin, Leigh M. Tribolet, John L. Harper, Pramod Malatkar
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Patent number: 10278318Abstract: A method of assembly comprising providing an assembly probe, the assembly probe having an end coupling face; providing a droplet of fluid on the end coupling face of the assembly probe; coupling an electronic component to the end coupling face of the assembly probe with the fluid droplet, the electronic component having a peripheral dimension equal to or less than 2 mm in each of length, width and height; placing the electronic component on a substrate with the assembly probe; decoupling the electronic component from the end coupling face of the assembly probe; and assembling the electronic component to the substrate.Type: GrantFiled: December 18, 2015Date of Patent: April 30, 2019Assignee: Intel CorporationInventors: Kyle Yazzie, Pramod Malatkar, Xiao Lu, Daniel Chavez-Clemente
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Publication number: 20190103345Abstract: An apparatus, comprising a first platform comprising a first working surface having a first non-planar portion; and a second platform comprising a second working surface having a second non-planar portion, wherein: the second working surface is opposite the first working surface, a distance between the first working surface and the second working surface is adjustable, the first non-planar portion comprises a first curved portion, and the second non-planar portion comprises a second curved portion opposite the first curved portion.Type: ApplicationFiled: September 29, 2017Publication date: April 4, 2019Inventors: Kyle YAZZIE, Venkata Suresh R. GUTHIKONDA, Patrick NARDI, Santosh SANKARASUBRAMANIAN, Kevin Y. LIN, Leigh M. TRIBOLET, John L. HARPER, Pramod MALATKAR
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Publication number: 20180350709Abstract: An electronic package that includes a substrate and an electronic component attached to the substrate. A laminated layer is attached to an upper surface of the substrate such that the laminated layer covers the electronic component. The electronic package may further include a stiffener mounted on the laminated layer where the stiffener is over the electronic component.Type: ApplicationFiled: November 24, 2015Publication date: December 6, 2018Inventors: Pramod Malatkar, Kyle Yazzie, Naga Sivakumar Yagnamurthy, Richard J. Harries, Dilan Seneviratne, Praneeth Akkinepally, Xuefei Wan, Yonggang Li, Robert L. Sankman
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Publication number: 20180322993Abstract: A magnetic pick and place probe includes an outer sheath, an inner sheath to vertically slide within the outer sheath, None or more sheath magnets attached to a bottom end of the inner sheath and a tip positioned at a bottom end of the outer sheath to simultaneously pick up an array of magnets for placement on a substrate.Type: ApplicationFiled: December 21, 2015Publication date: November 8, 2018Inventors: Kyle YAZZIE, Pramod MALATKAR