Abstract: A transistor is disclosed that includes an active layer and a gate electrode. The active layer includes a first conductor layer including metal atoms, a layer of semiconductor material disposed above the first conductor layer, and a second conductor layer disposed above the semiconductor material layer and including the metal atoms. The gate electrode overlaps a part of the active layer and is electrically insulated from the active layer.

Abstract: The present disclosure relates to a novel integrate-and-fire (IF) neuron circuit using a single-gated feedback field-effect transistor (FBFET) to realize small size and low power consumption. According to the present disclosure, the neuron circuit according to one embodiment may generate potential by charging current input from synapses through a capacitor. In this case, when the generated potential exceeds a threshold value, the neuron circuit may generate and output a spike voltage corresponding to the generated potential using a single-gated feedback field-effect transistor connected to the capacitor. Then, the neuron circuit may reset the generated spike voltage using transistors connected to the feedback field-effect transistor.

Abstract: The present disclosure relates to an energy harvesting technology for generating electrical energy by using a combination of a solar cell and a thermoelectric device. An energy harvesting system according to one embodiment of the present disclosure may include a solar cell for generating electrical energy based on sunlight; a heat transfer layer formed on at least one edge portion of the upper surface of the solar cell on which sunlight is incident; and a thermoelectric device including a first electrode, a second electrode, a thermoelectric channel disposed between the first and second electrodes, having a horizontal structure in which the first electrode is disposed on the heat transfer layer to be arranged horizontally with respect to the solar cell, and configured to generate additional electrical energy based on the temperature difference between the first and second electrodes.

Abstract: Disclosed is technology that is driven using a positive feedback loop of a feedback field-effect transistor and is capable of performing a logic-in memory function. The logic-in-memory inverter includes a metal oxide semiconductor field-effect transistor, and a feedback field-effect transistor in which a drain region of a nanostructure is connected in series to a drain region of the metal oxide semiconductor field-effect transistor, wherein the logic-in-memory inverter performs a logical operation is performed based on an output voltage VOUT that changes depending on a level of an input voltage VIN that is input to a gate electrode of the feedback field-effect transistor and a gate electrode of the metal oxide semiconductor field-effect transistor while a source voltage VSS is input to a source region of the nanostructure and a drain voltage VDD is input to a source region of the metal oxide semiconductor field-effect transistor.

Abstract: The present disclosure relates to an energy harvesting system for generating electrical energy by using a solar cell and a thermoelectric device. The energy harvesting system according to one embodiment of the present disclosure may include a solar cell for generating electrical energy based on sunlight; an interface layer located under the solar cell and including a heat transfer layer for transferring heat generated by the solar cell; a thermoelectric device located under the interface layer, including a first electrode, a second electrode, and a thermoelectric channel located between the first and second electrodes, and configured to generate electrical energy based on a temperature difference between the first and second electrodes that occurs when heat generated by the solar cell is transferred to the first electrode through the heat transfer layer; and a cooling layer located under the thermoelectric device and cooling the second electrode to increase the temperature difference.

Abstract: The present disclosure relates to an integrated dual-sided all-in-one energy system including a plurality of vertically stacked dual-sided all-in-one energy apparatuses, each including an energy-harvesting device and an energy-storage device disposed on both sides of a substrate, and according to one embodiment of the present disclosure, an integrated dual-sided all-in-one energy system may include a plurality of dual-sided all-in-one energy apparatuses, each including an energy-harvesting device that is formed as an electrode pattern on one side of a substrate and generates electrical energy by harvesting energy based on a temperature difference between a first side and a second side and an energy-storage device that is formed on the other side of the substrate and is selectively connected to the energy-harvesting device based on the electrode pattern to store the generated electrical energy.

Abstract: Disclosed is technology that is driven using a positive feedback loop of a feedback field-effect transistor and is capable of performing a logic-in memory function. The logic-in-memory inverter includes a metal oxide semiconductor field-effect transistor, and a feedback field-effect transistor in which a drain region of a nanostructure is connected in series to a drain region of the metal oxide semiconductor field-effect transistor, wherein the logic-in-memory inverter performs a logical operation is performed based on an output voltage VOUT that changes depending on a level of an input voltage VIN that is input to a gate electrode of the feedback field-effect transistor and a gate electrode of the metal oxide semiconductor field-effect transistor while a source voltage VSS is input to a source region of the nanostructure and a drain voltage VDD is input to a source region of the metal oxide semiconductor field-effect transistor.

Abstract: The present disclosure relates to an energy harvesting technology for generating electrical energy by using a combination of a solar cell and a thermoelectric device. An energy harvesting system according to one embodiment of the present disclosure may include a solar cell for generating electrical energy based on sunlight; a heat transfer layer formed on at least one edge portion of the upper surface of the solar cell on which sunlight is incident; and a thermoelectric device including a first electrode, a second electrode, a thermoelectric channel disposed between the first and second electrodes, having a horizontal structure in which the first electrode is disposed on the heat transfer layer to be arranged horizontally with respect to the solar cell, and configured to generate additional electrical energy based on the temperature difference between the first and second electrodes.

Abstract: The present disclosure relates to a novel neuron circuit using a p-n-p-n diode to realize small size and low power consumption. The neuron circuit according to one embodiment of the present disclosure may generate potential by charging current input from synapses through a capacitor. In this case, when the generated potential exceeds a critical value, the neuron circuit may generate and output a spike voltage corresponding to the generated potential using a p-n-p-n diode connected to the capacitor.

Abstract: The present disclosure relates to a reconfigurable logic-in-memory device using a silicon transistor, according to the embodiment of the present disclosure, the reconfigurable logic-in-memory device using a silicon transistor comprises the silicon transistor including a drain region, a first channel region, a second channel region, a source region, and a gate region, wherein the silicon transistor performs a first channel operation while forming a first positive feedback loop in which an electron is a majority carrier in the first channel region and the second channel region depending on a level of a gate voltage Vin applied through the gate region or performs a second channel operation while forming a second positive feedback loop in which a hole is a majority carrier in the first channel region and the second channel region depending on the level of a gate voltage Vin applied through the gate region.

Abstract: Provided is a spike pulse generation circuit comprising a single silicon device configured to non-periodically or periodically generate a spike pulse. More particularly, the spike pulse generation circuit comprising the single silicon device can utilize a positive feedback loop and a negative feedback loop to be mutually connected so as to selectively output a spike pulse related to a neural oscillation function similar to biological oscillation, thereby being capable of serving as a ring oscillator and performing a neuron function operation.

Abstract: The present disclosure relates to an integrated dual-sided all-in-one energy system including a plurality of vertically stacked dual-sided all-in-one energy apparatuses, each including an energy-harvesting device and an energy-storage device disposed on both sides of a substrate, and according to one embodiment of the present disclosure, an integrated dual-sided all-in-one energy system may include a plurality of dual-sided all-in-one energy apparatuses, each including an energy-harvesting device that is formed as an electrode pattern on one side of a substrate and generates electrical energy by harvesting energy based on a temperature difference between a first side and a second side and an energy-storage device that is formed on the other side of the substrate and is selectively connected to the energy-harvesting device based on the electrode pattern to store the generated electrical energy.

Abstract: Provided is a spike pulse generation circuit comprising a single silicon device configured to non-periodically or periodically generate a spike pulse. More particularly, the spike pulse generation circuit comprising the single silicon device can utilize a positive feedback loop and a negative feedback loop to be mutually connected so as to selectively output a spike pulse related to a neural oscillation function similar to biological oscillation, thereby being capable of serving as a ring oscillator and performing a neuron function operation.

Abstract: The present disclosure relates to a novel neuron circuit using a p-n-p-n diode to realize small size and low power consumption. The neuron circuit according to one embodiment of the present disclosure may generate potential by charging current input from synapses through a capacitor. In this case, when the generated potential exceeds a critical value, the neuron circuit may generate and output a spike voltage corresponding to the generated potential using a p-n-p-n diode connected to the capacitor.

Abstract: The present disclosure relates to a novel integrate-and-fire (IF) neuron circuit using a single-gated feedback field-effect transistor (FBFET) to realize small size and low power consumption. According to the present disclosure, the neuron circuit according to one embodiment may generate potential by charging current input from synapses through a capacitor. In this case, when the generated potential exceeds a threshold value, the neuron circuit may generate and output a spike voltage corresponding to the generated potential using a single-gated feedback field-effect transistor connected to the capacitor. Then, the neuron circuit may reset the generated spike voltage using transistors connected to the feedback field-effect transistor.

Abstract: The present disclosure discloses a feedback field-effect electronic device using a feedback loop operation and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the array circuit includes a plurality of feedback field-effect electronic devices in which the source region of a diode structure and the drain region of an access electronic device are connected in series, wherein the diode structure is connected to a bit line and a first word line, the access electronic device is connected to a source line and a second word line, and a random access operation is performed by selectively applying voltage to the bit line and the first and second word lines.

Abstract: The present invention provides a thermoelectric micro-supercapacitor integrated device comprising: a thermoelectric power generation module comprising a thermoelectric unit body including a thermoelectric channel interposed between two different heat sources and disposed on a substrate, the thermoelectric channel being composed of an n-type or p-type semiconductor; and a micro-supercapacitor module configured to be operated in cooperation with the thermoelectric power generation module and including a pair of collector electrodes between which an electric potential difference is generated through the thermoelectric channel.

Abstract: The present disclosure discloses a feedback field-effect array device capable of converting between volatile and non-volatile operations and an array circuit using the same. According to one embodiment of the present disclosure, the array circuit may include a plurality of feedback field-effect array devices, wherein the source region of the feedback field-effect electronic device and the drain region of an access electronic device may be connected to each other in series, the feedback field-effect electronic device may be connected to a bit line and a first word line, the access electronic device may be connected to a source line and a second word line, and any one of first and second gate voltages may be applied to the first word line to store data in a first logic state or data in a second logic state.

Abstract: The present disclosure discloses a transposable feedback field-effect electronic device and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the feedback field-effect electronic device may include a diode structure, a plurality of gate electrodes, and a plurality of access electronic devices, wherein, when the diode structure receives voltage through a first gate electrode of the gate electrodes and a first access electronic device of the access electronic devices, first direction access may be performed, and when the diode structure receives voltage through a second gate electrode of the gate electrodes and a second access electronic device of the access electronic devices, second direction access may be performed.

Abstract: The present disclosure discloses a feedback field-effect electronic device using a feedback loop operation and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the array circuit includes a plurality of feedback field-effect electronic devices in which the source region of a diode structure and the drain region of an access electronic device are connected in series, wherein the diode structure is connected to a bit line and a first word line, the access electronic device is connected to a source line and a second word line, and a random access operation is performed by selectively applying voltage to the bit line and the first and second word lines.