Abstract: A method for manufacturing a semiconductor memory device includes sequentially depositing a bottom electrode layer, a magnetic tunnel junction (MTJ) layer, a first top electrode layer, a second top electrode layer and a mask layer, etching the mask layer and forming a mask pattern, etching the second top electrode layer and the first top electrode layer by using the mask pattern as an etch barrier, etching the MTJ layer by using the mask layer and the second top electrode layer as an etch barrier, and etching the bottom electrode layer by using the first top electrode layer as an etch barrier.

Abstract: An image display apparatus and a channel information display method thereof are discussed. According to an embodiment, the method includes displaying an image from a selected channel on at least one region of a screen; sequentially receiving, by a tuner, images from a plurality of channels; storing the received images in a storage unit; and displaying the stored images from the plurality of channels simultaneously on at least multiple regions of the screen in response to a channel information function.

Abstract: A camera module test and focus controlling apparatus includes: a base with four actuators therein; a socket frame on one upper side of the base, and rotated by a first actuator; socket boards on both sides of the frame, lifted and lowered by a second actuator, and mounted with a camera module; a collet unit on the upper part of the base, disposed in vertical alignment with the boards, and rotated by a fourth actuator on the base; a rotational shaft on the base upper part, and connected to one side of a third actuator; a plate on an upper part of the shaft rotated by the third actuator, having a lens and an illuminating unit thereon; a first chart unit on the plate; and a second chart unit parallel with the base upper part, fixed to an upper part of a connection member vertically extended from the base.

Abstract: A TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line crossing the gate line to define a pixel region; a drain electrode which is opposite to the source electrode with a channel in between; a semiconductor layer defining the channel between the source electrode and the drain electrode; a pixel electrode in the pixel region and connected to the drain electrode; a channel passivation layer on the channel of the semiconductor layer; a gate pad extending from the gate line, where a semiconductor pattern and a transparent conductive pattern are formed; a data pad connected to the data line, where the transparent conductive pattern is formed; and a gate insulating layer formed under the semiconductor layer, the gate line and the gate pad, and the data line and the data pad.

Abstract: A method for fabricating a semiconductor device includes forming a bottom-electrode metal layer over a substrate, planarizing the bottom-electrode metal layer by a first thickness through a chemical mechanical polishing (CMP) process, etching the bottom-electrode metal layer by a second thickness through a wet etching process, forming a plurality of layers of a magnetic tunneling junction (MTJ) element over the bottom-electrode metal layer, forming a top electrode over the plurality of layers, and forming the MTJ element and a bottom electrode by etching the plurality of layers and the bottom-electrode metal layer using the top electrode as an etch mask.

Abstract: A method for manufacturing a semiconductor memory device includes sequentially depositing a bottom electrode layer, a magnetic tunnel junction (MTJ) layer, a first top electrode layer, a second top electrode layer and a mask layer, etching the mask layer and forming a mask pattern, etching the second top electrode layer and the first top electrode layer by using the mask pattern as an etch barrier, etching the MTJ layer by using the mask layer and the second top electrode layer as an etch barrier, and etching the bottom electrode layer by using the first top electrode layer as an etch barrier.

Abstract: Provided is an array substrate for an IPS-mode LCD device and method of fabricating the same that prevents a problem referred to as wavy noise. The IPS-mode LCD device and method have a shorter processing time and low error rate without an increase in fabrication and production costs.

Abstract: A terminal includes an information collection unit to collect execution information of an application; a determination unit to select a first risk determination criterion in association with a first security item, and to determine first risk of the application with respect to the first security item based on the first risk determination criterion and the execution information; and a display unit to display the first risk of the application and the first security item.

Abstract: In a method for fabricating a semiconductor device, a conductive layer is formed on a substrate, where the substrate has a bottom layer formed thereon. A magnetic tunnel junction layer is formed on the conductive layer. The magnetic tunnel junction layer is patterned using an etching gas containing oxygen. An insulating layer is formed by oxidizing the conductive layer exposed outside the patterned magnetic tunnel junction layer using the etching gas.

Abstract: The present invention relates to an apparatus for testing a camera module, and more specifically to a camera module test and focus controlling apparatus.

Abstract: An internal voltage generating circuit is provided. The internal voltage generating circuit of a semiconductor device includes a control signal generating circuit for generating a control signal according to a number of data bits, a comparator for comparing a reference voltage to an internal voltage to generate a driving signal when the control signal is inactivated, a driving signal control circuit for inactivating the driving signal when the control signal is activated, and an internal voltage driving circuit for receiving an external power voltage and generating the internal voltage in response to the driving signal. Therefore, an internal voltage can be turned to a reference voltage level or to an external power voltage level according to the number of data input and/or output bits of a semiconductor device, and even when the number of data input and/or output bits is increased, a data access speed can be improved.

Abstract: An image display apparatus and a channel information display method thereof are discussed. According to an embodiment, the method includes displaying an image from a selected channel on at least one region of a screen; sequentially receiving, by a tuner, images from a plurality of channels; storing the received images in a storage unit; and displaying the stored images from the plurality of channels simultaneously on at least multiple regions of the screen in response to a channel information function.

Abstract: A polyester resin composition having improved transparency, flame retardancy and hardness, and a method for preparation thereof are provided. The composition includes organo-modified nanoclay and a phosphorous-based flame retardant added to a polyester resin. The nanoclay is homogeneously dispersed in the polyester by melt compounding.

Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.

Abstract: An image display apparatus and a channel information display method thereof are discussed. According to an embodiment, the method includes displaying an image from a selected channel on at least one region of a screen; sequentially receiving, by a tuner, images from a plurality of channels; storing the received images in a storage unit; and displaying the stored images from the plurality of channels simultaneously on at least multiple regions of the screen in response to a channel information function.

Abstract: A method for manufacturing a semiconductor memory device includes sequentially depositing a bottom electrode layer, a magnetic tunnel junction (MTJ) layer, a first top electrode layer, a second top electrode layer and a mask layer, etching the mask layer and forming a mask pattern, etching the second top electrode layer and the first top electrode layer by using the mask pattern as an etch barrier, etching the MTJ layer by using the mask layer and the second top electrode layer as an etch barrier, and etching the bottom electrode layer by using the first top electrode layer as an etch barrier.

Abstract: A mobile terminal and a method of forming a human network using the same are provided. The method for forming a human network includes selecting a person of interest from an image; selecting a relay person from the first stored image to which information about the selected person of interest is relayed through facial recognition; and acquiring the personal information for the selected person of interest from a mobile terminal of the selected relay person.

Abstract: A gel-type bird aversion composition consists of, on the basis of weight, 30 to 90% of a thickening agent, 0.01 to 4% of an ultraviolet ray absorbent, 0.1 to 20% of methyl anthranilate, 0.1 to 10% of cinnamon essential oil, 0.1 to 20% of mint essential oil; 5 to 40% by weight of mineral oil or grease; and 1 to 10% by weight of emulsifier.

Abstract: A TFT array substrate is provided. The TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line that crosses the gate line and defines a pixel region; a drain electrode facing the source electrode with a channel between; a semiconductor layer forming the channel in between the source electrode and the drain electrode; a pixel electrode in the pixel region and contacting the drain electrode; a channel passivation layer formed on the semiconductor layer; a gate pad with a gate pad lower electrode that extends from the gate line; and a data pad having a data pad lower electrode separated from the data line.

Abstract: Provided is an array substrate for an IPS-mode LCD device and method of fabricating the same that prevents a problem referred to as wavy noise. The IPS-mode LCD device and method have a shorter processing time and low error rate without an increase in fabrication and production costs.