Patents by Inventor Kyoung Kwon

Kyoung Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060170504
    Abstract: Disclosed herein is a PhotoDiode Integrated Circuit (PDIC) having multiple gain states. The PDIC includes a current-voltage conversion unit, an input amplification stage circuit, a reference resistance unit, a feedback resistance unit, and a switching unit. The current-voltage conversion unit converts a current signal into a voltage signal. The input amplification stage circuit is connected to the current-voltage conversion unit to receive and amplify the voltage signal. The reference resistance unit is connected to the second input terminal of the input amplification stage circuit. The output amplification stage circuit is connected to the output terminal of the input amplification stage circuit. The feedback resistance unit is connected in parallel between the second input terminal and the output terminal of the output amplification stage circuit, and is configured to have a plurality of resistance elements. The switching unit selectively connects the plurality of resistance elements.
    Type: Application
    Filed: April 15, 2005
    Publication date: August 3, 2006
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sang Kim, Kyoung Kwon, Jung Gong, Hyeon Hwang
  • Publication number: 20060171456
    Abstract: A frame-layer rate control method, and a video encoding method and system. In a first-step encoding stage, a QP of a previous frame is used to determine MVs and MB modes for all MBs in a current frame through R-D optimization, and the residual signal is encoded and then decoded for intra prediction. The residual signal is stored and the number of header bits is estimated from the determined MB modes and MVs. Given a target bit-rate for the current frame, a new QP is determined by a rate model. In a second-step encoding stage, the residual signal is encoded and reconstructed for both intra-prediction of subsequent MBs and inter prediction of subsequent frames using the new QP.
    Type: Application
    Filed: January 31, 2005
    Publication date: August 3, 2006
    Inventor: Do-Kyoung Kwon
  • Publication number: 20060119424
    Abstract: Disclosed is a circuit for compensating for an offset voltage of a monitoring photodiode. After the offset voltage is measured in a photodiode test, current source and offset resistors are added according to the measured resistances, thereby compensating for the offset voltage.
    Type: Application
    Filed: March 9, 2005
    Publication date: June 8, 2006
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chang Ha, Kyoung Kwon, Deuk Park, Sang Shin
  • Publication number: 20060118896
    Abstract: Disclosed herein is a photodetector suitable for use in an optical pickup reproducing apparatus, which is capable of detecting short-wavelength light (e.g., light of about 405 nm) from storage media having large capacity, such as BD, with a high efficiency at a high speed, and a method of manufacturing the same.
    Type: Application
    Filed: February 11, 2005
    Publication date: June 8, 2006
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Shin Kang, Kyoung Kwon, Joo Ko
  • Publication number: 20060091407
    Abstract: Disclosed is a multi-wavelength light receiving element. The multi-wavelength light receiving element includes a first type substrate. A first intrinsic layer is positioned on the first type substrate. A heavily-doped second-type buried layer is positioned on the first intrinsic layer. A second intrinsic layer is positioned on the heavily-doped second-type buried layer. A plurality of heavily-doped first-type fingers are shallowly embedded in the second intrinsic layer. A first type has a doped state that is opposite to a second type.
    Type: Application
    Filed: December 22, 2004
    Publication date: May 4, 2006
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joo Ko, Shin Kang, Kyoung Kwon
  • Patent number: 7035079
    Abstract: The present invention provides an MLCC and an MLCC array. The MLCC has desirably low ESL properties by forming the first and second internal electrodes to be spaced apart from each other on the same dielectric layer while overlapping with other first and second internal electrodes on the neighboring dielectric layers, and connecting the first and second internal electrodes to the external terminals provided on the top surface or the bottom surface of the capacitor body through conductive via holes formed in the capacitor body in a stacking direction of the capacitor body.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: April 25, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sang Soo Park, Dong Seok Park, Byoung Hwa Lee, Min Cheol Park, Hyun Ju Yi, Min Kyoung Kwon, Hae Suk Chung, Chang Hoon Shim, Seung Heon Han
  • Publication number: 20050244063
    Abstract: A post processing de-blocking filter includes a threshold determination unit for adaptively determining a plurality of threshold values according to at least differences in quantization parameters QPs of a plurality of adjacent blocks in a received video stream and to a user defined offset (UDO) allowing the threshold levels to be adjusted according to the UDO value; an interpolation unit for performing an interpolation operation to estimate pixel values in an interlaced field if the video stream comprises interlaced video; and a de-blocking filtering unit for determining a filtering range specifying a maximum number of pixels to filter around a block boundary between the adjacent blocks, determining a region mode according to local activity around the block boundary, selecting one of a plurality of at least three filters, and filtering a plurality of pixels around the block boundary according to the filtering range, the region mode, and the selected filter.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventors: Do-Kyoung Kwon, Mei-Yin Shen, Chung-Chieh KUO
  • Publication number: 20050243911
    Abstract: A post processing de-blocking filter includes a threshold determination unit for adaptively determining a plurality of threshold values according to at least differences in quantization parameters QPs of a plurality of adjacent blocks in a received video stream and to a user defined offset (UDO) allowing the threshold levels to be adjusted according to the UDO value; an interpolation unit for performing an interpolation operation to estimate pixel values in an interlaced field if the video stream comprises interlaced video; and a de-blocking filtering unit for determining a filtering range specifying a maximum number of pixels to filter around a block boundary between the adjacent blocks, determining a region mode according to local activity around the block boundary, selecting one of a plurality of at least three filters, and filtering a plurality of pixels around the block boundary according to the filtering range, the region mode, and the selected filter.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventors: Do-Kyoung Kwon, Mei-Yin Shen, Chung-Chieh KUO
  • Publication number: 20050243912
    Abstract: A post processing de-blocking filter includes a threshold determination unit for adaptively determining a plurality of threshold values according to at least differences in quantization parameters QPs of a plurality of adjacent blocks in a received video stream and to a user defined offset (UDO) allowing the threshold levels to be adjusted according to the UDO value; an interpolation unit for performing an interpolation operation to estimate pixel values in an interlaced field if the video stream comprises interlaced video; and a de-blocking filtering unit for determining a filtering range specifying a maximum number of pixels to filter around a block boundary between the adjacent blocks, determining a region mode according to local activity around the block boundary, selecting one of a plurality of at least three filters, and filtering a plurality of pixels around the block boundary according to the filtering range, the region mode, and the selected filter.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventors: Do-Kyoung Kwon, Mei-Yin Shen, Chung-Chieh KUO
  • Publication number: 20050243914
    Abstract: A post processing de-blocking filter includes a threshold determination unit for adaptively determining a plurality of threshold values according to at least differences in quantization parameters QPs of a plurality of adjacent blocks in a received video stream and to a user defined offset (UDO) allowing the threshold levels to be adjusted according to the UDO value; an interpolation unit for performing an interpolation operation to estimate pixel values in an interlaced field if the video stream comprises interlaced video; and a de-blocking filtering unit for determining a filtering range specifying a maximum number of pixels to filter around a block boundary between the adjacent blocks, determining a region mode according to local activity around the block boundary, selecting one of a plurality of at least three filters, and filtering a plurality of pixels around the block boundary according to the filtering range, the region mode, and the selected filter.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventors: Do-Kyoung Kwon, Mei-Yin Shen, Chung-Chieh KUO
  • Publication number: 20050243913
    Abstract: A post processing de-blocking filter includes a threshold determination unit for adaptively determining a plurality of threshold values according to at least differences in quantization parameters QPs of a plurality of adjacent blocks in a received video stream and to a user defined offset (UDO) allowing the threshold levels to be adjusted according to the UDO value; an interpolation unit for performing an interpolation operation to estimate pixel values in an interlaced field if the video stream comprises interlaced video; and a de-blocking filtering unit for determining a filtering range specifying a maximum number of pixels to filter around a block boundary between the adjacent blocks, determining a region mode according to local activity around the block boundary, selecting one of a plurality of at least three filters, and filtering a plurality of pixels around the block boundary according to the filtering range, the region mode, and the selected filter.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventors: Do-Kyoung Kwon, Mei-Yin Shen, Chung-Chieh KUO
  • Publication number: 20050243915
    Abstract: A post processing de-blocking filter includes a threshold determination unit for adaptively determining a plurality of threshold values according to at least differences in quantization parameters QPs of a plurality of adjacent blocks in a received video stream and to a user defined offset (UDO) allowing the threshold levels to be adjusted according to the UDO value; an interpolation unit for performing an interpolation operation to estimate pixel values in an interlaced field if the video stream comprises interlaced video; and a de-blocking filtering unit for determining a filtering range specifying a maximum number of pixels to filter around a block boundary between the adjacent blocks, determining a region mode according to local activity around the block boundary, selecting one of a plurality of at least three filters, and filtering a plurality of pixels around the block boundary according to the filtering range, the region mode, and the selected filter.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventors: Do-Kyoung Kwon, Mei-Yin Shen, Chung-Chieh KUO
  • Publication number: 20050243916
    Abstract: A post processing de-blocking filter includes a threshold determination unit for adaptively determining a plurality of threshold values according to at least differences in quantization parameters QPs of a plurality of adjacent blocks in a received video stream and to a user defined offset (UDO) allowing the threshold levels to be adjusted according to the UDO value; an interpolation unit for performing an interpolation operation to estimate pixel values in an interlaced field if the video stream comprises interlaced video; and a de-blocking filtering unit for determining a filtering range specifying a maximum number of pixels to filter around a block boundary between the adjacent blocks, determining a region mode according to local activity around the block boundary, selecting one of a plurality of at least three filters, and filtering a plurality of pixels around the block boundary according to the filtering range, the region mode, and the selected filter.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventors: Do-Kyoung Kwon, Mei-Yin Shen, Chung-Chieh KUO
  • Publication number: 20050205928
    Abstract: An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transistors are laterally displaced with respect to one another. The output circuit further includes an isolation region in the substrate, disposed between the first and second MOS transistors. A first conductor connects the source region of the first MOS transistor to a power supply node. A second conductor connects the drain region of the first MOS transistor to the source region of the second MOS transistor. A third conductor connects the drain region of the second MOS transistor to an external signal pad of the integrated circuit device. The isolation region may comprise first and second insulation regions surrounding respective ones of the first and second MOS transistors, and a guard ring surrounding and separating the insulation regions.
    Type: Application
    Filed: June 1, 2005
    Publication date: September 22, 2005
    Inventors: Gue-Hyung Kwon, Eun-Kyoung Kwon
  • Patent number: 6914305
    Abstract: An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transistors are laterally displaced with respect to one another. The output circuit further includes an isolation region in the substrate, disposed between the first and second MOS transistors. A first conductor connects the source region of the first MOS transistor to a power supply node. A second conductor connects the drain region of the first MOS transistor to the source region of the second MOS transistor. A third conductor connects the drain region of the second MOS transistor to an external signal pad of the integrated circuit device. The isolation region may comprise first and second insulation regions surrounding respective ones of the first and second MOS transistors, and a guard ring surrounding and separating the insulation regions.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: July 5, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gue-Hyung Kwon, Eun-Kyoung Kwon
  • Patent number: 6875096
    Abstract: Disclosed is a chemical mechanical polishing pad formed with holes, grooves or a combination thereof. The chemical mechanical polishing pad is characterized in that a plurality of concentric circles each having grooves, holes, or a combination thereof are formed at a polishing surface of the polishing pad. The chemical mechanical polishing pad provides effects of effectively controlling a flow of slurry during a polishing process, thereby achieving a stability in the polishing process in terms of a polishing rate, and achieving an enhancement in the planarization of a wafer.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: April 5, 2005
    Assignee: SKC Co., Ltd.
    Inventors: Inha Park, Tae-Kyoung Kwon, Jaeseok Kim
  • Publication number: 20040232121
    Abstract: Disclosed is a method for forming micro-holes, perforated holes, and/or grooves on a polishing pad using a laser beam and a mask. This method involves the steps of determining a pattern of micro-holes, grooves, and/or perforated holes to be formed on a polishing pad, inputting the determined pattern to a computer numerical control (CNC) controller, selecting a mask corresponding to the determined pattern, positioning the mask under a laser device, parallel to the polishing pad, and driving the laser device adapted to irradiate the laser beam and a table adapted to conduct a three-dimensional movement and rotation while supporting the polishing pad, under the control of the CNC controlled, thereby irradiating the laser beam from the laser device through the mask onto the polishing pad according to the inputted pattern.
    Type: Application
    Filed: June 17, 2004
    Publication date: November 25, 2004
    Inventors: Inha Park, Tae-Kyoung Kwon, Jaeseok Kim
  • Patent number: 6794605
    Abstract: Disclosed is a method for forming micro-holes, perforated holes, or grooves on a chemical mechanical polishing pad by a laser. This method involves the steps of determining a pattern of micro-holes, grooves, or perforated holes to be formed on a polishing pad, inputting the determined pattern to a computer numerical control (CNC) controller, and driving a laser device adapted to irradiate a laser beam and a table adapted to conduct a three-dimensional movement and rotation while supporting the polishing pad, under the control of the CNC controller based on the inputted pattern, thereby irradiating the laser beam from the laser device onto the polishing pad supported by the table while moving the table in accordance with the inputted pattern, so that micro-holes, grooves, or perforated holes having a pattern corresponding to the determined pattern are formed on the polishing pad.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: September 21, 2004
    Assignee: SKC Co., LTD
    Inventors: Inha Park, Tae-Kyoung Kwon, Jaeseok Kim, In-Ju Hwang
  • Patent number: 6729950
    Abstract: Disclosed is a chemical mechanical polishing pad formed at a polishing surface thereof with a plurality of concentric wave-shaped grooves having different radiuses while having the same shape. Each groove has a desired depth, width, and shape. The chemical mechanical polishing pad provides effects of effectively controlling a flow of slurry during a polishing process, thereby achieving a stability in the polishing process in terms of a polishing rate, and achieving an enhancement in the planarization of a wafer.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: May 4, 2004
    Assignee: SKC Co., Ltd.
    Inventors: Inha Park, Tae-Kyoung Kwon, Jaeseok Kim, In-Ju Hwang
  • Publication number: 20040058630
    Abstract: Disclosed is a chemical mechanical polishing pad formed with holes, grooves or a combination thereof. The chemical mechanical polishing pad is characterized in that a plurality of concentric circles each having grooves, holes, or a combination thereof are formed at a polishing surface of the polishing pad. The chemical mechanical polishing pad provides effects of effectively controlling a flow of slurry during a polishing process, thereby achieving a stability in the polishing process in terms of a polishing rate, and achieving an enhancement in the planarization of a wafer.
    Type: Application
    Filed: September 3, 2002
    Publication date: March 25, 2004
    Inventors: Inha Park, Tae-Kyoung Kwon, Jaeseok Kim