Patents by Inventor Kyoung-Ryul Yoon

Kyoung-Ryul Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7566608
    Abstract: Methods of forming a zirconium hafnium oxide thin layer on a semiconductor substrate by supplying tetrakis(ethylmethylamino)zirconium ([Zr{N(C2H5)(CH3)}4], TEMAZ) and tetrakis(ethylmethylamino)hafnium ([Hf{N(C2H5)(CH3)}4], TEMAH) to a substrate are provided. The TEMAZ and the TEMAH may be reacted with an oxidizing agent. The thin layer including zirconium hafnium oxide may be used for a gate insulation layer in a gate structure, a dielectric layer in a capacitor, or a dielectric layer in a flash memory device.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: July 28, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Sik Choi, Kyoung-Ryul Yoon, Han-Mei Choi, Ki-Yeon Park, Seung-Hwan Lee, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Patent number: 7560349
    Abstract: A semiconductor device and/or gate structure having a composite dielectric layer and methods of manufacturing the same is provided. In the semiconductor device, gate structure, and methods provided, a first conductive layer may be formed on a substrate. A native oxide layer formed on the first conductive layer may be removed. A surface of the first conductive layer may be nitrided so that the surface may be altered into a nitride layer. A composite dielectric layer including the first and/or second dielectric layers may be formed on the nitride layer. A second conductive layer may be formed on the composite dielectric layer. The first dielectric layer may include a material having a higher dielectric constant. The second dielectric layer may be capable of suppressing crystallization of the first dielectric layer.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: July 14, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Yeon Park, Kyoung-Ryul Yoon, Dae-Sik Choi, Han-Mei Choi, Seung-Hwan Lee
  • Patent number: 7514315
    Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: April 7, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheol Lee, Kyoung-Ryul Yoon, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Jin-Il Lee
  • Patent number: 7425493
    Abstract: A capacitor including a dielectric structure, a lower electrode may be formed on a substrate. The dielectric structure may be formed on the lower electrode, and may include a first thin film, which may improve a morphology of the dielectric structure, and a second thin film, which may have at least one of an EOT larger than that of the first thin film and a dielectric constant higher than that of the first thin film. An upper electrode may be formed on the dielectric structure, and the dielectric structure may have an improved morphology and/or a higher dielectric constant.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: September 16, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Ryul Yoon, Han-Mei Choi, Seung-Hwan Lee, Dae-Sik Choi, Ki-Yeon Park, Young-Sun Kim, Sung-Tae Kim, Cha-Young You
  • Patent number: 7402491
    Abstract: A method of manufacturing a semiconductor device can include forming a tunnel oxide layer on a substrate, forming a floating gate on the tunnel oxide layer and forming a dielectric layer pattern on the floating gate using an ALD process. The dielectric layer pattern can include a metal precursor that includes zirconium and an oxidant. A control gate can be formed on the dielectric layer pattern. The semiconductor device can include the dielectric layer pattern provided herein.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: July 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Mei Choi, Kyoung-Ryul Yoon, Seung-Hwan Lee, Ki-Yeon Park, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Publication number: 20070257370
    Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.
    Type: Application
    Filed: April 11, 2007
    Publication date: November 8, 2007
    Inventors: Jong-Cheol Lee, Kyoung-Ryul Yoon, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Jin-Il Lee
  • Publication number: 20070236863
    Abstract: A capacitor may have a pre-treatment layer formed on a lower electrode, reaction to a dielectric layer and/or deterioration of capacitor characteristics may be suppressed. At least part of the dielectric layer may be oxidized or nitridized after being oxidized, and increases in leakage current may be suppressed. In a method of fabricating a capacitor, a plasma treatment performed before and after the forming of the dielectric layer within the batch-type equipment may cause retention time between the plasma treatment and the deposition of the dielectric layer to be the same or substantially the same for each wafer and/or capacitors may show smaller variations in layer characteristics between wafers.
    Type: Application
    Filed: July 14, 2006
    Publication date: October 11, 2007
    Inventors: Jong-cheol Lee, Young-sun Kim, Jung-hee Chung, Kyoung-ryul Yoon, Ki-vin Im, Jae-hyoung Choi
  • Patent number: 7279392
    Abstract: A thin film structure and a capacitor using the film structure and methods for forming the same. The thin film structure may include a first film formed on a substrate using a first reactant and an oxidant for oxidizing the first reactant. A second film may be formed on the first film to suppress crystallization of the first film. A capacitor may include a dielectric layer, which may further include the first thin film and the second thin film.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: October 9, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Hwan Lee, Kyoung-Ryul Yoon, Han-Mei Choi, Dae-Sik Choi, Ki-Yeon Park, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Publication number: 20070098892
    Abstract: In a method of forming a layer and a method of manufacturing a capacitor using the same, a preliminary zirconium oxide film is formed on a substrate by introducing a first reactant including a zirconium precursor, and a first oxidant onto the substrate. A thermal treatment is performed on the preliminary zirconium oxide film to form a first zirconium oxide film having a dense and crystalline structure. An aluminum oxide film is formed on the first zirconium oxide film by introducing a second reactant including an aluminum precursor, and a second oxidant onto the substrate. The thermally-treated layer including the first zirconium oxide film and the aluminum oxide film may form a dielectric layer of a capacitor.
    Type: Application
    Filed: August 31, 2006
    Publication date: May 3, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Ae CHUNG, Kyoung-Ryul YOON, Ki-Vin IM, Jae-Hyun YEO, Sung-Tae KIM, Young-Sun KIM, Young-Geun PARK
  • Publication number: 20070032013
    Abstract: The present invention provides methods of forming a metal oxide layer and methods of forming a capacitor including the same. The methods of forming the metal oxide include forming a thin layer including a metal oxide, such as zirconium oxide, on a substrate and performing a post-treatment on the thin layer at a temperature at which oxygen present in the metal oxide is hindered from being diffused in the thin layer. Consequently, reduced amounts of byproducts are present on the boundary surface of the thin layer and the substrate thereby improving electrical characteristics of the thin layer.
    Type: Application
    Filed: August 4, 2006
    Publication date: February 8, 2007
    Inventors: Kyoung-Ryul Yoon, Young-Geun Park, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Young-Sun Kim
  • Publication number: 20060252281
    Abstract: A semiconductor device and/or gate structure having a composite dielectric layer and methods of manufacturing the same is provided. In the semiconductor device, gate structure, and methods provided, a first conductive layer may be formed on a substrate. A native oxide layer formed on the first conductive layer may be removed. A surface of the first conductive layer may be nitrided so that the surface may be altered into a nitride layer. A composite dielectric layer including the first and/or second dielectric layers may be formed on the nitride layer. A second conductive layer may be formed on the composite dielectric layer. The first dielectric layer may include a material having a higher dielectric constant. The second dielectric layer may be capable of suppressing crystallization of the first dielectric layer.
    Type: Application
    Filed: March 3, 2006
    Publication date: November 9, 2006
    Inventors: Ki-Yeon Park, Kyoung-Ryul Yoon, Dae-Sik Choi, Han-Mei Choi, Seung-Hwan Lee
  • Publication number: 20060240679
    Abstract: A method of manufacturing a semiconductor device comprises forming a lower electrode on a substrate using a titanium chloride pulsed deposition (TPD) process, forming a high-k dielectric layer on the lower electrode, and forming an upper electrode on the dielectric layer using a TPD process. The method further comprises forming a reaction barrier layer between the upper or lower electrode and the dielectric layer using an atomic layer deposition (ALD) process. The upper electrode is preferably formed with a processing temperature between 350 and 500° C., and the dielectric layer preferably comprises zirconium oxide.
    Type: Application
    Filed: April 14, 2006
    Publication date: October 26, 2006
    Inventors: Seung-Hwan Lee, Kyoung-Ryul Yoon, Han-Mei Choi, Ki-Yeon Park, Young-Sun Kim
  • Publication number: 20060220106
    Abstract: In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.
    Type: Application
    Filed: March 15, 2006
    Publication date: October 5, 2006
    Inventors: Han-Mei Choi, Kyoung-Ryul Yoon, Seung-Hwan Lee, Ki-Yeon Park, Young-Sun Kim
  • Publication number: 20060141695
    Abstract: Methods of forming a zirconium hafnium oxide thin layer on a semiconductor substrate by supplying tetrakis(ethylmethylamino)zirconium ([Zr{N(C2H5)(CH3)}4], TEMAZ) and tetrakis(ethylmethylamino)hafnium ([Hf{N(C2H5)(CH3)}4], TEMAH) to a substrate are provided. The TEMAZ and the TEMAH may be reacted with an oxidizing agent. The thin layer including zirconium hafnium oxide may be used for a gate insulation layer in a gate structure, a dielectric layer in a capacitor, or a dielectric layer in a flash memory device.
    Type: Application
    Filed: November 22, 2005
    Publication date: June 29, 2006
    Inventors: Dae-Sik Choi, Kyoung-Ryul Yoon, Han-Mei Choi, Ki-Yeon Park, Seung-Hwan Lee, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Publication number: 20060094191
    Abstract: A method of manufacturing a semiconductor device can include forming a tunnel oxide layer on a substrate, forming a floating gate on the tunnel oxide layer and forming a dielectric layer pattern on the floating gate using an ALD process. The dielectric layer pattern can include a metal precursor that includes zirconium and an oxidant. A control gate can be formed on the dielectric layer pattern. The semiconductor device can include the dielectric layer pattern provided herein.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 4, 2006
    Inventors: Han-Mei Choi, Kyoung-Ryul Yoon, Seung-Hwan Lee, Ki-Yeon Park, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Publication number: 20050170601
    Abstract: A capacitor including a dielectric structure, a lower electrode may be formed on a substrate. The dielectric structure may be formed on the lower electrode, and may include a first thin film, which may improve a morphology of the dielectric structure, and a second thin film, which may have at least one of an EOT larger than that of the first thin film and a dielectric constant higher than that of the first thin film. An upper electrode may be formed on the dielectric structure, and the dielectric structure may have an improved morphology and/or a higher dielectric constant.
    Type: Application
    Filed: February 17, 2005
    Publication date: August 4, 2005
    Inventors: Kyoung-Ryul Yoon, Han-Mei Choi, Seung-Hwan Lee, Dae-Sik Choi, Ki-Yeon Park, Young-Sun Kim, Sung-Tae Kim, Cha-Young You
  • Publication number: 20050170566
    Abstract: A thin film structure and a capacitor using the film structure and methods for forming the same. The thin film structure may include a first film formed on a substrate using a first reactant and an oxidant for oxidizing the first reactant. A second film may be formed on the first film to suppress crystallization of the first film. A capacitor may include a dielectric layer, which may further include the first thin film and the second thin film.
    Type: Application
    Filed: February 1, 2005
    Publication date: August 4, 2005
    Inventors: Seung-Hwan Lee, Kyoung-Ryul Yoon, Han-Mei Choi, Dae-Sik Choi, Ki-Yeon Park, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo