Patents by Inventor Kyoung-Sun Kim
Kyoung-Sun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240109858Abstract: The present invention relates to a compound capable of lowering the flammability of a non-aqueous electrolyte when included in the non-aqueous electrolyte and improving the life properties of a battery by forming an electrode-electrolyte interface which is stable at high temperatures and low in resistance, and relates to a compound represented by Formula I descried herein, a non-aqueous electrolyte solution and a lithium secondary battery both including the compound, n, m, Ak, and X are described herein.Type: ApplicationFiled: March 23, 2022Publication date: April 4, 2024Applicants: LG Chem, Ltd., LG Energy Solution, Ltd.Inventors: Jung Keun Kim, Su Jeong Kim, Mi Sook Lee, Won Kyun Lee, Duk Hun Jang, Jeong Ae Yoon, Kyoung Hoon Kim, Chul Haeng Lee, Mi Yeon Oh, Kil Sun Lee, Jung Min Lee, Esder Kang, Chan Woo Noh, Chul Eun Yeom
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Patent number: 11941249Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.Type: GrantFiled: June 25, 2021Date of Patent: March 26, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-Woo Kim, Jae Sun No, Byung June Song, Kyoung Back Lee, Wook Han Jeong
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Patent number: 11600776Abstract: An apparatus of fabricating a semiconductor device may include a chamber including a housing and a slit valve used to open or close a portion of the housing, a heater chuck provided in a lower region of the housing and used to heat a substrate, a target provided over the heater chuck, a plasma electrode provided in an upper region of the housing and used to generate plasma on the target, a heat-dissipation shield surrounding the inner wall of the housing between the plasma electrode and the heater chuck, and an edge heating structure provided between the heat-dissipation shield and the inner wall of the housing and configured to heat the heat-dissipation shield and an edge region of the substrate and to reduce a difference in temperature between center and edge regions of the substrate.Type: GrantFiled: September 25, 2020Date of Patent: March 7, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jaeho Jung, Kyoung Sun Kim, Jeonghee Park, Jiho Park, Changyup Park
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Publication number: 20210013410Abstract: An apparatus of fabricating a semiconductor device may include a chamber including a housing and a slit valve used to open or close a portion of the housing, a heater chuck provided in a lower region of the housing and used to heat a substrate, a target provided over the heater chuck, a plasma electrode provided in an upper region of the housing and used to generate plasma on the target, a heat-dissipation shield surrounding the inner wall of the housing between the plasma electrode and the heater chuck, and an edge heating structure provided between the heat-dissipation shield and the inner wall of the housing and configured to heat the heat-dissipation shield and an edge region of the substrate and to reduce a difference in temperature between center and edge regions of the substrate.Type: ApplicationFiled: September 25, 2020Publication date: January 14, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Jaeho JUNG, KYOUNG SUN KIM, JEONGHEE PARK, JIHO PARK, Changyup PARK
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Patent number: 10818839Abstract: An apparatus of fabricating a semiconductor device may include a chamber including a housing and a slit valve used to open or close a portion of the housing, a heater chuck provided in a lower region of the housing and used to heat a substrate, a target provided over the heater chuck, a plasma electrode provided in an upper region of the housing and used to generate plasma on the target, a heat-dissipation shield surrounding the inner wall of the housing between the plasma electrode and the heater chuck, and an edge heating structure provided between the heat-dissipation shield and the inner wall of the housing and configured to heat the heat-dissipation shield and an edge region of the substrate and to reduce a difference in temperature between center and edge regions of the substrate.Type: GrantFiled: October 2, 2018Date of Patent: October 27, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jaeho Jung, Kyoung Sun Kim, Jeonghee Park, Jiho Park, Changyup Park
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Patent number: 10485104Abstract: A printed circuit board (PCB) includes a first insulating layer, a pad disposed on the first insulating layer, and a first reference layer on which the first insulating layer is disposed, the first reference layer including a dielectric passage for forming a return path of a signal that is transmitted to the pad, and a conductive line disposed in the dielectric passage and disposed to form a transmission path of the signal. The PCB further includes a second insulating layer on which the first reference layer is disposed, and a second reference layer on which the second insulating layer is disposed, the second reference layer further forming the return path. A capacitance of the pad corresponds to a distance between the pad and the second reference layer.Type: GrantFiled: August 14, 2018Date of Patent: November 19, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-Min Kim, Do-Hyung Kim, Kyoung-Sun Kim
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Patent number: 10476000Abstract: A method of forming a target layer in semiconductor fabrication is disclosed that includes steps of forming a first layer by performing a first process at least one time and forming a second layer by performing a second process at least one time, wherein the first process may include supplying a first source gas, supplying a second source gas several times, and supplying an inert gas several times.Type: GrantFiled: March 21, 2018Date of Patent: November 12, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jeonghee Park, Kyoung Sun Kim
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Publication number: 20190288203Abstract: An apparatus of fabricating a semiconductor device may include a chamber including a housing and a slit valve used to open or close a portion of the housing, a heater chuck provided in a lower region of the housing and used to heat a substrate, a target provided over the heater chuck, a plasma electrode provided in an upper region of the housing and used to generate plasma on the target, a heat-dissipation shield surrounding the inner wall of the housing between the plasma electrode and the heater chuck, and an edge heating structure provided between the heat-dissipation shield and the inner wall of the housing and configured to heat the heat-dissipation shield and an edge region of the substrate and to reduce a difference in temperature between center and edge regions of the substrate.Type: ApplicationFiled: October 2, 2018Publication date: September 19, 2019Inventors: Jaeho JUNG, KYOUNG SUN KIM, JEONGHEE PARK, JIHO PARK, Changyup PARK
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Publication number: 20190191563Abstract: A printed circuit board (PCB) includes a first insulating layer, a pad disposed on the first insulating layer, and a first reference layer on which the first insulating layer is disposed, the first reference layer including a dielectric passage for forming a return path of a signal that is transmitted to the pad, and a conductive line disposed in the dielectric passage and disposed to form a transmission path of the signal. The PCB further includes a second insulating layer on which the first reference layer is disposed, and a second reference layer on which the second insulating layer is disposed, the second reference layer further forming the return path. A capacitance of the pad corresponds to a distance between the pad and the second reference layer.Type: ApplicationFiled: August 14, 2018Publication date: June 20, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-Min KIM, Do-Hyung KIM, Kyoung-Sun KIM
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Publication number: 20180277758Abstract: A method of forming a target layer in semiconductor fabrication is disclosed that includes steps of forming a first layer by performing a first process at least one time and forming a second layer by performing a second process at least one time, wherein the first process may include supplying a first source gas, supplying a second source gas several times, and supplying an inert gas several times.Type: ApplicationFiled: March 21, 2018Publication date: September 27, 2018Inventors: Jeonghee Park, Kyoung Sun Kim
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Publication number: 20170269402Abstract: The present disclosure relates to a display device in which the same driving voltage is applied to pixels and a manufacturing method thereof. One aspect of a display device comprises a first substrate; a second substrate; and a liquid crystal layer disposed between the first substrate and the second substrate and comprising a plurality of sub-cells, wherein the plurality of sub-cells respectively comprises a cholesteric liquid crystal and a polymer cured to fix a helical pitch of the cholesteric liquid crystal.Type: ApplicationFiled: April 24, 2015Publication date: September 21, 2017Inventors: Hee Yuel ROH, Soon Bum KWON, Kyoung Sun KIM, Yan JIN, Joo Ho KIM, Burm Young LEE, Jun Sung CHUNG
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Patent number: 9689603Abstract: A refrigerator includes a body including a storage chamber; a door that is coupled to the body so as to open/close the storage chamber; a display that is disposed in at least one region of the door and is configured to be converted between a transparent mode and a display mode; and a controller that controls the display to display at least one among a text, an image, and color when the display is in the display mode.Type: GrantFiled: March 30, 2015Date of Patent: June 27, 2017Assignees: SAMSUNG ELECTRONICS CO., LTD., NDIS CORPORATIONInventors: Hee Yuel Roh, Soon-Bum Kwon, Kyoung Sun Kim, Joo Ho Kim, Otsuka Tatsuhiro, Burm-Young Lee
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Patent number: 9577183Abstract: In a method of manufacturing a MRAM device, a lower electrode is formed on a substrate. A first magnetic layer, a tunnel barrier layer, and a second magnetic layer are sequentially formed on the lower electrode layer. An etching mask is formed on the second magnetic layer. An ion beam etching process in which a first ion beam and a second ion beam are simultaneously emitted onto the substrate is performed to form a MTJ structure including a first magnetic layer pattern, a tunnel layer pattern, and a second magnetic layer pattern from the first magnetic layer, the tunnel barrier layer, and the second magnetic layer, respectively, the MTJ structure has no by-products remaining after the ion beam etching process is performed.Type: GrantFiled: February 2, 2015Date of Patent: February 21, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyoung-Sun Kim, Woo-Jin Kim, Ken Tokashiki
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Publication number: 20150287911Abstract: In a method of manufacturing a MRAM device, a lower electrode is formed on a substrate. A first magnetic layer, a tunnel barrier layer, and a second magnetic layer are sequentially formed on the lower electrode layer. An etching mask is formed on the second magnetic layer. An ion beam etching process in which a first ion beam and a second ion beam are simultaneously emitted onto the substrate is performed to form a MTJ structure including a first magnetic layer pattern, a tunnel layer pattern, and a second magnetic layer pattern from the first magnetic layer, the tunnel barrier layer, and the second magnetic layer, respectively, the MTJ structure has no by-products remaining after the ion beam etching process is performed.Type: ApplicationFiled: February 2, 2015Publication date: October 8, 2015Inventors: Kyoung-Sun KIM, Woo-Jin KIM, Ken TOKASHIKI
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Publication number: 20150276302Abstract: A refrigerator includes a body including a storage chamber; a door that is coupled to the body so as to open/close the storage chamber; a display that is disposed in at least one region of the door and is configured to be converted between a transparent mode and a display mode; and a controller that controls the display to display at least one among a text, an image, and color when the display is in the display mode.Type: ApplicationFiled: March 30, 2015Publication date: October 1, 2015Applicants: SAMSUNG ELECTRONICS CO., LTD., NDIS CorporationInventors: Hee Yuel ROH, Soon-Bum KWON, Kyoung Sun KIM, Joo Ho KIM, Otsuka TATSUHIRO, Burm-Young LEE
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Publication number: 20150262620Abstract: A memory module is provided which includes a printed circuit board; first semiconductor packages provided on one surface of the printed circuit board; and second semiconductor packages provided on the other surface of the printed circuit board, the first semiconductor packages and the second semiconductor packages having semiconductor dies that form ranks. A number of the ranks formed by the first semiconductor packages being different from a number of the ranks formed by the second semiconductor packages. Semiconductor packages forming a same one of the ranks receive a chip selection signal in common and semiconductor packages forming other ranks receive a different chip selection signal.Type: ApplicationFiled: May 14, 2015Publication date: September 17, 2015Inventors: Won-Hyung SONG, Kyoung-Sun KIM, Yong Jin KIM, Jae-Jun LEE, Sang-Seok KANG, Jung-Joon LEE
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Patent number: 8951048Abstract: A printed circuit board (PCB) includes a substrate body including a circuit wiring layer; tap terminals provided at a surface of the substrate body and in a peripheral region of the substrate body and electrically connected to the circuit wiring layer; and plating wires corresponding to respective tap terminals, each plating wire extending from an end portion of its respective tap terminal toward an edge of the substrate body and having a line width smaller than a line width of the tap terminal. For at least a first tap terminal, the tap terminal shares an edge with an edge of its respective plating wire. A second tap terminal adjacent the first tap terminal is positioned outside a circle having a radius that equals a length of the plating wire and having a center at a point along the shared edge where the plating wire and first tap terminal connect.Type: GrantFiled: January 16, 2013Date of Patent: February 10, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Hyun Seok, Kyoung-Sun Kim
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Patent number: 8697484Abstract: A method and system for setting the direction of pinned layers in a magnetic junction are described. In one aspect, a magnetic field greater than the coercivity of the layers in a pinned layer but less than the coupling field between the layers is applied. In another aspect the pinned layers are switched from an anti-dual state to a dual state using a spin transfer torque current. In another aspect, a magnetic junction having a partial perpendicular anisotropy (PPMA) layer in the pinned layer is provided. In some aspects, the PPMA layer is part of a synthetic antiferromagnetic structure. In some embodiments, a decoupling layer is provided between the PPMA layer and another ferromagnetic layer in the pinned layer.Type: GrantFiled: December 20, 2011Date of Patent: April 15, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Dmytro Apalkov, Alexey Vasilyevitch Khvalkovskiy, Vladimir Nikitin, Mohamad Towfik Krounbi, Xueti Tang, Se Chung Oh, Woo Chang Lim, Jang Eun Lee, Ki Woong Kim, Kyoung Sun Kim
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Patent number: 8559241Abstract: A data receiver includes a first buffer circuit and a second buffer circuit. The first buffer circuit varies a resistance of a data path and a resistance of a reference voltage path based on a plurality of control signals, and adjusts a voltage level of an input data signal and a level of a reference voltage to generate an internal data signal and an internal reference voltage based on the varied resistance of the data path and the varied resistance of the reference voltage path. The second buffer circuit compares the internal data signal with the internal reference voltage to generate a data signal.Type: GrantFiled: May 18, 2011Date of Patent: October 15, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Joo Park, Jea-Eun Lee, Jung-Joon Lee, Yang-Ki Kim, Kyoung-Sun Kim
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Publication number: 20130154034Abstract: A method and system for setting the direction of pinned layers in a magnetic junction are described. In one aspect, a magnetic field greater than the coercivity of the layers in a pinned layer but less than the coupling field between the layers is applied. In another aspect the pinned layers are switched from an anti-dual state to a dual state using a spin transfer torque current. In another aspect, a magnetic junction having a partial perpendicular anisotropy (PPMA) layer in the pinned layer is provided. In some aspects, the PPMA layer is part of a synthetic antiferromagnetic structure. In some embodiments, a decoupling layer is provided between the PPMA layer and another ferromagnetic layer in the pinned layer.Type: ApplicationFiled: December 20, 2011Publication date: June 20, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dmytro Apalkov, Alexey Vasilyevitch Khvalkovskiy, Vladimir Nikitin, Mohamad Towfik Krounbi, Xueti Tang, Se Chung Oh, Woo Chang Lim, Jang Eun Lee, Ki Woong Kim, Kyoung Sun Kim