Abstract: Disclosed is a method of forming a chalcogen compound thin film suitable for use in a light-absorption layer of a solar cell. The method includes manufacturing a precursor liquid including an Sn precursor material and an S precursor material, applying the precursor liquid to form a precursor film, and heat-treating the precursor film. The Sn precursor material and the S precursor material are liquid materials. The present invention provides a method of forming a chalcogen compound thin film using a liquid precursor material without a sulfurization process, thereby forming a high-quality SnS thin film at low cost using a process which is suitable for mass production. Further, the light-absorption layer is formed using a process which is suitable for mass production, thus enabling the manufacture of a solar cell including the chalcogen compound thin film at low cost.

Abstract: Disclosed is a method of forming a CIGS-based thin film having high efficiency using a simple process at relatively low temperatures. The method includes an Ag thin film forming step and an ACIGS forming step of depositing Cu, In, Ga, and Se on the surface of the Ag thin film using a vacuum co-evaporation process. Ag, constituting the Ag thin film, is completely diffused, while Cu, In, Ga, and Se are deposited to form ACIGS together with Cu, In, Ga, and Se co-evaporated in a vacuum during the ACIGS forming step. The Ag thin film is formed and CIGS elements are then deposited using vacuum co-evaporation to form an ACIGS thin film having improved power generation efficiency at a relatively low temperature of 400° C. or less using only a single-stage vacuum co-evaporation process.

Abstract: A semiconductor device includes first semiconductor patterns with protrusions formed on the sidewalls thereof, and second semiconductor patterns respectively coupled to the first semiconductor patterns and increasing in width away from joining surfaces where the first semiconductor patterns and the second semiconductor patterns are coupled.

Abstract: The present disclosure provides a liposome for delivering an extracellular matrix, a method for promoting cell growth, and a method for preparing a liposome for delivering an extracellular matrix. According to the present disclosure, the liposome for delivering an extracellular matrix promotes cell attachment and growth, and through this matter, the liposome for delivering an extracellular matrix can be applied to cell or tissue regeneration.

Abstract: The reference voltage generator may include a reference current generation unit suitable for generating a reference current based on a first power supply voltage and a first ground voltage, a current amount adjustment unit suitable for adjusting a current amount of the reference current generated by the reference current generation unit based on a second power supply voltage and a second ground voltage, and a reference voltage generation unit suitable for generating a reference voltage corresponding to the reference current, of which the current amount is adjusted by the current amount adjustment unit, based on the first power supply voltage and the first ground voltage.

Abstract: A battery module includes a battery block including a plurality of battery cells, each including a positive electrode terminal and a negative electrode terminal, and a vent between the positive electrode terminal and the negative electrode terminal and a middle cover including a plurality of bus-bars at one edge and at an other edge of the middle cover, the middle cover being connectable to the positive and negative electrode terminals. The middle cover may include a first barrier and a second barrier located such that the vent is between the first barrier and the second barrier and a third barrier between the bus-bars located at the other edge and the second barrier.

Abstract: Disclosed is a light-emitting diode (LED) lighting apparatus having a multifunctional heat sink flange, which includes an LED board on which a transmitted light cap and a plurality of LEDs are mounted, a main heat sink formed of magnesium or an magnesium alloy, an auxiliary heat sink formed of a conductive/polymeric resin material for heat dissipation, a heat sink upper case formed of a conductive/polymeric resin material for heat dissipation, and a power supply. The main heat sink includes multiple streamlined heat sink segments that are integrally formed on an outer surface thereof so as to radially protrude to allow air to flow in all directions, and a heat sink flange formed along an outer circumference of a bottom thereof such that omega-shaped wings having enclosed holes and inverse omega-shaped open holes are alternately formed.

Abstract: Disclosed is a crucible that exhibits stable evaporation efficiency and durability with respect to Al, is used in an evaporation source of an electron-beam evaporator, and includes a storage unit, which includes a wall and a bottom and in which a deposition material is placed, and a wetting prevention unit that includes another wall, which is taller than the wall of the storage unit, and another bottom, and is combined with an exterior of the storage unit. The wetting prevention unit is provided so that only the wall of the storage unit is wet with Al, and accordingly, the lifespan of the crucible is lengthened. Further, contact with the ceramic material in order to prevent wetting is minimized, thereby preventing a reduction in the physical properties of the thin film due to the impurities mixed with the deposited Al.

Abstract: A method for manufacturing a light absorption layer of a thin film solar cell includes: manufacturing a Ib group element-VIa group element binary system nano particle; manufacturing a binary system nano particle slurry of the Ib group element-VIa group element by adding a solution precursor including a solvent, binder and Va group element to the Ib group element-VIa group element binary system nano particle; distributing and mixing the binary system nano particle slurry of the Ib group element-VIa group element; coating the binary system nano particle slurry of the Ib group element-VIa group element on the rear electrode layer; and performing a heat treatment process on the coated nano particle slurry by supplying the VIa group element.

Abstract: The present invention provides a fused ring compound containing furan or a pharmaceutically acceptable salt thereof, a method for preparing same, a pharmaceutical composition comprising same, and a use thereof. The fused ring compound containing furan or a pharmaceutically acceptable salt thereof inhibits the activity of phosphatidylinositol 3-kinase (PI3K) and can therefore be used in a pharmaceutical composition for treating and preventing respiratory diseases, inflammatory diseases, proliferative diseases, cardiovascular diseases, or central nervous system diseases which occur due to the over-activation of PI3K.

Abstract: Provided is a connection terminal including: a conductive plate including a connection unit having a ring shape, and an extension unit integrally formed with the connection unit and extending from one side of the connection unit; and a connection cable electrically connected to the conductive plate, wherein the conductive plate further includes a damping portion formed as a part of the extension unit and bent to protrude along a direction perpendicular to the connection unit.

Abstract: A semiconductor device includes interlayer dielectrics stacked and spaced apart from each other, a channel layer passing through the interlayer dielectrics, line pattern regions each surrounding a sidewall of the channel layer to be disposed between the interlayer dielectrics, a barrier pattern formed along a surface of each of the line pattern regions and the sidewall of the channel layer, a reaction preventing pattern formed on the barrier pattern along a surface of a first region of each of the line pattern regions, the first region being adjacent to the channel layer, a protection pattern filled in the first region on the reaction preventing pattern, and a first metal layer filled in a second region of each of the line pattern regions.

Abstract: A semiconductor device includes interlayer dielectrics stacked and spaced apart from each other, a channel layer passing through the interlayer dielectrics, line pattern regions each surrounding a sidewall of the channel layer to be disposed between the interlayer dielectrics, a barrier pattern formed along a surface of each of the line pattern regions and the sidewall of the channel layer, a reaction preventing pattern formed on the barrier pattern along a surface of a first region of each of the line pattern regions, the first region being adjacent to the channel layer, a protection pattern filled in the first region on the reaction preventing pattern, and a first metal layer filled in a second region of each of the line pattern regions.

Abstract: The reference voltage generator may include a reference current generation unit suitable for generating a reference current based on a first power supply voltage and a first ground voltage, a current amount adjustment unit suitable for adjusting a current amount of the reference current generated by the reference current generation unit based on a second power supply voltage and a second ground voltage, and a reference voltage generation unit suitable for generating a reference voltage corresponding to the reference current, of which the current amount is adjusted by the current amount adjustment unit, based on the first power supply voltage and the first ground voltage.

Abstract: An energy storage system includes a plurality of trays holding battery packs, each tray having a tray controller, and a switch to set an identification code to the tray, and a rack accommodating the plurality of trays, the rack having a rack controller, and fingers corresponding to each switch of the trays, the fingers selectively activating each switch when a corresponding tray is mounted on the rack.

Abstract: The present disclosure relates to a semiconductor memory, device and a method of forming a semiconductor memory device. The method of manufacturing a semiconductor memory device, includes forming a tunnel insulation layer and a floating gate on a semiconductor substrate of an active region, forming a trench in the semiconductor substrate of an isolation region, forming, in the trench, a sacrificial layer having an upper surface positioned higher than a surface of the semiconductor substrate, forming a capping layer over the sacrificial layer, and forming an air gap by removing the sacrificial layer without removing the capping layer.

Abstract: A solar cell module, a method for manufacturing the solar cell module, a solar power system, and an interconnection ribbon are provided. The solar cell module includes a plurality of solar cells which are connected in series or in parallel through interconnection ribbons, wherein the interconnection ribbons have a zigzag shape to reduce tension generated according to bending of the solar cell module.

Abstract: A semiconductor device includes interlayer dielectrics stacked and spaced apart from each other, a channel layer passing through the interlayer dielectrics, line pattern regions each surrounding a sidewall of the channel layer to be disposed between the interlayer dielectrics, a barrier pattern formed along a surface of each of the line pattern regions and the sidewall of the channel layer, a reaction preventing pattern formed on the barrier pattern along a surface of a first region of each of the line pattern regions, the first region being adjacent to the channel layer, a protection pattern filled in the first region on the reaction preventing pattern, and a first metal layer filled in a second region of each of the line pattern regions.

Abstract: A rechargeable battery includes an electrode assembly including first electrodes and second electrodes, a casing including a space in which the electrode assembly is embedded, a cap plate combined with the casing, and a first thin film insulating member fused with the casing and surrounding the casing.

Abstract: A rechargeable battery module includes a plurality of unit battery cells and a bus bar interconnecting a first electrode terminal of a first unit battery cell of the unit battery cells and a second electrode terminal of a second unit battery cell of the unit battery cells, the first electrode terminal having a first plurality of surfaces, the second electrode terminal having a second plurality of surfaces, and the bus bar having a third plurality of surfaces, the first plurality of surfaces being configured to face and make surface contact with corresponding ones of the third plurality of surfaces, the second plurality of surfaces being configured to face and make surface contact with corresponding ones of the third plurality of surfaces, and the first, second, and third pluralities of surfaces facing along a plurality of directions.