Abstract: Provided are a microscope apparatus and a method for correcting a position of a light source according to an exemplary embodiment of the present disclosure. The microscope apparatus for correcting the position of the light source according to the exemplary embodiment of the present disclosure includes: a light source unit which includes a light emitting element array including multiple light emitting elements and is configured to emit light to a subject; an optical unit which is disposed in parallel with the subject and configured to form an enlarged image of the subject to which the light is emitted; an image sensor which is configured to acquire the enlarged image of the subject by capturing the enlarged image formed by the optical unit; and a processor which is operably connected to the light source unit, the optical unit, and the image sensor and corrects a position of the light source unit based on the image acquired by the image sensor.

Abstract: A stack package includes a lower semiconductor chip disposed on a package substrate, an interposer bridge including through vias, and an upper semiconductor chip. The upper semiconductor chip has a first edge and a second edge which are opposite to each other. The upper semiconductor chip includes a first region, a third region and a connection region which are located between the first and second edges. The upper semiconductor chip also includes a redistributed layer pattern that connects pads disposed on the first and third regions to each other. The redistributed layer pattern extends onto the connection region.

Abstract: A device and substrate are disclosed. An illustrative device includes a substrate having a first surface and an opposing second surface, a solder material receiving curved surface exposed at the second surface of the substrate, a solder resist material that at least partially covers the solder material receiving curved surface such that a middle portion of the solder receiving curved surface is exposed and such that an edge portion of the solder material receiving curved surface is covered by the solder resist material and forms an undercut, and a solder material disposed within the solder material receiving curved surface and within the undercut.

Abstract: A semiconductor package includes a first semiconductor die and a stack of second semiconductor dies disposed on a package substrate. The semiconductor package further includes a first bridge die having first through vias that electrically connect the first semiconductor die to the package substrate, a second bridge die having second through vias that electrically connect the stack of the second semiconductor dies to the package substrate, and a third semiconductor die disposed to overlap with the first semiconductor die and the stack of the second semiconductor dies. Moreover, the semiconductor package further includes redistribution lines electrically connecting the third semiconductor die to the second bridge die.

Abstract: A user verification apparatus may perform user verification using multiple biometric verifiers. The user verification apparatus may set a termination stage of one or more biometric verifiers. Multiple biometric verifiers may be used to generate outputs, for which separate termination stages are set to establish a particular combination of set termination stages associated with the multiple biometric verifiers, and the user verification apparatus may fuse outputs of the biometric verifiers based on the particular combination of set termination stages. The user verification apparatus may verify a user based on a result of the fusing, and an unlocking command signal may be generated based on the verifying. The unlocking command signal may be generated to selectively grant access, to the verified user, to one or more elements of a device. The device may be a vehicle.

Abstract: A facial verification method includes separating a query face image into color channel images of different color channels, obtaining a multi-color channel target face image with a reduced shading of the query face image based on a smoothed image and a gradient image of each of the color channel images, extracting a face feature from the multi-color channel target face image, and determining whether face verification is successful based on the extracted face feature.

Abstract: In a biomimetic artificial muscle module, a biomimetic artificial muscle assembly having the biomimetic artificial muscle module, and a method of controlling the biomimetic artificial muscle module, the biomimetic artificial muscle module includes an operating part, an elastic part, a driving part, a locking part and first and second sensors. The operating part contracts or relaxes along a longitudinal direction. The elastic part is connected to a first end of the operating part, and behaves elastically behave according to an external force. The driving part is connected to a second end of the operating part, and drives the operating part to be contracted or relaxed. The locking part selectively blocks a length of the operating part from being changed. The first and second sensors respectively sense the elastic part and the operating part.

Abstract: The present invention relates to a single transistor implementing a neuromorphic system capable of performing neuron and synaptic operations through the single transistor including a floating body layer and a charge storage layer and being implemented by a neuron device and a synaptic device which are co-integrated on the same plane, and the neuromorphic system using the same, and forms the single transistor including a hole barrier material layer formed on a substrate and including a hole barrier material or an electron barrier material, the floating body layer formed on the hole barrier material layer, a source and a drain formed on opposite sides of the floating body layer, a gate insulating layer formed on the floating body layer and including an oxide layer and the charge storage layer, and a gate formed on the gate insulating layer.

Abstract: An image processing apparatus, includes an image classifier configured to determine whether an input image is a low-quality image or a high-quality image; and an image evaluator configured to determine a first predetermined number of clearest images from a plurality of low-quality images determined by the image classifier.

Abstract: A processor implemented method of processing a facial expression image, the method includes controlling a camera to capture a first facial expression image and a second facial expression image, acquiring a first expression feature of the first facial expression image, acquiring a second expression feature of the second facial expression image, generating a new expression feature dependent on differences between the acquired first expression feature and the acquired second expression feature, and adjusting a target facial expression image based on the new expression feature.

Abstract: Disclosed is a face verification method and apparatus. The method including analyzing a current frame of a verification image, determining a current frame state score of the verification image indicating whether the current frame is in a state predetermined as being appropriate for verification, determining whether the current frame state score satisfies a predetermined validity condition, and selectively, based on a result of the determining of whether the current frame state score satisfies the predetermined validity condition, extracting a feature from the current frame and performing verification by comparing a determined similarity between the extracted feature and a registered feature to a set verification threshold.

Abstract: Disclosed is a face verification method and apparatus. The method including analyzing a current frame of a verification image, determining a current frame state score of the verification image indicating whether the current frame is in a state predetermined as being appropriate for verification, determining whether the current frame state score satisfies a predetermined validity condition, and selectively, based on a result of the determining of whether the current frame state score satisfies the predetermined validity condition, extracting a feature from the current frame and performing verification by comparing a determined similarity between the extracted feature and a registered feature to a set verification threshold.

Abstract: A strainer for a fuel pump according to the present invention includes: a communicating pipe including a flow path formed to communicate with a fuel inlet of the fuel pump; a filter including an internal space in which a fuel flows and coupled to the communicating pipe so that the internal space communicates with the communicating pipe; and a rib disposed in the filter and coupled to the communicating pipe, in which the filter includes a first filtering portion extending in a length direction with respect to the communicating pipe, a connecting portion extending in a width direction at an edge of the first filtering portion, and a second filtering portion extending in the length direction at the connecting portion and spaced apart from the first filtering portion in the width direction. Therefore, the strainer may have a relatively large filtering area and a small size.

Abstract: The present invention provides a thermal hardware-based data security device that is capable of physically, hardware-wise, and permanently erasing data stored in a memory and of enabling a storage device to be reused, and a method thereof. The thermal hardware-based data security device includes: a memory chip capable of storing data; a heater module which supplies heat to permanently erase the data stored in a memory cell within the memory chip; and a switch module which short-circuits the heater module between a power supply unit and a ground when switched on, and thus, controls the heater module to be operated.

Abstract: A semiconductor package includes a semiconductor die and a bridge die. The bridge die is configured to include a through via formed in a body of the bridge die and a capacitor electrically coupled to the through via.

Abstract: A method of operating memory devices disposed in different ranks of a multi-rank memory device and sharing a signal line includes receiving, in all of the memory devices included in the multi-rank memory device, on-die termination (ODT) state information of the signal line. The method further includes storing, in each of the memory devices of the multi-rank memory device, the ODT state information of the signal line in a mode register. The method further includes generating, in each of the memory devices of the multi-rank memory device, a control signal based on the ODT state information of the signal line stored in the mode register. The method further includes changing, in each of the memory devices of the multi-rank memory device, an ODT setting of the signal line in response to the control signal.

Abstract: The present invention relates to a 5th-generation (5G) or pre-5G communication system to be provided in order to support a higher data transmission rate than a beyond 4th-generation (4G) communication system such as long term evolution (LTE). The present invention relates to a signal transmission method of a radio frequency (RF) processing device, the method comprising the steps of: generating a pulse signal including a control signal and a clock signal for obtaining synchronization with another RF processing device, which is connected through an interface; and transmitting, to the another RF processing device, at least one from among the pulse signal, a RF signal for communication with a base station, and a power signal for supplying power to the another RF processing device, wherein the clock signal and the control signal are assigned to different time units, and the pulse signal, the RF signal and the power signal are signals of different frequency bands.

Abstract: A semiconductor package may include: a first chip stack including a plurality of first semiconductor chips stacked in a vertical direction; and first vertical interconnectors electrically coupled to the plurality of first semiconductor chips, respectively, and extended in the vertical direction, wherein each of the other first semiconductor chips, except at least the uppermost first semiconductor chip from among the plurality of first semiconductor chips includes: an active surface defined by two side surfaces of the first semiconductor chip in a first direction and two side surfaces of the first semiconductor chip in a second direction crossing the first direction; a first one-side chip pad disposed at an edge of the active surface, which is close to one side surface in the first direction; a first other-side chip pad disposed at an edge of the active surface, which is close to an other side surface in the first direction; and a first redistribution pad electrically coupled to the first other-side chip pad,

Abstract: An object recognition apparatus and method are provided. The apparatus includes a processor configured to verify a target image using an object model and based on reference intermediate data extracted by a partial layer of the object model as used in an object recognition of an input image, in response to a failure of a verification of the input image after a success of the object recognition of the input image, and perform an additional verification of the target image in response to the target image being verified in the verifying of the target image.

Abstract: A method of manufacturing iron powder configured for improving a recovery rate of chromium using ingot including chromium in a content suitably higher than a target content at the time of manufacturing iron powder including chromium, may include preparing ingot further including chromium (Cr) so that a content of chromium (Cr) in the ingot is 1 to 30% higher than a target content of chromium (Cr) in finally produced iron powder; dissolving the ingot to prepare molten steel; forming iron powder by performing water atomization on the molten steel; and adjusting a content of carbon (C) in the iron powder by performing reduction treatment on the iron powder.