Abstract: The present invention relates to new compounds derived from marine actinomycetes Streptomyces, and the new compound according to the present invention has an inhibitory effect of NO production on BV-2 microglia stimulated with LPS, and thus can be utilized for the prevention and treatment of neuroinflammatory diseases.

Abstract: A switching device in accordance with the present invention includes a first electrode and a second electrode, and the second electrode includes a body part and a cantilever connected to the body part. In addition, one end of a the cantilever comes into contact with the first electrode by an electrostatic force generated by a voltage applied to the first electrode and the second electrode, and the one end of the cantilever is separated from the first electrode due to heat generated by a voltage applied to both ends of the body part. In addition, the second electrode may include a 2-1 electrode, a 2-2 electrode, and an engineered beam connected in between.

Abstract: A semiconductor chip may include: a body portion including a front surface and a back surface; penetrating electrodes penetrating the body portion; and back connection electrodes disposed over the back surface of the body portion and connected to the penetrating electrodes, wherein the penetrating electrodes include a power penetrating electrode for transmitting a power voltage and a ground penetrating electrode for transmitting a ground voltage, the back connection electrodes include a power back connection electrode connected to the power penetrating electrode and a ground back connection electrode connected to the ground penetrating electrode, and one power back connection electrode is connected with two or more power penetrating electrodes, and one ground back connection electrode is connected with two or more ground penetrating electrodes.

Abstract: The purpose of the present invention is to provide a magnetic fluid display in which a magnetic fluid moves in response to a magnetic field and which may display a unique visual image according to the meeting and parting of the magnetic fluid. A magnetic fluid display according to the present invention comprises: a display unit including a transparent liquid into which a magnetic fluid is injected; and a magnetic field generating unit for applying a magnetic field to the magnetic fluid at a rear surface of the display unit. When the magnetic field is applied, the magnetic fluid moves in the transparent liquid in a directional manner, so that an image may be displayed on the display unit.

Abstract: A processor-implemented liveness detection method includes: obtaining an initial image using a dual pixel sensor; obtaining a left image and a right image from the initial image; and detecting liveness of an object included in the initial image using the left image and the right image.

Abstract: A neuromorphic synaptic device based on a charge trap and having linearity and symmetricity improved by using a schottky junction and a neuromorphic system using the same are provided. The neuromorphic synaptic device includes a body layer formed on a semiconductor substrate, a source and a drain formed at a left side and a right side, or an upper side and a lower side of the body layer, a contact metal to form a schottky junction by making contact with the source and the drain, a gate insulating layer formed on the body layer, and including an oxide layer and a charge storage layer, and a gate formed on the gate insulating layer.

Abstract: A lightened neural network method and apparatus. The neural network apparatus includes a processor configured to generate a neural network with a plurality of layers including plural nodes by applying lightened weighted connections between neighboring nodes in neighboring layers of the neural network to interpret input data applied to the neural network, wherein lightened weighted connections of at least one of the plurality of layers includes weighted connections that have values equal to zero for respective non-zero values whose absolute values are less than an absolute value of a non-zero value. The lightened weighted connections also include weighted connections that have values whose absolute values are no greater than an absolute value of another non-zero value, the lightened weighted connections being lightened weighted connections of trained final weighted connections of a trained neural network whose absolute maximum values are greater than the absolute value of the other non-zero value.

Abstract: A semiconductor package may include: a first chip stack including a plurality of first semiconductor chips stacked in a vertical direction; and first vertical interconnectors electrically coupled to the plurality of first semiconductor chips, respectively, and extended in the vertical direction, wherein each of the other first semiconductor chips, except at least the uppermost first semiconductor chip from among the plurality of first semiconductor chips includes: an active surface defined by two side surfaces of the first semiconductor chip in a first direction and two side surfaces of the first semiconductor chip in a second direction crossing the first direction; a first one-side chip pad disposed at an edge of the active surface, which is close to one side surface in the first direction; a first other-side chip pad disposed at an edge of the active surface, which is close to an other side surface in the first direction; and a first redistribution pad electrically coupled to the first other-side chip pad,

Abstract: A stack package includes a lower semiconductor chip disposed on a package substrate, an interposer bridge including through vias, and an upper semiconductor chip. The upper semiconductor chip has a first edge and a second edge which are opposite to each other. The upper semiconductor chip includes a first region, a third region and a connection region which are located between the first and second edges. The upper semiconductor chip also includes a redistributed layer pattern that connects pads disposed on the first and third regions to each other. The redistributed layer pattern extends onto the connection region.

Abstract: A method of operating memory devices disposed in different ranks of a multi-rank memory device and sharing a signal line includes receiving, in all of the memory devices included in the multi-rank memory device, on-die termination (ODT) state information of the signal line. The method further includes storing, in each of the memory devices of the multi-rank memory device, the ODT state information of the signal line in a mode register. The method further includes generating, in each of the memory devices of the multi-rank memory device, a control signal based on the ODT state information of the signal line stored in the mode register. The method further includes changing, in each of the memory devices of the multi-rank memory device, an ODT setting of the signal line in response to the control signal.

Abstract: A stack package includes a package substrate having a bond finger and a stack of a first semiconductor die and a second semiconductor die. The first semiconductor die includes a first pad, a second pad, and a first redistributed line connecting the first and second pads to each other. The second semiconductor die includes a third pad, a fourth pad, and a second redistributed line connecting the third and fourth pads to each other. The first and third pads are connected to each other by a first interconnector which is bonded to the bond finger, and the second and fourth pads are connected to each other by a second interconnector.

Abstract: Disclosed is a single transistor with a double gate structure for an adjustable firing threshold voltage and a neuromorphic system using the same. A single transistor neuron with a double gate structure according to an example embodiment includes a barrier material layer formed on a semiconductor substrate and comprising a hole barrier material or an electron barrier material; a floating body layer formed on the barrier material layer; a source and a drain formed at both sides of the floating body layer, respectively; a driving gate formed at a first side of the floating body layer without contacting the source and the drain; a control gate formed at a second side of the floating body layer without contacting the source and the drain; and a gate insulating film formed between the floating body layer and the driving gate and between the floating body layer and the control gate.

Abstract: A battery pack according to one embodiment of the present disclosure includes: a housing in which at least one battery cell or battery module is built, a heat exchange member provided inside the housing to cool the battery cell or the battery module, a refrigerant inflow port and a refrigerant outflow port connected to the heat exchange member, and a rapid cooling member installed in the refrigerant inflow port.

Abstract: A semiconductor package includes a first sub-package on an interconnection layer. A second sub-package and a third sub-package are sequentially stacked on the first sub-package. Each of the first to third sub-packages includes a semiconductor chip and an interposing bridge. The interposing bridge includes a first through via and a second through via. The second sub-package further includes a first redistributed line electrically connecting the semiconductor chip of the second sub-package to the first through via. The third sub-package further includes a second redistributed line electrically connecting the semiconductor chip of the third sub-package to the second through via.

Abstract: A three-dimensional (3D) image-based facial verification method and apparatus is provided. The facial verification method may include capturing a facial image of a 3D face of a user, determining an occluded region in the captured facial image by comparing the captured facial image and an average facial image, generating a synthetic image by synthesizing the captured facial image and the average facial image based on the occluded region, and verifying the user based on the synthetic image.

Abstract: The invention relates to a power adapter comprising a first prong (12) rotatable between a stowed configuration and a deployed configuration; and a second prong (13,14) rotatable in an opposing direction between a stowed configuration and a deployed configuration. A deployment mechanism associated with the first and second prongs (12,13, 14) causes their movement between the stowed and the deployed configurations. The deployment mechanism comprises a cam (see FIG. 10) coupled to at least one of the first and second prongs (12,13, 14) and arranged to act on the other prong such that movement of the cam translates to rotation of the prongs. It will be appreciated that the invention provides for a collapsible power adapter which is smaller, more user-friendly and cost effective that conventional power adapters.

Abstract: Power consumption of a display device is reduced by controlling power supplies in driving sections and in non-driving sections to be different.

Abstract: A processor-implemented method of generating feature data includes: receiving an input image; generating, based on a pixel value of the input image, at least one low-bit image having a number of bits per pixel lower than a number of bits per pixel of the input image; and generating, using at least one neural network, feature data corresponding to the input image from the at least one low-bit image.

Abstract: A stack package includes a core die disposed over a package substrate, and a controller die disposed between the core die and the package substrate to control the core die. The core die includes banks each including memory cell arrays, an interbank region in which row decoders and column decoders are arranged, and a pad region in which first connection pads electrically connected to the row decoders and column decoders through first wirings are disposed. The controller die includes a through via region in which controller die through vias penetrating the controller die to be connected to the first connection pads are disposed, and a circuit region in which controlling circuitry electrically connected to the controller die through vias through second wirings is disposed.

Abstract: The present invention relates to a brain stimulation device, including: an electrode unit constituted by one or more electrodes and configured to move back and forth to a head of a user to fix the electrodes onto the head of the user; an auxiliary pressing unit configured to move back and forth to the head of the user to fix the electrodes onto the head of the user; and a donut type support unit having a donut type inner side on which the electrode unit and the auxiliary pressing unit are disposed and which surrounds the head, therefore a user can conveniently wear the brain stimulation device without a complicated manipulation for closely attaching the electrodes to his/her head.