Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

Abstract: A method for fabricating semiconductor device may include forming a source/drain pattern on a fin-type pattern, forming an etch stop film and an interlayer insulating film on the source/drain pattern, forming a contact hole in the interlayer insulating film, forming a sacrificial liner along a sidewall and a bottom surface of the contact hole, performing an ion implantation process while the sacrificial liner is present, removing the sacrificial liner and forming a contact liner along the sidewall of the contact hole, and forming a source/drain contact on the contact liner. The ion implantation process may include implant impurities into the source/drain pattern. The source/drain contact may be connected to the source/drain pattern.

Abstract: Provided is a semiconductor device including an active pattern extended in a first direction, a plurality of gate structures including a gate electrode and a gate spacer disposed to be spaced apart from each other in the first direction on the active pattern and extended in a second direction, a source/drain pattern on the active pattern, a source/drain contact on the source/drain pattern, and a contact liner structure extended along a sidewall of the source/drain contact, being in contact with the sidewall of the source/drain contact. The contact liner structure includes a first contact liner and a second contact liner on the first contact liner. The first contact liner includes a first bottom portion, and a first vertical portion protruded from the first bottom portion and extended in a third direction. A lower surface of the contact liner structure is higher than an upper surface of the source/drain pattern.

Abstract: An image sensor includes a semiconductor substrate having a plurality of pixel regions arranged in a first direction and a second direction that are parallel to an upper surface of the semiconductor substrate. The first direction is perpendicular to the second direction. A grid structure extends in the first direction and the second direction on the semiconductor substrate to define openings corresponding to a plurality of sub-pixel regions of the plurality of the pixel regions, respectively. Color filters are disposed in the openings of the grid structure, respectively. A protective layer covers sidewalls of the grid structure and bottom surfaces of the color filters. The protective layer includes silicon oxide including carbon (C) or nitrogen (N).

Abstract: A semiconductor device may include PMOSFET and NMOSFET regions spaced apart from each other on a substrate, first and second active patterns provided on the PMOSFET and NMOSFET regions, respectively, a first channel pattern on the first active pattern, a source/drain pattern electrically connected to the first channel pattern, an active contact electrically connected to the source/drain pattern, the active contact including a first conductive pattern and a first barrier pattern enclosing a portion of a side surface and a bottom surface of the first conductive pattern, a gate electrode extending in a direction crossing the first channel pattern, a gate contact electrically connected to the gate electrode, an air gap provided on the first barrier pattern and between the gate contact and the first conductive pattern, and a lower via provided on the active contact. The lower via may be adjacent to the air gap.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.

Abstract: Semiconductor devices with improved performance and reliability and methods for forming the same are provided. The semiconductor devices include an active pattern extending in a first direction, gate structures spaced apart from each other in the first direction on the active pattern, a source/drain pattern on the active pattern, a source/drain contact on the source/drain pattern, and a contact liner extending along a sidewall of the source/drain contacts. A carbon concentration of the contact liner at a first point of the contact liner is different from a carbon concentration of the contact liner at a second point of the contact liner, and the first point is at a first height from an upper surface of the active pattern, the second point is at a second height from the upper surface of the active pattern, and the first height is smaller than the second height.

Abstract: Disclosed is a semiconductor device comprising a substrate, a first dielectric layer on the substrate, a first lower conductive line in the first dielectric layer, an etch stop layer on the first dielectric layer, a via-structure that penetrates the etch stop layer and connects to the first lower conductive line, a second dielectric layer on the etch stop layer, and an upper conductive line that penetrates the second dielectric layer and connects to the via-structure. The first dielectric layer includes a dielectric pattern at a level higher than a top surface of the first lower conductive line. The upper conductive line is in contact with a top surface of the etch stop layer. The etch stop layer has at an upper portion a rounded surface in contact with the via-structure.

Abstract: A cleaning solution production system is for cleaning a semiconductor substrate. The system includes a pressure tank, a plasma reaction tank configured to form a plasma in gas bubbles suspended in a decompressed liquid obtained from the pressure tank to thereby generate radical species in the decompressed liquid, a storage tank configured to store a cleaning solution containing the radical species generated in the plasma reaction tank, and a nozzle configured to supply the cleaning solution from the storage tank to a semiconductor substrate.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.

Abstract: A plasma generator, a cleaning liquid processing apparatus including the same, a semiconductor cleaning apparatus, and a cleaning liquid processing method are provided. The cleaning liquid processing apparatus comprising a bubble formation section configured to lower a pressure of a mixed liquid obtained by mixing a liquid and a gas to form bubbles in the mixed liquid, a plasma generator connected to the bubble formation section and configured to apply a voltage to the mixed liquid to form plasma in the bubbles formed in the mixed liquid, a mixing section connected to the plasma generator and configured to dissolve radicals included in the plasma into the mixed liquid, and a discharge nozzle connected to the mixing section and configured to discharge the mixed liquid to a wafer.

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

Abstract: Disclosed is a semiconductor device comprising a substrate, a first dielectric layer on the substrate, a first lower conductive line in the first dielectric layer, an etch stop layer on the first dielectric layer, a via-structure that penetrates the etch stop layer and connects to the first lower conductive line, a second dielectric layer on the etch stop layer, and an upper conductive line that penetrates the second dielectric layer and connects to the via-structure. The first dielectric layer includes a dielectric pattern at a level higher than a top surface of the first lower conductive line. The upper conductive line is in contact with a top surface of the etch stop layer. The etch stop layer has at an upper portion a rounded surface in contact with the via-structure.

Abstract: A cleaning solution production system is for cleaning a semiconductor substrate. The system includes a pressure tank, a plasma reaction tank configured to form a plasma in gas bubbles suspended in a decompressed liquid obtained from the pressure tank to thereby generate radical species in the decompressed liquid, a storage tank configured to store a cleaning solution containing the radical species generated in the plasma reaction tank, and a nozzle configured to supply the cleaning solution from the storage tank to a semiconductor substrate.

Abstract: Disclosed is a semiconductor device comprising a substrate, a first dielectric layer on the substrate, a first lower conductive line in the first dielectric layer, an etch stop layer on the first dielectric layer, a via-structure that penetrates the etch stop layer and connects to the first lower conductive line, a second dielectric layer on the etch stop layer, and an upper conductive line that penetrates the second dielectric layer and connects to the via-structure. The first dielectric layer includes a dielectric pattern at a level higher than a top surface of the first lower conductive line. The upper conductive line is in contact with a top surface of the etch stop layer. The etch stop layer has at an upper portion a rounded surface in contact with the via-structure.

Abstract: A cleaning solution production system is for cleaning a semiconductor substrate. The system includes a pressure tank, a plasma reaction tank configured to form a plasma in gas bubbles suspended in a decompressed liquid obtained from the pressure tank to thereby generate radical species in the decompressed liquid, a storage tank configured to store a cleaning solution containing the radical species generated in the plasma reaction tank, and a nozzle configured to supply the cleaning solution from the storage tank to a semiconductor substrate.