Patents by Inventor Kyu Kang
Kyu Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136674Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on a winding axis to define a core and an outer circumference. The first electrode includes a first active material portion coated with an active material layer and a first uncoated portion not coated with an active material layer along a winding direction. At least a part of the first uncoated portion is defined as an electrode tab by itself. The first uncoated portion includes a first portion adjacent to the core of the electrode assembly, a second portion adjacent to the outer circumference of the electrode assembly, and a third portion interposed between the first portion and the second portion. The first portion or the second portion has a smaller height than the third portion in the winding axis direction.Type: ApplicationFiled: January 19, 2022Publication date: April 25, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Jong-Sik PARK, Jae-Won LIM, Yu-Sung CHOE, Hak-Kyun KIM, Je-Jun LEE, Byoung-Gu LEE, Duk-Hyun RYU, Kwan-Hee LEE, Jae-Eun LEE, Pil-Kyu PARK, Kwang-Su HWANGBO, Do-Gyun KIM, Geon-Woo MIN, Hae-Jin LIM, Min-Ki JO, Su-Ji CHOI, Bo-Hyun KANG, Jae-Woong KIM, Ji-Min JUNG, Jin-Hak KONG, Soon-O LEE, Kyu-Hyun CHOI
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Publication number: 20240136359Abstract: Provided is a synaptic array structure. The synaptic array structure includes: an isolation insulating layer positioned in a predetermined area on a semiconductor substrate to isolate devices; TFT-type synaptic devices arranged in an array on an isolation insulating layer; and CMOS peripheral circuits provided on the semiconductor substrate. The TFT-type synaptic device includes: a source and a drain positioned on the isolation insulating layer; a semiconductor body positioned between the source and the drain; oxide layers positioned between the semiconductor body and the source/drain; a semiconductor layer for channel; a TFT gate insulating layer; and a TFT gate electrode. The present invention, based on CMOS integration technology, processes TFT-type synaptic devices and CMOS peripheral circuits together, thereby reducing the number of masks and fabrication steps used during the fabricating process.Type: ApplicationFiled: October 16, 2023Publication date: April 25, 2024Inventors: Jong-Ho LEE, Min Kyu PARK, Joon HWANG, Ryunhan GU, Won Mook KANG
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Patent number: 11966622Abstract: A memory storage device that performs real-time monitoring is provided. The memory storage device comprises a memory controller, and a status indicating module/circuit, wherein the memory controller is configured to perform a first a second initialization operation, the first and second initialization operations performed in response to turning-on of the memory storage device, to generate a first status parameter regarding a status of the memory storage device in which the first initialization operation is performed, and to generate a second status parameter regarding the status of the memory storage device in which a second initialization operation is performed. The status indicating circuit includes a first transistor configured to operate on the basis of the first status parameter, a first resistor connected to the first transistor, a second transistor configured to operate on the basis of the second status parameter, and a second resistor connected to the second transistor.Type: GrantFiled: March 9, 2022Date of Patent: April 23, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Sung Oh Huh, Jong Kyu Choi, Soo-Hyeong Kim, Dong Hee Kim, Young San Kang
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Patent number: 11967269Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.Type: GrantFiled: October 4, 2022Date of Patent: April 23, 2024Assignee: Samsung Display Co., Ltd.Inventors: Chul Kyu Kang, Sung Hwan Kim, Soo Hee Oh, Dong Sun Lee, Sang Moo Choi
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Publication number: 20240123386Abstract: A filter holder comprises: a plurality of filter frames disposed such that at least some thereof are adjacent to each other; and a folding member which supports filter frames, from among the plurality of filter frames, adjacent to each other so as to be rotatable with respect to each other. The folding member comprises: a folding part which has a predetermined thickness and is flexible so as to be foldable by means of rotation of the adjacent filter frames adjacent with respect to each other; and a plurality of edge parts which are connected to the respective sides of the folding part with the folding portion therebetween and rotate together with the adjacent filter frames, and wherein when viewed from a cross-section of the folding member, the edge parts may have a greater thickness than the folding part.Type: ApplicationFiled: January 28, 2022Publication date: April 18, 2024Applicant: COWAY CO.,LTD.Inventors: Yoon Hyuck CHOI, Hyun Kyu LEE, Jong Cheol KIM, Seung Ki KIM, Sung Sil KANG, Ju Hyun BAEK, Chan Jung PARK
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Patent number: 11962723Abstract: A method in which a high-quality packet telephony terminal apparatus performing low-latency and lossless packet communication with a counterpart packet telephony terminal apparatus operates in an integrated network structure in which a time sensitive network (TSN) and a packet communication network are combined may be disclosed. The packet telephony terminal apparatus may perform packet telephony call processing, perform a TSN stream reservation procedure when the counterpart packet telephony terminal apparatus is capable of performing a TSN function for lossless packet communication, adjust a size of a dejitter buffer when the TSN stream reservation procedure is successful, and perform low-latency packet telephony communication through the minimized size of the dejitter buffer.Type: GrantFiled: January 24, 2022Date of Patent: April 16, 2024Assignee: Electronics and Telecommunications Research InstituteInventors: Do Young Kim, Namseok Ko, Sun Me Kim, Taesik Cheung, Yoo Hwa Kang, Tae Kyu Kang, Jeong-Dong Ryoo, Yeoncheol Ryoo
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Patent number: 11958368Abstract: An apparatus for preventing a sub-frame of an electric vehicle with a wireless charging pad from being pushed back includes: a push bracket member having one side portion coupled to a front end module provided in front of a sub-frame of the electric vehicle and extending to be disposed between the sub-frame and a wireless charging pad mounted below the sub-frame. Upon a forward vehicle collision, the apparatus can induce deformation of the sub-frame equipped with the wireless charging pad to prevent the sub-frame from being pushed backward.Type: GrantFiled: October 9, 2020Date of Patent: April 16, 2024Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATIONInventors: Jong-Hun Choi, Seung-Kyu Kang
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Patent number: 11961720Abstract: Disclosed herein is a multi-channel device for detecting plasma at an ultra-fast speed, including: a first antenna module connected to a first output terminal in contact with a substrate on a chuck of a process chamber and extending to ground, and receiving a first leakage current leaking through the substrate to increase reception sensitivity of the leakage current; a first current detection module detecting the first leakage current; a current measurement module receiving the first leakage current output from the first current detection module, and extracting the received first leakage current for each predetermined period to generate a first leakage current measurement information; and a control module comparing the first leakage current measurement information with a reference value to generate first arcing occurrence information.Type: GrantFiled: October 12, 2021Date of Patent: April 16, 2024Assignee: T.O.S Co., Ltd.Inventors: Yong Kyu Kim, Bum Ho Choi, Yong Sik Kim, Kwang Ki Kang, Hong Jong Jung, Seok Ho Lee, Seung Soo Lee
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Publication number: 20240118182Abstract: A glass stress test method includes breaking a glass, analyzing a shape of a crack of a broken portion of the glass in a plan view, finding a breakage origin of the glass based on the shape of the crack in the plan view, analyzing a cross-section of the breakage origin, and calculating a stress of the glass based on a cross-sectional analysis result of the breakage origin. The stress of the glass is calculated as a value proportional to a floor constant defined by a condition of a floor surface disposed when the glass is broken.Type: ApplicationFiled: September 6, 2023Publication date: April 11, 2024Inventors: Min Ki KIM, Ji Hyun KO, Yong Kyu KANG, Jinsu NAM, Hyun Seung SEO, JUN HO LEE
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Publication number: 20240119851Abstract: The present invention relates to a method and system for providing language learning services. The method of providing language learning services, according to the present invention, the method may include: activating, in response to receiving an input for acquiring a learning target image through a user terminal, a camera of the user terminal; specifying at least a portion of an image taken by the camera as the learning target image; receiving language learning information for the learning target image from a server; providing the language learning information to the user terminal; and storing, based on a request for storing of the language learning information, the language learning information in association with the learning target image, such that the learning target image is used in conjunction with learning of the language learning information.Type: ApplicationFiled: September 29, 2023Publication date: April 11, 2024Inventors: Eun Young LEE, Min Jung KIM, Yeun Hee KANG, Bong Hyun CHOI, Tae Un KIM, Soo Hyun LEE, Young Ho KIM, Chan Kyu CHOI, Jin Mo KU, Jong Won KIM
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Publication number: 20240116005Abstract: The present invention relates to a method for preparing a 3D biological bilayer membrane structure in a physiological buffer solution and a 3D biological bilayer membrane structure using the same, and more particularly, to a method for preparing a 3D biological bilayer membrane structure that is tightly sealed even under physiological ionic conditions by applying pressure during electroformation to improve a membrane fusion function, and a 3D biological bilayer membrane structure using the same.Type: ApplicationFiled: September 29, 2023Publication date: April 11, 2024Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Tae Song KIM, Dong Hyun KANG, Bong Kyu KIM
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Publication number: 20240114900Abstract: A method for manufacturing an eco-friendly capsule includes: disposing a water phase material containing chitosan at a first site, and disposing an oil phase material at a second site and a third site, on a microfluidic chip; moving the water phase material and the oil phase material to a reaction site according to a predetermined flow ratio to produce an emulsion containing droplets having a predetermined diameter; mixing the emulsion with a water phase solution in a mixing tank; and producing chitosan beads by the reaction of the emulsion with the water phase solution.Type: ApplicationFiled: February 9, 2022Publication date: April 11, 2024Inventors: Moon Kyu KWAK, Bong Su KANG, Hosup JUNG
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Patent number: 11953545Abstract: A semiconductor module includes a substrate; a plurality of semiconductor packages provided on the substrate; and an environment information indicator configured to display information related to an environment surrounding the plurality of semiconductor packages.Type: GrantFiled: November 30, 2020Date of Patent: April 9, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seyoung Won, Dan-Kyu Kang, Sang-Yeol Lee
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Patent number: 11955092Abstract: A display device includes a sensing circuit and a controller which selects a pixel row in a frame period. A vertical blank period of the frame period includes a sensing time in which the sensing circuit performs a sensing operation for the selected pixel row. The sensing circuit measures a first source voltage of a driving transistor of a pixel in the selected pixel row at a first time point of the sensing time, and measures a second source voltage of the driving transistor at a second time point of the sensing time. The controller calculates a threshold voltage parameter and a mobility parameter based on the first and second source voltages, predicts a saturated source voltage of the driving transistor based on the threshold voltage parameter and the mobility parameter, and calculates a threshold voltage of the driving transistor based on the saturated source voltage.Type: GrantFiled: April 15, 2023Date of Patent: April 9, 2024Assignees: SAMSUNG DISPLAY CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Jeonkyoo Kim, Soo Yeon Lee, Manseung Cho, Kyeong Soo Kang, Junhee Moon, Bonghyun You, Jin Kyu Lee
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Publication number: 20240111433Abstract: In some embodiments, a memory system includes a memory device and a host configured to transmit, to the memory device, a command and address (C/A) signal and a clock signal, and to transmit or receive data signals to or from the memory device. Each command that is configured to access the memory device is associated with an access timing parameter. The memory device includes an access parameter timer configured to measure an actual timing value of the access timing parameter, a spec register configured to provide a spec timing value defining an effective timing of the access timing parameter, a comparison circuit configured to compare the actual timing value and the spec timing value, and a mode register configured to store an access timing violation flag that is read by the host when the actual timing value deviates from the spec timing value by exceeding a predetermined range.Type: ApplicationFiled: May 19, 2023Publication date: April 4, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang-Kyu KANG, Jieun SHIN, Ho-Cheol BANG, Haewon LEE
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Patent number: 11948752Abstract: A ceramic electronic component includes a body including a dielectric layer and an internal electrode, and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-dual shell structure having a core and a dual shell. The dual shell includes a first shell surrounding at least a portion of the core, and a second shell surrounding at least a portion of the first shell, and a concentration of a rare earth element included in the second shell is more than 1.3 times to less than 3.8 times a concentration of a rare earth element included in the first shell.Type: GrantFiled: December 21, 2022Date of Patent: April 2, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Sung Hyung Kang, Jong Hyun Cho, Ji Hong Jo, Hang Kyu Cho, Jae Shik Shim, Yong In Kim, Sang Roc Lee
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Patent number: 11946742Abstract: In an example, a display device includes a rollable display including a display side and an opposite non-display side. The rollable display includes a conductive material with a pattern disposed on the non-display side. The device includes a housing configured to house the rollable display and configured to roll in and roll out the rollable display along a first direction, and a capacitive sensor including a transmitter and a receiver electrode disposed within the housing and configured to sense the pattern.Type: GrantFiled: July 13, 2021Date of Patent: April 2, 2024Assignee: STMicroelectronics Asia Pacific Pte Ltd.Inventors: Tae-gil Kang, Sung Kyu Kim, Sa Hyang Hong, Chang Woo Lee
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Publication number: 20240100464Abstract: An air filter comprises: a first filter frame in which a plurality of first chambers are formed; a second filter frame in which a plurality of second chambers are formed and which is arranged at the rear of the first filter frame; and a filter material which is accommodated in the plurality of first chambers and the plurality of second chambers to filter air, wherein the first filter frame and the second filter frame are arranged so that, when seen from the front, the center of each of the plurality of second chambers is out of line with the center of each of the plurality of first chambers, in the vertical direction.Type: ApplicationFiled: January 28, 2022Publication date: March 28, 2024Applicant: COWAY CO., LTD.Inventors: Yoon Hyuck CHOI, Hyun Kyu LEE, Jong Cheol KIM, Seung Ki KIM, Sung Sil KANG, Ju Hyun BAEK, Chan Jung PARK
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Publication number: 20240103310Abstract: Systems, methods, and devices are disclosed for front-lit displays having uniform brightness. In one embodiment, an example display may include an electrophoretic display, a light guide configured to direct light from one or more light emitting diodes, and a cover lens assembly. The cover lens assembly may include a cover glass layer, an anti-glare film coupled to the cover glass layer, and a hot melt adhesive disposed about lateral edge surfaces of the cover glass layer and the anti-glare film, such that the hot melt adhesive forms a perimeter of the cover lens assembly.Type: ApplicationFiled: September 27, 2022Publication date: March 28, 2024Applicant: Amazon Technologies, Inc.Inventors: Nageswara Rao Tadepalli, Weihsin Hou, Kyu-Tak Son, Juho Ilkka Jalava, Ahmed Hassan, Xiaolong Zheng, Moonshik Kang
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Publication number: 20240105994Abstract: There is provided an additive, containing magnesium silicate, for a secondary battery electrolyte and a preparation method therefor. The magnesium silicate has a mass ratio of 50 to 70 wt % of oxygen (O), 5 to 20 wt % of magnesium (Al), and 15 to 35 wt % of silicon (Si). The magnesium silicate has a surface area of 50 to 500 m2/g. The magnesium silicate has a pore size of 0.1 to 20 nm.Type: ApplicationFiled: February 15, 2022Publication date: March 28, 2024Applicant: GIANT CHEMICAL CO., LTDInventors: Dong Min SEONG, Dong Hyun KIM, Dong Gyun KANG, Dae Uk KIM, Jin Kyu KANG, Seung Yun HAN