Patents by Inventor Kyu Kang

Kyu Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210057239
    Abstract: An apparatus for treating a substrate includes a process chamber having a process space therein, a support unit that supports the substrate in the process space, a heating member that heats the substrate supported on the support unit, and an exhaust unit that evacuates the process space. The exhaust unit includes an exhaust duct and a heat retention unit having a retention space that retains heat released from the process space. The retention space surrounds an adjacent area located adjacent to the process chamber in the exhaust duct.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 25, 2021
    Inventors: Junho KIM, Kyungsik SHIN, Youngseo AN, Jinki SHIN, Man Kyu KANG, Yoonki SA
  • Publication number: 20210043786
    Abstract: Disclosed herein is an inclined thin film solar cell. The inclined thin film solar cell includes a substrate including at least one first surface having a surface inclined at a first angle with respect to the bottom surface of the substrate and at least one second surface located adjacent to the first surface and having a surface which is connected to a next inclined surface and inclined at a second angle, a first electrode famed on a surface of the substrate, a light absorbing layer famed on the first electrode, and a second electrode formed on the light absorbing layer.
    Type: Application
    Filed: June 24, 2020
    Publication date: February 11, 2021
    Inventors: Jin Kyu KANG, Dae-Hwan KIM, Kee Jeong YANG, Sam Mi KIM, Se Yun KIM, Kwang Seok AHN
  • Publication number: 20210031222
    Abstract: Provided is a fluid container including: a container main body, of which one side is open, configured to store a fluid; a housing having an outlet provided at one side and in which the container main body slides in a longitudinal direction; and a pump module coupled to the open one side of the container main body and configured to discharge the fluid to the outlet by sliding the container main body.
    Type: Application
    Filed: February 22, 2018
    Publication date: February 4, 2021
    Inventors: Se Kyu KANG, Young Moo BAE, Ki Baik KIM
  • Patent number: 10908209
    Abstract: A semiconductor module includes a substrate; a plurality of semiconductor packages provided on the substrate; and an environment information indicator configured to display information related to an environment surrounding the plurality of semiconductor packages.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: February 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seyoung Won, Dan-Kyu Kang, Sang-Yeol Lee
  • Patent number: 10909918
    Abstract: An organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency includes pixels coupled to first scan lines, second scan lines, and data lines, a first scan driver configured to supply scan signals to the first scan lines during a first period and a second period in one frame period, when the organic light emitting display device is driven at the second driving frequency, a second scan driver configured to supply scan signals to the second scan lines during the first period, when the organic light emitting display device is driven at the second driving frequency, and a data driver configured to supply a data signal to the data lines during the first period.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: February 2, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong Jae Kim, Jin Jeon, Chul Kyu Kang
  • Publication number: 20210027847
    Abstract: A memory device, including a plurality of planes, includes a mode setting component to set an operation mode of the memory device as a verify pass mode to allow a verify operation, performed in the plurality of planes, to forcibly pass; and a verify signal generator for outputting a verify pass signal signaling that the verify operation has passed for each of the plurality of planes.
    Type: Application
    Filed: February 20, 2020
    Publication date: January 28, 2021
    Applicant: SK hynix Inc.
    Inventors: Tai Kyu KANG, Chul Woo YANG
  • Publication number: 20210020628
    Abstract: A three-dimensional semiconductor device includes a lower substrate, a plurality of lower transistors disposed on the lower substrate, an upper substrate disposed on the lower transistors, a plurality of lower conductive lines disposed between the lower transistors and the upper substrate, and a plurality of upper transistors disposed on the upper substrate. At least one of the lower transistors is connected to a corresponding one of the lower conductive lines. Each of the upper transistors includes an upper gate electrode disposed on the upper substrate, a first upper source/drain pattern disposed in the upper substrate at a first side of the upper gate electrode, and a second upper source/drain pattern disposed in the upper substrate at a second, opposing side of the upper gate electrode. The upper gate electrode includes silicon germanium (SiGe).
    Type: Application
    Filed: March 12, 2020
    Publication date: January 21, 2021
    Inventors: SEUNGHA OH, PIL-KYU KANG, KUGHWAN KIM, WEONHONG KIM, YUICHIRO SASAKI, SANG WOO LEE, SUNGKEUN LIM, YONGHO HA, SANGJIN HYUN
  • Publication number: 20210012718
    Abstract: A display device includes a display panel including a plurality of pixels and a panel driver that drives the display panel. Each of the pixels includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a first capacitor, and an emission element.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 14, 2021
    Inventors: Chul Kyu KANG, Sangmoo CHOI, Dae Hyun KIM, Dongsun LEE
  • Patent number: 10885842
    Abstract: A display device includes: a display panel including: a scan line, a data line, and an emission control line; a pixel including: a plurality of transistors connected to the scan line, the data line and the emission control line; and an organic light-emitting diode driven by the plurality of transistors, and a scan driver configured to: in response to an image mode being a moving image mode, generate a first mode scan signal having a turning-on voltage of a transistor for a plurality of horizontal periods; and in response to the image mode being a static image mode, generate a second mode scan signal having the turning-on voltage for a single horizontal period.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: January 5, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chul Kyu Kang, Sang Moo Choi, Dongsun Lee
  • Publication number: 20200385358
    Abstract: Disclosed is a method for producing calcobutrol used as an MRI contrast agent. The method comprises the steps of: obtaining butrol represented by chemical formula 2 in the specification by reacting a gadobutrol represented by chemical formula 1 in the specification and a decomplexing agent; and obtaining a calcobutrol represented by chemical Formula 3 in the specification by reacting butrol with calcium ions.
    Type: Application
    Filed: January 11, 2019
    Publication date: December 10, 2020
    Inventors: Jae Yong LEE, Jong Soo LEE, Byung Kyu KANG, Byuong Woo LEE, Sang Oh LEE, Dae Myoung YUN, Jae Hun BANG, Ki Young SOHN
  • Publication number: 20200365509
    Abstract: A semiconductor device includes a semiconductor layer having a first surface and a second surface opposite to the first surface, an active pattern on the first surface, the active pattern including a source/drain region, a power rail electrically connected to the source/drain region, and a power delivery network on the second surface, the power delivery network electrically connected to the power rail. The semiconductor layer includes an etch stop dopant, and the etch stop dopant has a maximum concentration at the second surface.
    Type: Application
    Filed: March 5, 2020
    Publication date: November 19, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yuichiro Sasaki, Sungkeun Lim, Pil-Kyu Kang, Weonhong Kim, Seungha Oh, Yongho Ha, Sangjin Hyun
  • Publication number: 20200341071
    Abstract: Disclosed is a method and a battery management system for calibrating a state of charge of a battery. The method includes measuring a terminal voltage and a current of the battery, storing a measured voltage value indicating the terminal voltage and a measured current value indicating the current in a memory, updating a state of charge of the battery based on the measured current value, estimating an open-circuit voltage of the battery based on a first number of measured voltage values and a first number of measured current values in the order stored in the memory, storing an estimated voltage value indicating the open-circuit voltage in the memory, and calibrating the updated state of charge with a reference state of charge when a calibration condition is satisfied by a data set in which a second number of estimated voltage values sequentially stored in the memory are arranged in sequential order.
    Type: Application
    Filed: December 13, 2018
    Publication date: October 29, 2020
    Applicant: LG CHEM, LTD.
    Inventors: Tae-Kyu KANG, Myeong-Hui PARK, Jung-Hwan CHOI
  • Publication number: 20200328227
    Abstract: A three-dimensional semiconductor memory device including a stack structure including gate structures and first dielectric patterns alternately stacked, a vertical channel penetrating the stack structure, and a charge storage layer extending from between the vertical channel and the first gate structures to between the vertical channel and the first dielectric patterns. The gate structures include first gate structures having a top surface and a bottom surface facing each other and having different width. The charge storage layer includes first segments between the vertical channel and the first gate structures, and second segments between the vertical channel and the first dielectric patterns. A thickness of the first segments is greater than a thickness of the second segments. One of the width of the top surface and the width of bottom surface of each first gate structure is the same as that of a first dielectric pattern on the first gate structure.
    Type: Application
    Filed: February 11, 2020
    Publication date: October 15, 2020
    Inventors: JIN-KYU KANG, WOOJAE JANG, CHANGSUB LEE, SEJUN PARK, JAEDUK LEE, JUNG HOON LEE
  • Patent number: 10804209
    Abstract: A semiconductor package includes a package substrate, a first chip stack, a second chip stack, and a supporting block. The first chip stack includes first semiconductor chips stacked on the package substrate to be offset in a first direction, and the second chip stack includes second semiconductor chips stacked on the first chip stack to be offset in a second direction. The supporting block includes a through via structure. The second chip stack is supported by the first chip stack and the supporting block.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: October 13, 2020
    Assignee: SK hynix Inc.
    Inventor: Min Kyu Kang
  • Patent number: 10796496
    Abstract: Disclosed is a method of reconstructing a three-dimensional color mesh and an apparatus for the same. According to an embodiment of the present disclosure, the method includes: receiving mesh information of an object, multiple multi-view images obtained by photographing the object at different positions, and camera parameter information corresponding to the multiple multi-view images; constructing a texture map with respect to the object on the basis of the received information and setting a texture patch referring to a color value of the same multi-view image; correcting a color value of a vertex included for each texture patch; and performing rendering with respect to the object by applying the corrected color value of the vertex to the texture map.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: October 6, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hye Sun Kim, Kyung Kyu Kang, Chang Joon Park, Yun Ji Ban, Dong Wan Ryoo, Jung Jae Yu, Man Hee Lee, Chang Woo Chu
  • Patent number: 10795087
    Abstract: An ultra-small multi-channel optical module according to one embodiment of the present invention includes a base board, a glass substrate, a heat sink, optical elements, parallel light lenses, a first rectangular reflector, a glass cover, a second rectangular reflector, horizontal reflectors, and a light collecting lens.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: October 6, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dae Seon Kim, Jong Jin Lee, Eun Kyu Kang, Sang Jin Kwon, Jeong Eun Kim, Kwon Seob Lim, Eun Kyoung Jeon, Soo Yong Jung
  • Publication number: 20200313092
    Abstract: A manufacturing method of a display device includes: stacking a release layer over a first substrate; forming a conductor pattern over the release layer; forming a sacrificial layer over the conductor pattern; forming a second substrate including a polymer layer over the sacrificial layer; forming an electronic element including a conductor over the second substrate; forming a pattern corresponding to the conductor pattern in the sacrificial layer; transferring the conductor pattern from the release layer to a surface of the second substrate; and removing the first substrate, the release layer, and the sacrificial layer.
    Type: Application
    Filed: February 28, 2020
    Publication date: October 1, 2020
    Inventors: JUN WOO YOU, Dong Hyeon LEE, Yong Kyu KANG, Tae Ho LEE
  • Patent number: 10789890
    Abstract: A display device includes a display panel including a plurality of pixels and a panel driver that drives the display panel. Each of the pixels includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a first capacitor, and an emission element.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: September 29, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chul Kyu Kang, Sangmoo Choi, Dae Hyun Kim, Dongsun Lee
  • Publication number: 20200303390
    Abstract: A semiconductor memory device includes a stack structure including electrodes and insulating layers alternately stacked on a substrate, and a vertical channel structure penetrating the stack structure. The vertical channel structure includes a semiconductor pattern and a vertical insulating layer between the semiconductor pattern and the electrodes. The vertical insulating layer includes a charge storage layer, a filling insulating layer, and a tunnel insulating layer. The vertical insulating layer has a cell region between the semiconductor pattern and each electrode and a cell separation region between the semiconductor pattern and each insulating layer. A portion of the charge storage layer of the cell region is in physical contact with the tunnel insulating layer. The filling insulating layer is between the semiconductor pattern and a remaining portion of the charge storage layer of the cell region.
    Type: Application
    Filed: February 5, 2020
    Publication date: September 24, 2020
    Inventors: Sejun Park, Jaeduk Lee, Jaehoon Jang, Jin-Kyu Kang, Seungwan Hong, Okcheon Hong
  • Patent number: 10770004
    Abstract: A pixel circuit, includes: an organic light-emitting diode; a first transistor coupled between a second node and a third node, wherein a gate electrode of the first transistor is coupled to a first node; a second transistor coupled between a data line and the second node, wherein a gate electrode of the second transistor is coupled to a first scan line; a fourth transistor coupled between the first node and an initialization power source, wherein a gate electrode of the fourth transistor is coupled to a second scan line; a fifth transistor coupled between a first power source and the second node, wherein a gate electrode of the fifth transistor is coupled to a first emission line; and a sixth transistor and an eighth transistor coupled in series between the third node and the organic light-emitting diode.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: September 8, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Hwan Kim, Chul Kyu Kang, Soo Hee Oh, Dong Sun Lee