Abstract: Disclosed herein are semiconductor packages. A semiconductor package may include a substrate configured to include a first face and a second face opposite the first face and to have a recess formed in the first face. The semiconductor package may include a first semiconductor chip disposed on the bottom of the recess. The semiconductor package may include a second semiconductor chip disposed on the second face of the substrate. The semiconductor package may include a third semiconductor chip disposed over the first face of the substrate and the first semiconductor chip. The semiconductor package may include a fourth semiconductor chip disposed over the third semiconductor chip.

Abstract: Disclosed herein are semiconductor packages. A semiconductor package may include a substrate configured to include a first face and a second face opposite the first face and to have a recess formed in the first face. The semiconductor package may include a first semiconductor chip disposed on the bottom of the recess. The semiconductor package may include a second semiconductor chip disposed on the second face of the substrate. The semiconductor package may include a third semiconductor chip disposed over the first face of the substrate and the first semiconductor chip. The semiconductor package may include a fourth semiconductor chip disposed over the third semiconductor chip.

Abstract: A semiconductor package including a premold which is used to define support structure for a semiconductor die which is mounted to the premold by a layer of suitable adhesive. Embedded within the premold are lands which each include oppose upper and lower surfaces exposed in respective ones of upper and lower surfaces define by the premold. The semiconductor die, which is attached to the upper surface of the premold by the adhesive layer, is electrically connected to the exposed upper surfaces of the lands through the use of conductive wires. The semiconductor die, conductive wires, and the upper surface of the premold are covered or encapsulated by a package body. The package body does not cover any portion of the lower surface of the premold, thus allowing the exposed lower surfaces of the lands to be placed into electrical connection or communication with an underlying substrate such as a PCB or motherboard.

Abstract: Disclosed are a method, apparatus, and system for controlling a terminal device. A method of controlling a terminal device is performed by a terminal device control unit included in the terminal device. The method may include determining whether or not to change a state of the terminal device into a terminal device control state based on range information including at least one of a control area and a control period in which the terminal device is controlled and the real-time information of the terminal device, changing the state of the terminal device into the terminal device control state based on a result of the determination, and controlling the terminal device based on the control information in the terminal device control state.

Abstract: The present invention provides a method for controlling a mobile device adaptively to the user by collecting and analyzing the behavior pattern of the users of the mobile devices, and generating the suitable policy for each of the users. The method may comprise gathering, by the mobile device, behavior patterns of the user, sending, by the mobile device, information about the gathered behavior patterns to an analysis device, analyzing, by the analysis device, the information about the behavior patterns, generating, by the analysis device, media control information based on the behavior patterns and access authority of the user by referring to a management table comprising a list of one or more mobile devices and one or more information about behavior patterns, sending it, by the analysis device, to the mobile device, and controlling the mobile device based on the media control information.

Abstract: A stack package includes a cover film, a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member, and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern.

Abstract: Provided is a printed circuit board including: an insulating layer; electronic devices embedded, in the insulating layer; and an adhesive layer for fixing the electronic devices.

Abstract: A stack package includes a cover film, a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member, and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern.

Abstract: A printed circuit board includes a core insulating layer including an isotropic resin, a first circuit pattern filled in a circuit pattern groove at an upper portion or a lower portion of the core insulating layer, a first insulating layer provided in a top surface thereof with a circuit pattern groove and covering the first circuit pattern, and a second circuit pattern to fill the circuit pattern groove of the first insulating layer. A material, such as polyimide, having an isotropic structure is employed for the core insulating layer, thereby preventing the substrate from being bent without glass fiber. Since the glass fiber is not included, the buried pattern is formed at the upper portion or the lower portion of the core insulating layer, so that the thin substrate is fabricated.

Abstract: The semiconductor package includes an upper semiconductor chip stacked on a package substrate and a support layer or a lower semiconductor chip disposed between the upper semiconductor chip and the package substrate. The upper semiconductor chip includes a protrusion downwardly extending from an edge thereof. The protrusion of the upper semiconductor chip is combined with a sidewall of the support layer or the lower semiconductor chip. Related methods are also provided.

Abstract: A stack package includes a cover film, a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member, and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern.

Abstract: The present invention relates to an apparatus for measuring biological information supporting multiplex communication. The apparatus for measuring biological information, according to one embodiment of the present invention, comprises: a measuring portion for measuring biological information through a biosensor; a data communication portion for transreceiving the biological information that is measured with an external device through a wireless communication network, which supports a client mode and an AP mode; and a control portion for accessing a communication network by controlling the client mode or the AP mode in a WiFi module. The present invention can transmit data to the external device through a connected AP by operating a wireless communication module in the client mode, or communicate data with the external device through a communication module of terminals, which connect by self-switching to the AP mode when the connected AP does not exist.

Abstract: Provided is a printed circuit board, including: a core substrate including an internal circuit pattern on an upper surface or a lower surface; electronic devices which are formed to pass through the core substrate; an external insulating layer which covers the internal circuit pattern and the electronic devices; and an external circuit pattern which is formed on an upper surface of the external insulating layer, wherein a lower surface of the electronic devices protrudes from the lower surface of the core substrate to a lower part. Accordingly, in the embedded printed circuit board in which the electronic devices are embedded, when the electronic devices are mounted, because the insulating layer is formed regardless of a thickness of the electronic devices, the printed circuit board having a desired thickness regardless of the thickness of the electronic devices can be formed.

Abstract: Methods of forming an interconnection line pattern using a screen printing technique. The method includes preparing a substrate having unevenness, aligning a stencil mask on the substrate, and printing a paste including materials for forming the interconnection line pattern on a convex portion of the unevenness formed on the substrate.

Abstract: A transmission system for a transfer case can change a high range mode to a low range mode without a shifting shock even while a vehicle is traveling at a constant speed. The transmission system includes a hydraulic system including a hydraulic circuit and a hydraulic cylinder connected to the hydraulic circuit and receiving a hydraulic pressure from a hydraulic pressure source. The transmission system further includes a clutch piston apparatus mounted on a housing of the transfer case and including a clutch piston receiving a hydraulic pressure from the hydraulic pressure source. An operating rod of the hydraulic cylinder is connected to a shift sleeve, and the clutch piston of the clutch piston apparatus is connected to the ring gear of the planetary gear assembly to make the ring gear not rotate according to the operation of the clutch piston supplied with the hydraulic pressure.

Abstract: A semiconductor device has a substrate. A conductive layer is formed over the substrate. A duplex plated bump on lead pad is formed over the substrate. An insulating layer is formed over the conductive layer and the substrate. A portion of the insulating over the duplex plated bump on lead pad is removed using a laser direct ablation process. The insulating layer is a lamination layer. The duplex plated bump on lead pad has a wide bump on lead pad. A semiconductor die is mounted over the substrate. The semiconductor die has a composite conductive interconnect structure. The semiconductor die has a first bump and a second bump with a pitch ranging from 90-150 micrometers between the first bump and the second bump. A duplex plated contact pad is formed on a surface of the substrate opposite the duplex plated bump-on-lead pad.

Abstract: The semiconductor package includes an upper semiconductor chip stacked on a package substrate and a support layer or a lower semiconductor chip disposed between the upper semiconductor chip and the package substrate. The upper semiconductor chip includes a protrusion downwardly extending from an edge thereof. The protrusion of the upper semiconductor chip is combined with a sidewall of the support layer or the lower semiconductor chip. Related methods are also provided.

Abstract: Disclosed are a method, apparatus, and system for controlling a terminal device. A method of controlling a terminal device is performed by a terminal device control unit included in the terminal device. The method may include determining whether or not to change a state of the terminal device into a terminal device control state based on range information including at least one of a control area and a control period in which the terminal device is controlled and the real-time information of the terminal device, changing the state of the terminal device into the terminal device control state based on a result of the determination, and controlling the terminal device based on the control information in the terminal device control state.

Abstract: In one embodiment, a semiconductor package includes a generally planar die paddle or die pad that defines multiple peripheral edge segments, and includes one or more tie bars protruding therefrom. In addition, the semiconductor package includes a plurality of leads, portions of which protrude from respective side surfaces of a package body of the semiconductor package. Connected to the top surface of the die pad is at least one semiconductor die which is electrically connected to at least some of the leads. At least portions of the die pad, the leads, and the semiconductor die are encapsulated by the package body. The one or more tie bars and the plurality of leads include downsets that are sized and oriented relative to each other to facilitate enhanced manufacturing.

Abstract: Methods of forming an interconnection line pattern using a screen printing technique. The method includes preparing a substrate having unevenness, aligning a stencil mask on the substrate, and printing a paste including materials for forming the interconnection line pattern on a convex portion of the unevenness formed on the substrate.