Abstract: A display device includes: a substrate; a gate line disposed on the substrate and configured to transmit a gate signal; a reference voltage line disposed apart from the gate line and configured to transmit a reference voltage; an insulation layer disposed on the gate line and the reference voltage line; a pixel electrode layer including: a first sub-pixel electrode disposed on the insulation layer and located at a first side with reference to the gate line; and a second sub-pixel electrode disposed on the insulation layer and located at a second side opposite to the first side with reference to the gate line; and a conductive shield portion disposed on the gate line, wherein the gate line includes two parallel edges, an edge closer to the reference voltage line among the two parallel edges including a first edge, and wherein the conductive shield portion overlaps the first edge.

Abstract: A trim management method for a storage device includes activating, by a processor configured by an application program, a pattern check function of a device driver, requesting, by the processor configured by the application program, a file system to write a file of a specified pattern, converting, by the processor configured by the file system, the file to management unit data of the storage device, transmitting, by the processor configured by the file system, the management unit data to the device driver, checking, by the processor configured by the device driver, whether a data pattern of the management unit data is the same as the specified pattern, and transmitting, by the processor configured by the device driver, a trim command for trimming a storage area corresponding to the management unit data, to the storage device based on results of the checking.

Abstract: The present invention relates to a graphene transistor comprising: a substrate; a graphene channel layer arranged on the substrate; a pair of metals spaced from each other and respectively arranged at opposite ends of the graphene channel layer; and a linker layer arranged on the graphene channel layer and including an N-heterocyclic carbene compound, a fabrication method therefor, and a biosensor comprising the same. The graphene transistor according to the present invention in which the carbene group of the N-heterocyclic carbene compound forms a covalent bond with the graphene channel layer to modify the whole surface of the graphene channel layer exhibits excellent electric conductivity as a transistor and a biosensor comprising the transistor is improved in selectivity and sensitivity.

Abstract: A hybrid vehicle has an improved water-cooled battery layout. The hybrid vehicle includes: a housing positioned in an outdoor space of a vehicle body; a battery for providing an electric driving force to the vehicle and positioned inside the housing; a cooling block disposed below the battery to discharge the heat generated from the battery; a cooling pipe for supplying coolant to the cooling block and formed along an upper portion of the housing; and a cooling nipple formed integrally with the housing to be fastened to the cooling pipe.

Abstract: A computer system includes a host and a storage device. The host provides an input/output request (IO request). The storage device receives the IO request from the host and sends an interrupt informing input/output completion (IO completion) to the host after completing the IO request. The host adjusts the number of generated interrupts of the storage device using the number of delayed IOs. The computer system may adaptively control interrupt generation of the storage device based on a load status of a CPU or the number of delayed IOs. The interrupt generation of the storage device may be adjusted to obtain a CPU gain without loss of performance or processing time of the computer system.

Abstract: A display device includes: a gate line (GL); a semiconductor pattern (SP) on the GL; a data line (DL); a voltage division reference line (VDRL); and first to third switching elements (SWE) overlapping the SP. The first SWE includes a first source electrode (SE) connected to the DL, a first drain electrode (DE) spaced apart from the first SE, and a first gate electrode (GE) connected to the GL. The second SWE includes a second SE connected to the DL, a second DE spaced apart from the second SE, and a second GE connected to the GL. The third SWE includes a third SE connected to the VDRL, a third DE connected to the second SE, and a third GE connected to the GL. The first SE, the first DE, the second SE, and the second DE are sequentially arranged across and on the SP in a first direction.

Abstract: A high voltage battery unit for a vehicle and an underbody of the vehicle are provided. The high voltage battery unit mounted to the vehicle is installed under a center floor of the vehicle at the outdoor side. A drive shaft forming a drive device of the vehicle is installed to penetrate between battery built-in parts positioned at both sides with respect to a center tunnel to deliver the power of a powertrain mounted at the front of the vehicle to a rear wheel through the drive shaft.

Abstract: A cooling duct of a high voltage battery system of a vehicle is provided. The cooling duct includes a duct body that forms an inlet open towards the interior of the vehicle and an outlet that is formed at a side of the duct body opposite to the inlet to supply air introduced into the cooling duct through the inlet to a high voltage battery. A blocking wall is formed between the inlet and the outlet to restrict rectilinear communication between the inlet and the outlet while allowing air flow between the inlet and the outlet.

Abstract: The present disclosure relates to a method of manufacturing a sulfide solid electrolyte and a sulfide solid electrolyte manufactured thereby, and more particularly to a method of manufacturing a sulfide solid electrolyte and a sulfide solid electrolyte manufactured thereby, in which the sulfide solid electrolyte includes two or more sulfide compounds, thus improving the atmospheric stability of the solid electrolyte and reducing the generation of toxic gas.

Abstract: An embodiment of the present inventive concept provides a liquid crystal display, including: a first gate line; a first data line crossing the first gate line; a first transistor including a gate electrode connected to the first gate line, a source electrode connected to the first data line, and a drain electrode; a first connecting line connected to the drain electrode; a first contact portion connected to the first connecting line; and a first pixel electrode connected to the first contact portion, wherein the first pixel electrode may be disposed between the first transistor and the first contact portion.

Abstract: An electronic device includes an image sensor including an image generator configured to generate and output a pixel image, an image processing device configured to process the pixel image, and a storage unit configured to store the pixel image, and an application processor configured to generate a mode setting signal and configured to transmit the generated mode setting signal to the image processing device. The image processing device is configured to generate a plurality of path selection signals for selecting a path to use by the image processing device to process the pixel image, based on the mode setting signal. The image processing device selects a compression ratio for the pixel image based on at least one of an input signal of a user, an analysis result of the pixel image, and a motion signal of the image sensor, and compresses the pixel image based on the selected compression ratio.

Abstract: A data management device and a method of managing data are provided. The data management device includes a communication interface configured to receive image data from cameras, and a data manager configured to sort predetermined cameras among the cameras into a group, and record, among the received image data, image frames that are received from the predetermined cameras sorted into the group, in a single group file.

Abstract: A display panel including: a display portion including a plurality of signal lines and a plurality of pixels connected to the signal lines; a peripheral portion provided around the display portion; an integrated circuit (IC) mounting unit provided on the peripheral portion, and including a plurality of driver ICs connected to a data driver; and a test pad portion provided on the peripheral portion and testing the signal lines. The test pad portion includes a gate driver test pad portion including a gate driver test pad unit and a data line test pad unit including a data line test pad unit, the data line test pad unit includes an outermost data line test pad unit provided on respective sides of the data line test pad portion and a plurality of intermediate data line test pad units provided between the outermost data line test pad units.

Abstract: A display device and a method of manufacturing the same. The display device includes: a substrate; and a reflection member that is disposed on a surface of the substrate and has a first thickness in a first reflection region corresponding to a light-emitting region and a second thickness in a second reflection region corresponding to a non-light-emitting region.

Abstract: A storage device includes a non-volatile memory including a first block, a second block and a block management area that stores an initial data write time and a final data write time for each of the first block and the second block. The storage device also includes a memory controller that determines a creation time and a modification time for first data in response to a permanently delete command identifying the first data, selects at least one of the first block and the second block to be permanently deleted by comparing the initial data write time and the final data write time for each of the first block and the second block with the creation time and the modification time, and permanently deletes the selected at least one of the first block and the second block.

Abstract: A method of operating a storage device which includes a non-volatile memory including a normal unit configured to store normal data and a swap unit configured to store swap data and a controller configured to control the non-volatile memory is provided. The method includes receiving the swap data and a unit selection signal for selecting the swap unit from a host; and processing the swap data according to a data processing policy of the swap unit and writing the processed swap data to the swap unit. The data processing policy of the swap unit may be different from a data processing policy of the normal unit.

Abstract: A display device including: a substrate; a gate line disposed on the substrate to transmit a gate signal; a first reference voltage line spaced apart from the gate line to transmit a reference voltage; a second reference voltage line disposed on the gate line and the first reference voltage line and electrically connected to the first reference voltage line; an insulating layer disposed on the second reference voltage line; and a pixel electrode layer disposed on the insulating layer, wherein the pixel electrode layer includes a first pixel electrode having a first sub-pixel electrode disposed at a first side with respect to the gate line and a second sub-pixel electrode disposed at a second side opposite to the first side with respect to the gate line, and the second reference voltage line may overlap the first pixel electrode and may cross the first pixel electrode.

Abstract: A display device including a substrate, a gate line, a reference voltage line, a data line, a first drain electrode separated from the data line, an insulating layer disposed on the data line and the first drain electrode, and a pixel electrode layer disposed on the insulating layer and including a pixel electrode and a light blocking electrode overlapping the data line, the pixel electrode includes a first sub-pixel electrode including a first extension part protruded toward the first drain electrode and a contact portion connected to one end of the first extension part, the first extension part of the first sub-pixel electrode has a first side parallel to a first side of the light blocking electrode, and an interval between the first sides of the first extension part and the light blocking electrode is less than about 4 ?m.

Abstract: An access method of a nonvolatile memory device included in a user device includes receiving a write request to write data into the nonvolatile memory device; detecting an application issuing the write request, a user context, a queue size of a write buffer, an attribute of the write-requested data, or an operation mode of the user device; and deciding one of a plurality of write modes to use for writing the write-requested data into the nonvolatile memory device according to the detected information. The write modes have different program voltages and verify voltage sets.

Abstract: Disclosed herein is a thin film transistor substrate, including: an insulating substrate having a dummy area and a display area; a signal line formed in the dummy area on the insulating substrate; a switching element positioned in the display area on the insulating substrate; a color filter layer positioned in the display area on the insulating substrate and exposing a portion of the switching element through at least one contact hole; and a dummy color filter layer positioned on the dummy area on the insulating substrate and exposing a portion of the signal line through at least one dummy contact hole, wherein the at least one dummy contact hole formed on the dummy color filter layer and the at least one contact hole formed on the color filter layer are formed on the same position in a plane view.