Abstract: A computer system includes a host and a storage device. The host provides an input/output request (IO request). The storage device receives the request from the host and sends an interrupt informing input/output completion (IO completion) to the host after completing the IO request. The host adjusts the number of generated interrupts of the storage device using the number of delayed IOs. The computer system may adaptively control interrupt generation of the storage device based on a load status of a CPU or the number of delayed IOs. The interrupt generation of the storage device may be adjusted to obtain a CPU gain without loss of performance or processing time of the computer system.

Abstract: A vehicle electric power system for jumpstarting includes: an auxiliary battery; a first relay having a first end connected to the auxiliary battery; a power connecting terminal for jumpstarting being connected to an external power source when jumpstarting is initiated; a second relay having a first end connected to the power connecting terminal and a second end electrically connected to a second end of the first relay; and a reconnection switch having a first end connected both to the auxiliary battery and to the power connecting terminal and a second end connected to a control terminal used to turn on the first relay. The reconnection switch electrically connects the first and second ends thereof to each other in response to a reconnecting input signal, thereby applying external power to the control terminal, and turning on the first relay.

Abstract: Embodiments of the inventive concept include computer-implemented method for shadowing one or more boot images of a mobile device. The technique can include duplicating boot images to shadow partitions in a user area of a non-volatile memory device such as a flash memory. The technique can include detecting boot image corruption, and causing a mobile device to boot from the shadow partitions. The technique can include dynamically shadowing and releasing blocks used by the shadow partitions. The technique can include boot failure recovery and bad image preservation through firmware flash translation layer (FTL) logical to physical mapping updates. Boot image corruption failures can be recovered from and/or debugged using the shadow partitions.

Abstract: Provided is a liquid crystal display capable of reducing a texture by increasing a liquid crystal control ability. The liquid crystal display includes a first electrode and a second electrode facing each other with a liquid crystal layer therebetween. The first electrode includes a horizontal extension forming a boundary between adjacent subregions and a vertical extension connected to the horizontal extension, and the horizontal extension includes a portion which has a largest width at a position proximate to the vertical extension, and which has a smaller width at a position farther from the vertical extension.

Abstract: A method of processing data in a memory system including a control unit and a hybrid memory device having a first memory and a second memory, includes; receiving first write data, storing the first write data in the first memory and assigning a first group state from among a plurality of group states to the stored first write data in response to first attribution information, completing a data processing operation in the memory system directed to the stored first write data that changes the attribution information associated with the stored first write data by monitoring of the first attribution information using an operating system running on the memory controller, and changing the first group state assigned to the stored first write data to a second group state from among the plurality of group states, the second group state having a different priority than a priority for the first group state.

Abstract: An organic light emitting display apparatus includes a substrate, an encapsulation member facing the substrate, a plurality of pixels between the substrate and the encapsulation member, each pixel including a light emission area and a non-emission area, a first electrode overlapping at least the light emission area, an intermediate layer on the first electrode and including an organic emission layer, a second electrode on the intermediate layer, and a reflective member on a bottom surface of the encapsulation member, the bottom surface of the encapsulation member facing the substrate, and the reflective member including an opening corresponding to the light emission area, and a reflective surface around the opening and corresponding to the non-emission area.

Abstract: A display device includes a substrate, a display structure, and a conductive line. The substrate includes a display region having a plurality of pixel regions and a peripheral region surrounding the display region. Each of the pixel regions has sub-pixel regions and a transparent region. The display structure is disposed in each of the pixel regions of the display region. The conductive line is disposed in the peripheral region, and is electrically connected to the display structure. The conductive line has at least one opening.

Abstract: A connector module may include: a connector body including an interior space with an empty area therein; and a connector part disposed on one side of the connector body. The connector part may include: a connector protruding from the connector body; and a connector holder seated in the empty area of the connector body and configured to secure the connector thereto. The connector holder may be configured to move the connector in one direction in response to an external force. A fixing part may be connected to one side of the connector body in a hinged fashion and being rotatable relative to the connector.

Abstract: An erase method of a nonvolatile memory device is provided which includes receiving an erase request; selecting an erase mode of a memory block corresponding to the erase request, based on an access condition of the nonvolatile memory device managed by a memory controller; and controlling the nonvolatile memory device to erase the memory block according to the selected erase mode. The erase mode includes a fast erase mode of which an erase time for the memory block is shorter than a reference time and a slow erase mode of which an erase time for the memory block is longer than the reference time.

Abstract: According to example embodiments, a method of controller a memory system using a controller includes receiving a first read count command, determining if a read count of a non-volatile memory in the memory system exceeds a threshold value, and performing a first reading operation on the non-volatile memory according to the first read command. If the read count of the non-volatile memory exceeds the threshold value, then addresses are selected to which a plurality of additive reading operation corresponding to the first read command will be performed, in a random neighbor selection operation. The plurality of additive reading operations for checking data of neighboring pages of the page for performing the reading operation are distributed and processed.

Abstract: A flash memory system is provided. The flash memory system includes a memory device including a memory cell array including at least one data block and a controller that determines whether to end background garbage collection according to a lifespan index of the at least one data block. The lifespan index may be decreased by the background garbage collection. The controller may end the background garbage collection when the decreased lifespan index is equal to or higher than a reference value.

Abstract: A hollow core secondary battery, including: an electrode assembly comprising a pair of electrode plates and a separator disposed between the pair of electrode plates; an outer container in which the electrode assembly is received; an inner container inserted into a central portion of the electrode assembly, the inner container being hollow; a first terminal assembly assembled at a top portion of the outer container, the first terminal assembly into which a top end portion of the inner container is inserted; and a second terminal assembly assembled at a bottom portion of the outer container, the second terminal assembly having a central portion into which a bottom end portion of the inner container is inserted.

Abstract: A liquid crystal display device includes a gate line in a first direction, a data line in a second direction intersecting the first direction, a pixel including a first region having a transistor connected to the gate and data lines, and a contact hole connecting the transistor to a pixel electrode, and a second region having the pixel electrode, wherein a length of a first width along the first direction on the first region is longer than a length of a second width along the second direction on the first region, and wherein a length of a third width along the first direction on the second region is longer than a length of a fourth width along the second direction on the second region.

Abstract: A writing method of a storage system which includes a host and a storage connected to the host, includes receiving journal data during a generation of a data writing transaction; inserting in a first map table, a plurality of entries, each entry including a first logical address of a first logical area of the storage and a second logical address of a second logical area of the storage; writing the journal data to a physical area of the storage corresponding to the first logical address; and remapping the physical area from the first logical address onto the second logical address using the plurality of entries when a size of a usable space of the first logical area is less than a desired value.

Abstract: A method for transmitting a three-dimensional (3D) caption signal and caption display method are disclosed to three-dimensionally display caption text such that it fits a 3D image in a 3D display device. 3D caption box configuration information and caption text are generated to display a 3D caption within a 3D image, and the 3D caption box configuration information and the caption text are inserted into a video picture header region to code the image signal, and then, the image signal is transmitted. In the caption display method, a broadcast signal including a 3D image signal is received, and 3D caption box configuration information and caption text included in the broadcast signal are acquired. A caption image including 3D caption text disposed within a 3D caption box is then generated based on the 3D caption box configuration information and the caption text, and displayed.

Abstract: A method of processing EPG metadata in a network according to one embodiment of the present invention includes the steps of performing a services discovery procedure utilizing multiple service discovery metadata components supplied by a service provider and processing an EPG metadata.

Abstract: A data driving apparatus includes a first data driver and a second data driver. The first data driver is configured to generate data signals to data lines of a display panel, and includes data pads configured to output the data signals, a first common voltage pad configured to output a common voltage to the display panel, and a gate driving signal pad configured to output a gate driving signal to a gate driver, which is configured to output a gate signal to a gate line of the display panel. The second data driver is disposed between two first data drivers; is configured to generate the data signal provided to the data line; and includes a second common voltage pad configured to output the common voltage to the display panel. Thus, a width of a bezel of the display apparatus may be decreased.

Abstract: A microfluidic system for analyzing nucleic acid, the microfluidic system including a reagent supply device including a sample chamber into which a sample can be injected, one or more reagent chambers for containing one or more reagents for extracting nucleic acid from the sample, and a waste chamber in which the used reagent can be discarded; a binding-lysis chamber in which cells are captured from the sample and lysed to form a cell lysate containing nucleic acid; plurality of particles for cell binding disposed in the binding-lysis chamber; a plurality of rehydration chambers into which the cell lysate formed in the binding-lysis chamber can be distributed and mixed with a nucleic acid amplification reagent to form an amplification reaction mixture; a plurality of amplification chambers in which a nucleic acid amplification reaction is performed on the amplification reaction mixture introduced from the plurality of rehydration chambers; and a flow channel system including an outlet and a plurality of inlet

Abstract: A method of operating a memory device includes: determining an erase mode based on a number of erase cycles performed on a memory block and an erase voltage utilized to perform each erase cycle; and setting an erase voltage level for executing an erase operation on the memory block based on the determined erase mode.

Abstract: A reagent supply device includes a plurality of chambers which are separated from each other such that different reagents may be injected, the plurality of chambers having bottom surfaces made of a membrane, the membrane comprising a destruction pattern which is formed at a position corresponding to each of the plurality of chambers and breachable by an external impact to discharge the injected reagent from the chamber.