Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: The present disclosure relates to a brake disc including a braking part having a circular plate shape having a hollow portion and a plurality of coupling portions protruding and extending from an inner diameter surface thereof, and a hat part disposed in the hollow portion and having a plurality of insertion portions protruding laterally, in which the plurality of coupling portions is respectively coupled to the plurality of insertion portions, and the coupling portion of the braking part and the insertion portion of the hat part are joined to only one of an outboard portion or an inboard portion of the braking part. According to the present disclosure, it is possible to reduce noise occurring at a position at which the hat part and the braking part are coupled to each other and improve cooling performance.

Abstract: An embodiment of the present invention relates to a cylindrical secondary battery in which a positive electrode terminal is adhered and fixed to a cylindrical can by an insulating sheet, and thus sealing between the cylindrical can and the positive electrode terminal can be facilitated due to an increased contact area.

Abstract: A cylindrical secondary battery includes: an electrode assembly including a first electrode plate and a second electrode plate; a cylindrical case having a disk-shaped top portion and a side portion extending from the top portion, the cylindrical case accommodating the electrode assembly; a cathode terminal extending through the top portion and insulated therefrom; a first current collector plate electrically connected to the first electrode plate and the cathode terminal; a second current collector plate electrically connected to the second electrode plate and the side portion of the cylindrical case; a cap plate coupled to the side portion and insulated therefrom; and an insulation tape between the top portion of the cylindrical case and the first current collector plate and covering the first current collector plate.

Abstract: A ternary logic circuit includes: a first inverter unit; a second inverter unit arranged in parallel with the first inverter unit; a first junction unit arranged between the first inverter unit and an output terminal and including a tunnel PN junction; and a second junction unit arranged between the second inverter unit and the output terminal and including a tunnel PN junction, wherein, when an absolute value of an input voltage applied to an input terminal is less than a first input voltage, the output terminal outputs a first output voltage, and when the absolute value of the input voltage is greater than the first input voltage and less than a second input voltage, the output terminal outputs a second output voltage, and when the absolute value of the input terminal is greater than the second input voltage, the output terminal outputs a third output voltage.

Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: Proposed is a solar power leveling system, more particularly, a solar power leveling system via string-based power compensation, wherein outputs between strings are equalized by charging or discharging using a power compensation device so that output through solar power generation is maximized with a simple device configuration, and when there is reduction in output of a plurality of strings, compensation power for maximizing the total string output is calculated to achieve power compensation, whereby the power compensation device performs power compensation with a single discharging part and maximizes the total power generation amount of the strings connected to each other in parallel.

Abstract: The technology disclosed in the present disclosure is a method for correcting a yaw of an X-Y stage, including: moving an XY moving body in an X-axis or Y-axis direction using an actuator; measuring a yaw, which is a rotational displacement of the moved XY moving body, using a sensor; calculating, by a controller, a rotational stiffness value to be corrected, using the measured yaw data; and adding yaw correction flexures having a stiffness corresponding to the rotational stiffness value to be corrected to the X-Y stage.

Abstract: A display device includes a display panel configured to display an image, a gate driver connected to gate lines of the display panel, and a data driver connected to data lines of the display panel, and the data driver provides duplicates of red, green and blue data signals, except for a white data signal, in a digital data signal having a 4:2:0 format externally input thereto, and converts the white data signal, the red, green and blue data signals, and the duplicated red, green and blue data signals, thereby outputting an analog data voltage having a 4:4:4 format.

Abstract: The present disclosure relates to an apparatus for diagnosing a state of a photovoltaic device, a building Integrated Photovoltaics (BIPV) device, etc., and more particularly to an apparatus for diagnosing photovoltaic power generation, which diagnoses a state of the specific photovoltaic device by comparing the difference in power generation between grouped photovoltaic devices through analysis of power generation for the same period in the past through machine learning, etc., wherein the apparatus processes power generation information, which is collected from the photovoltaic devices, based on failure history and maintenance and repair information of each photovoltaic device and performs precise grouping by minimizing error information regarding a power generation trend based on information such as regional weather information and environment information for a region where each photovoltaic device is located, so that a power generation trend can be analyzed with improved accuracy of analysis of state.

Abstract: A light emitting display device includes a display panel configured to display an image, a data driver configured to supply a data voltage to data lines of the display panel, and a sensing circuit configured to obtain a sensing voltage through sensing lines of the display panel after reflecting a negative impedance value canceling impedance differences of the sensing lines.

Abstract: An antenna device according to an example embodiment includes a silicon substrate of first type doping, at least two first doped regions formed by second type doping different from the first type doping, a second doped region formed by the second type doping outside a channel region surrounding the at least two first doped regions, and at least two gates disposed on a dielectric layer. In the antenna device, a resonant frequency is adjusted according to an external voltage individually applied to the at least two gates, and polarization information of a terahertz (THz) light source is obtained based on a pattern and an amount of an electric field measured at the at least two gates.

Abstract: According to an embodiment of the present disclosure, a memory device for a logic-in-memory may include a cell array including a plurality of ternary memory cells, a row decoder configured to select at least one ternary memory cell from among the plurality of ternary memory cells, and a page buffer configured to provide a first value to the at least one ternary memory cell and latch a third value obtained by performing a logic operation on the first value and a second value stored in the at least one ternary memory cell and/or the second value.

Abstract: A display device includes a display panel configured to display an image, a gate driver connected to gate lines of the display panel, and a data driver connected to data lines of the display panel, and the data driver provides duplicates of red, green and blue data signals, except for a white data signal, in a digital data signal having a 4:2:0 format externally input thereto, and converts the white data signal, the red, green and blue data signals, and the duplicated red, green and blue data signals, thereby outputting an analog data voltage having a 4:4:4 format.

Abstract: An electroluminescent display device includes a display panel including a plurality of pixels connected to a plurality of sensing lines, a plurality of sampling circuits configured to simultaneously sample driving characteristics of the pixels to generate sampling outputs, a plurality of sampling multiplexers configured to divide the sampling outputs into n groups and to alternately select group sampling outputs, a plurality of scalers individually connected to the sampling multiplexers, and a global multiplexer configured to selectively connect outputs of the scalers to an analog-to-digital conversion circuit, wherein the number of scalers is less than the number of sampling circuits.

Abstract: A tunnel field effect transistor includes a source region and a drain region, positioned on a substrate, a channel region positioned between the source region and the drain region and having a first length in a first direction, a gate electrode positioned on the channel region, and a gate insulating layer positioned between the channel region and the gate electrode, wherein the source region is doped with impurities of a first conductivity type and the drain region is doped with impurities of a second conductivity type that is different from the first conductivity type, and one of the source region and the drain region includes an extension region extending toward the other region, the extension region being positioned under the channel region to form a constant current independent of a gate voltage of the gate electrode.

Abstract: Provided are an inverter including a first source and drain, an interlayer insulating film on the first source, a second source on the interlayer insulating film, a second drain on the first drain, a first channel between the first source and drain, a second channel over the first channel between the second source and drain, a gate insulating film covering outer surfaces of the first and second channel, a part of a surface of the first source in the direction to the first drain, a part of a surface of the second source in the direction to the second drain, a part of a surface of the first drain in the direction to the first source, and a part of a surface of the second drain in the direction to the second source, and a gate electrode between the first source and drain and between the second source and drain.

Abstract: A field-effect transistor for terahertz wave detection using a gate as an antenna includes a silicon substrate including a source and a drain formed outside a channel region surrounding the source, and a gate formed to be spaced apart from the silicon substrate and correspond to the channel region, on a dielectric layer formed on a surface of the silicon substrate, in which the drain has a width determined based on a first performance parameter associated with a terahertz wave reception rate of the field-effect transistor and the channel region has a width determined based on a second performance parameter associated with detection of a terahertz wave to be received by the field-effect transistor.

Abstract: Provided is a memory device for a logic-in-memory. The memory cell includes: a ternary memory cell for storing ternary data: and a weight cell for controlling a current flowing in an operation line on the basis of a weight signal transmitted from the ternary memory cell and an activation signal transmitted via an activation line, wherein the weight cell includes a first transistor for receiving an input of weight data from a first node corresponding to a stored value of the ternary memory cell, a second transistor for receiving an input of inversed weight data from a second node corresponding to an inversed stored value of the ternary memory cell, and a third transistor for receiving an input of an activation signal transmitted via the activation line.

Abstract: Disclosed is a TCAM device based on a ternary memory cell. A TCAM cell includes a ternary memory cell for storing ternary data and a comparison circuit for obtaining a stored value stored in the ternary memory cell and a search value input via a search line of a search driver, identifying a data match between the stored value and the search value, and outputting a result of the identification via a match line. The comparison circuit includes a first transistor pair that receives an inverted stored value that is an inverted value of the stored value of the ternary memory cell and the search value and a second transistor pair that receives the stored value of the ternary memory cell and an inverted search value that is an inverted value of the search value. The first transistor pair and the second transistor pair are connected in parallel to each other.