Abstract: Disclosed is a TCAM device based on a ternary memory cell. A TCAM cell includes a ternary memory cell for storing ternary data and a comparison circuit for obtaining a stored value stored in the ternary memory cell and a search value input via a search line of a search driver, identifying a data match between the stored value and the search value, and outputting a result of the identification via a match line. The comparison circuit includes a first transistor pair that receives an inverted stored value that is an inverted value of the stored value of the ternary memory cell and the search value and a second transistor pair that receives the stored value of the ternary memory cell and an inverted search value that is an inverted value of the search value. The first transistor pair and the second transistor pair are connected in parallel to each other.

Abstract: A ternary logic circuit includes: a first inverter unit; a second inverter unit arranged in parallel with the first inverter unit; a first junction unit arranged between the first inverter unit and an output terminal and including a tunnel PN junction; and a second junction unit arranged between the second inverter unit and the output terminal and including a tunnel PN junction, wherein, when an absolute value of an input voltage applied to an input terminal is less than a first input voltage, the output terminal outputs a first output voltage, and when the absolute value of the input voltage is greater than the first input voltage and less than a second input voltage, the output terminal outputs a second output voltage, and when the absolute value of the input terminal is greater than the second input voltage, the output terminal outputs a third output voltage.

Abstract: A tunnel field effect transistor includes a constant current formation layer, a source region and a drain region provided on the constant current formation layer, a channel layer provided between the source region and the drain region, a gate electrode provided on the channel layer, and a gate insulating film provided between the gate electrode and the channel layer, wherein the source region and the drain region have different conductivity types, and the constant current formation layer forms a constant current between the drain region and the constant current formation layer.

Abstract: A transistor includes: a substrate; a constant current formation layer provided on the substrate; a pair of source/drain patterns provided on the constant current formation layer; a gate electrode provided between the pair of source/drain patterns; a channel pattern extending in a direction between the pair of source/drain patterns; and a gate insulating layer surrounding the channel pattern, wherein the channel pattern penetrates the gate insulating layer and the gate electrode and is electrically connected to the source pattern and the drain pattern, the gate insulating layer separates the channel pattern and the gate electrode from each other, the constant current formation layer generates a constant current between the drain pattern and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: A transistor includes a substrate; a pair of constant current forming regions provided in the substrate; a pair of source/drain regions respectively provided on the pair of constant current forming regions in the substrate; and a gate structure provided between the pair of source/drain regions, wherein any one of the constant current forming regions immediately adjacent to any one of the pair of source/drain regions serving as a drain forms a constant current between the any one of the pair of source/drain region serving as the drain and the any one of the constant current forming regions.

Abstract: Provided is a transistor including: a constant current formation layer; a channel layer provided on the constant current formation layer; a pair of source/drain regions spaced apart from each other, with the channel layer therebetween on the constant current formation layer; a gate electrode provided on the channel layer; and a gate ferroelectric film provided between the gate electrode and the channel layer.

Abstract: An antenna device according to an example embodiment includes a silicon substrate of first type doping, at least two first doped regions formed by second type doping different from the first type doping, a second doped region formed by the second type doping outside a channel region surrounding the at least two first doped regions, and at least two gates disposed on a dielectric layer. In the antenna device, a resonant frequency is adjusted according to an external voltage individually applied to the at least two gates, and polarization information of a terahertz (THz) light source is obtained based on a pattern and an amount of an electric field measured at the at least two gates.

Abstract: An electroluminescent display device includes a display panel including a plurality of pixels connected to a plurality of sensing lines, a plurality of sampling circuits configured to simultaneously sample driving characteristics of the pixels to generate sampling outputs, a plurality of sampling multiplexers configured to divide the sampling outputs into n groups and to alternately select group sampling outputs, a plurality of scalers individually connected to the sampling multiplexers, and a global multiplexer configured to selectively connect outputs of the scalers to an analog-to-digital conversion circuit, wherein the number of scalers is less than the number of sampling circuits.

Abstract: A light emitting display device includes a display panel configured to display an image, a data driver configured to supply a data voltage to data lines of the display panel, and a sensing circuit configured to obtain a sensing voltage through sensing lines of the display panel after reflecting a negative impedance value canceling impedance differences of the sensing lines.

Abstract: The present disclosure relates to an apparatus for diagnosing a state of a photovoltaic device, a building Integrated Photovoltaics (BIPV) device, etc., and more particularly to an apparatus for diagnosing photovoltaic power generation, which diagnoses a state of the specific photovoltaic device by comparing the difference in power generation between grouped photovoltaic devices through analysis of power generation for the same period in the past through machine learning, etc., wherein the apparatus processes power generation information, which is collected from the photovoltaic devices, based on failure history and maintenance and repair information of each photovoltaic device and performs precise grouping by minimizing error information regarding a power generation trend based on information such as regional weather information and environment information for a region where each photovoltaic device is located, so that a power generation trend can be analyzed with improved accuracy of analysis of state.

Abstract: According to an embodiment of the present disclosure, a memory device for a logic-in-memory may include a cell array including a plurality of ternary memory cells, a row decoder configured to select at least one ternary memory cell from among the plurality of ternary memory cells, and a page buffer configured to provide a first value to the at least one ternary memory cell and latch a third value obtained by performing a logic operation on the first value and a second value stored in the at least one ternary memory cell and/or the second value.

Abstract: In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.

Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region spaced apart from the source region in a direction parallel to a top surface of the substrate, a pair of constant current generating patterns provided in the substrate to be adjacent to the source region and the drain region, respectively, a gate electrode provided on the substrate and between the source region and the drain region, and a gate insulating film interposed between the gate electrode and the substrate, wherein, the pair of constant current generating patterns generate a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region in the substrate, spaced apart from the source region in a direction parallel to a top surface of the substrate, a gate electrode provided on the substrate and between the source region and the drain region, a gate insulating film interposed between the gate electrode and the substrate, and a constant current generating layer extending between the source region and the drain region, in the direction parallel to the top surface of the substrate, wherein the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: The light emitting display apparatus includes a substrate including a display area including a plurality of pixel areas and a non-display area surrounding the display area, a plurality of gate lines passing through the display area of the substrate, a plurality of data lines passing through the display area of the substrate, a plurality of pixel driving power lines passing through the display area of the substrate, a plurality of pixels respectively provided in the plurality of pixel areas of the substrate and connected to an adjacent gate line, an adjacent data line, and an adjacent pixel driving power line, and a gate buffer provided in the display area of the substrate and connected to a corresponding gate line of the plurality of gate lines.

Abstract: Disclosed is a light emitting display apparatus. The light emitting display apparatus includes a substrate including a display area including a plurality of pixel areas and a non-display area surrounding the display area, first to nth gate lines passing through the display area of the substrate, first to mth data lines passing through the display area of the substrate, first to mth pixel driving power lines passing through the display area of the substrate, a plurality of pixels provided in at least one pixel area of the substrate and connected to an adjacent gate line, an adjacent data line, and an adjacent pixel driving power line, and at least one data buffer chip provided in the display area of the substrate and connected to a corresponding data line of the first to mth data lines. Accordingly, a constant data voltage charging rate of each of the pixels is maintained regardless of a distance between a data driving circuit and each of the pixels.

Abstract: A display apparatus including a substrate including a display area includes a plurality of pixel areas and a non-display area surrounding the display area, a plurality of pixels including a pixel driving chip provided in each of the plurality of pixel areas of the substrate and a light emission part connected to the pixel driving chip, and a plurality of touch electrodes disposed in the display area to overlap two or more pixels. A first pixel driving chip of two or more pixel driving chips overlapping a corresponding touch electrode of the plurality of touch electrodes is connected to the corresponding touch electrode.

Abstract: Disclosed is a light emitting display apparatus. The light emitting display apparatus includes a plurality of pixels provided in a display area of a substrate and connected to a data line, a clock line, and a pixel driving power line. The plurality of pixels each include a pixel driving chip connected to the data line, the clock line, and the pixel driving power line to sequentially output a driving current through a plurality of output terminals thereof and a plurality of light emitting devices respectively connected to the plurality of output terminals. Accordingly, a gate driving circuit and a gate line connected to the gate driving circuit are removed from one end of a display panel and omitted, thereby minimizing the number of pad parts disposed in the display panel.

Abstract: A scanner module and an image scanning apparatus employing the same. The scanner module comprises an illuminator for illuminating light on an object to be scanned. The illuminator includes a light emitting diode, a light guide extending in a main scanning direction to change a direction of the light received from the light emitting diode, and at least one elastic member to elastically support at least one longitudinal end of the light guide. As the light guide is elastically supported by the elastic member, convex deformation or bowing of an emission face of the light guide due to thermal expansion can be reduced.