Abstract: A hydrogen supply method includes a two-side heat exchange mode in which both introducing a second fluid into a hydrogen storage part after the second fluid exchanges heat with a first fluid in a second heat exchanger in a state in which a compressor is driven to compress the first fluid and introducing the second fluid into the hydrogen storage part after the second fluid is heated or cooled in a thermal device are performed. The method also includes a one-side heat exchange mode in which one of introducing the second fluid into the hydrogen storage part after the second fluid exchanges heat with the first fluid in the second heat exchanger in a state in which the compressor is driven to compress the first fluid and introducing the second fluid into the hydrogen storage part after the second fluid is heated or cooled in the thermal device is performed.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: A display device comprises a display area comprising a plurality of pixels, and a data line and a gate line electrically connected to the plurality of pixels, a non-display area disposed adjacent to the display area, a plurality of pads disposed on a side of the non-display area, a gate control line electrically connected to at least one of the plurality of pads and that supplies a gate control signal, a driving voltage line electrically connected to at least one of the plurality of pads and that supplies a driving voltage, an antistatic circuit electrically connected to the gate control line, a scan driver that generates a gate signal based on a gate control signal received from the gate control line and that supplies the gate signal to the gate line, and a shielding layer integral to the driving voltage line to overlap the top of the antistatic circuit.

Abstract: As inputs of a controller of a direct current (DC)-DC converter are sampled for a predetermined time and thus two-dimensional state information in which one axis is an input physical quantity and the other axis is a time is generated, the two-dimensional state information is processed by a convolutional neural network to determine and output one of a plurality of control signals. An artificial intelligence control part may operate in accordance with a plurality of operation conditions or dynamically determined operation conditions by applying different artificial intelligence engines according to operation modes.

Abstract: A battery unit for a vehicle is provided. The battery unit includes a lower case having two battery compartments arranged in a direction toward opposite sides of the vehicle, respectively, and a connecting portion bent to be convex upwardly between the two battery compartments. A reinforcing structure is disposed on the connecting portion. Two battery modules are installed in the two battery compartments, respectively and a power wire is electrically connected to at least one of the two battery modules and extends from one of the two battery compartments to the other one of the two battery compartments through the connecting portion.

Abstract: In a method of reading a resistive memory device according to an embodiment, a memory cell including a selection element and a variable resistance element is prepared. The selection element exhibits a snap-back behavior on a current-voltage sweep curve for the memory cell. First and second read voltages to be applied to the memory cell are determined within a voltage range in which the selection element maintains a turned-on state. The magnitude of the second read voltage is less than that of the first read voltage and selected in a voltage range in which the selection element exhibits the snap-back behavior. The first read voltage is applied to the memory cell to measure a first cell current. The second read voltage is applied to the memory cell to measure a second cell current. A resistance state stored in the memory cell is determined based on the first cell current and the second cell current.

Abstract: An electronic device may include a semiconductor memory. The semiconductor memory may include a stack in which a plurality of dielectric layers and a plurality of first electrodes are alternately stacked over a substrate in a vertical direction relative to the substrate; a hole pattern passing through the stack in the vertical direction and having a polygonal shape when viewed in a plan view; a plurality of second electrodes disposed on respective sidewalls of the hole pattern; and a plurality of variable resistance layers interposed between the plurality of second electrodes and the plurality of horizontal electrodes.

Abstract: In a method of reading a resistive memory device according to an embodiment, a memory cell including a selection element and a variable resistance element is prepared. The selection element exhibits a snap-back behavior on a current-voltage sweep curve for the memory cell. First and second read voltages to be applied to the memory cell are determined within a voltage range in which the selection element maintains a turned-on state. The magnitude of the second read voltage is less than that of the first read voltage and selected in a voltage range in which the selection element exhibits the snap-back behavior. The first read voltage is applied to the memory cell to measure a first cell current. The second read voltage is applied to the memory cell to measure a second cell current. A resistance state stored in the memory cell is determined based on the first cell current and the second cell current.

Abstract: A method of fabricating a light emitting diode (LED) includes: sequentially stacking a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate; and separating the substrate into unit chips, and at the same time, forming a concavo-convex structure having the shape of irregular vertical lines in a side surface of the unit chip.

Abstract: Provided are a substrate having concave-convex patterns, a light-emitting diode (LED) including the substrate, and a method of fabricating the LED. The LED includes a substrate, and concave-convex patterns disposed in an upper surface of the substrate and having convexes and concaves defined by the convexes. Unit light-emitting device having a first conductive semiconduct or layer, an active layer, and a second conductive semiconductor layer disposed on the substrate in sequence is present.

Abstract: A threshold switching device may include: a first electrode layer; a second electrode layer; an insulating layer interposed between the first and second electrode layers and containing a plurality of neutral defects; and an additional insulating layer interposed between the insulating layer and one or each of the first and second electrode layers, and being substantially free from neutral defects, and wherein the threshold switching device has an ON or OFF state according to whether electrons are ejected from the plurality of neutral defects.

Abstract: A method for fabricating a semiconductor device and a method for operating the semiconductor device are provided. The method for fabricating a semiconductor device includes forming a first electrode layer; forming a material layer, including conductive path components, over the first electrode layer; forming a second electrode layer over the material layer; performing a forming operation, which includes initially creating, in the material layer, a conductive path that electrically connects the first electrode layer to the second electrode layer by applying one of a predetermined voltage and a predetermined current between the first and second electrode layers, the conductive path including the conductive path components; and performing a first heat-treatment process at a predetermined temperature that removes some of the conductive path components from the conductive path, wherein a resistance state of the material layer changes based on the creation or dissolution of the conductive paths.

Abstract: A method of manufacturing a switching element includes forming a pillar-shaped structure over a substrate, performing a dopant injection process to form a first doping region in an insulation layer. The method further includes performing the dopant injection process to form a second doping region in a first electrode, to form a third doping region in a second electrode, or both. The pillar-shaped structure includes the first electrode, the insulation layer, and the second electrode that are disposed over a substrate. The first and second doping regions form a first interface therebetween, and the first and third doping regions form a second interface therebetween. The first doping region corresponds to a region in which a threshold switching operation region is performed.

Abstract: A method for operating an electronic device including a variable resistance element comprises performing a reset operation on the variable resistance element. The variable resistance element is fully reset by a first reset voltage applied thereto. The performing of the reset operation includes applying a second reset voltage to the variable resistance element, the second reset voltage having a magnitude smaller than that of the first reset voltage, determining whether the variable resistance element is mildly reset or not, and applying a third reset voltage to the variable resistance element when it is determined that the variable resistance element is mildly reset, or terminating the reset operation when it is determined that the variable resistance element is fully reset, the third reset voltage having a magnitude smaller than that of the first reset voltage.

Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a line-type first electrode layer having at least one protrusion and extending in a first direction, and a plurality of memory elements, each memory element including a variable resistance layer and a second electrode, the variable resistance layers of the memory elements being disposed over a top surface and two parallel side surfaces of the protrusion, respectively, the two parallel side surfaces of the protrusion being arranged in the first direction, the second electrodes of the memory elements being disposed over the variable resistance layers of the memory elements, respectively.

Abstract: An electronic device includes a semiconductor memory that includes: a memory cell coupled between a first line and a second line; a first selection block configured to select the first line; a second selection block configured to select the second line; an alternate current supply block configured to supply, during a read operation, an alternate current corresponding to a resistance state of the memory cell; and a sensing block configured to sense, during the read operation, at least one of a cell current flowing through the memory cell and the alternate current.

Abstract: A method for operating an electronic device including a variable resistance element comprises performing a reset operation on the variable resistance element. The variable resistance element is fully reset by a first reset voltage applied thereto. The performing of the reset operation includes applying a second reset voltage to the variable resistance element, the second reset voltage having a magnitude smaller than that of the first reset voltage, determining whether the variable resistance element is mildly reset or not, and applying a third reset voltage to the variable resistance element when it is determined that the variable resistance element is mildly reset, or terminating the reset operation when it is determined that the variable resistance element is fully reset, the third reset voltage having a magnitude smaller than that of the first reset voltage.

Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a vertical electrode formed over a substrate; a plurality of first memory elements and a plurality of first interlayer dielectric layers alternately stacked along a first side surface of the vertical electrode; and a plurality of second memory elements and a plurality of second interlayer dielectric layers alternately stacked along a second side surface of the vertical electrode, and the plurality of first memory elements correspond to the plurality of second interlayer dielectric layers, respectively, in the vertical direction.

Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory includes first and second selecting elements coupled to a variable resistance element, and each of the first and second selecting elements includes a single-electron transistor.

Abstract: A method of fabricating a light emitting diode (LED) includes: sequentially stacking a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate; and separating the substrate into unit chips, and at the same time, forming a concavo-convex structure having the shape of irregular vertical lines in a side surface of the unit chip.