Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region spaced apart from the source region in a direction parallel to a top surface of the substrate, a pair of constant current generating patterns provided in the substrate to be adjacent to the source region and the drain region, respectively, a gate electrode provided on the substrate and between the source region and the drain region, and a gate insulating film interposed between the gate electrode and the substrate, wherein, the pair of constant current generating patterns generate a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: Provided are an inverter including a first source and drain, an interlayer insulating film on the first source, a second source on the interlayer insulating film, a second drain on the first drain, a first channel between the first source and drain, a second channel over the first channel between the second source and drain, a gate insulating film covering outer surfaces of the first and second channel, a part of a surface of the first source in the direction to the first drain, a part of a surface of the second source in the direction to the second drain, a part of a surface of the first drain in the direction to the first source, and a part of a surface of the second drain in the direction to the second source, and a gate electrode between the first source and drain and between the second source and drain.

Abstract: Provided is a transistor including: a constant current formation layer; a channel layer provided on the constant current formation layer; a pair of source/drain regions spaced apart from each other, with the channel layer therebetween on the constant current formation layer; a gate electrode provided on the channel layer; and a gate ferroelectric film provided between the gate electrode and the channel layer.

Abstract: In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.

Abstract: Provided is a method and an apparatus for targeting an object in a game. The method of targeting an object in a game includes: setting a center point of a first targeting area based on a first input from a user; displaying the first targeting area surrounded by a closed curve around the center point on a screen of a user terminal; displaying a list including at least one object located in the first targeting area on the screen; and moving the first targeting area based on a second input by the user received after the first input.

Abstract: Proposed is a solar power leveling system, more particularly, a solar power leveling system via string-based power compensation, wherein outputs between strings are equalized by charging or discharging using a power compensation device so that output through solar power generation is maximized with a simple device configuration, and when there is reduction in output of a plurality of strings, compensation power for maximizing the total string output is calculated to achieve power compensation, whereby the power compensation device performs power compensation with a single discharging part and maximizes the total power generation amount of the strings connected to each other in parallel.

Abstract: In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.

Abstract: Provided is a transistor including: a constant current formation layer; a channel layer provided on the constant current formation layer; a pair of source/drain regions spaced apart from each other, with the channel layer therebetween on the constant current formation layer; a gate electrode provided on the channel layer; and a gate ferroelectric film provided between the gate electrode and the channel layer.

Abstract: In a roller gap measurement system and a roller gap measurement method using the roller gap measurement system, the roller gap measurement system includes a light source, a refractive part, a sensor part and an image processing part. The light source is configured to provide an incident light toward the gap between first and second rollers. The refractive part is configured to receive a complex light passing through the gap between the first and second rollers, and configured to refract the complex light. The sensor part is configured to receive the refracted light and configured to image a complex pattern. The image processing part is configured to obtain a gap information between the first and second rollers, based on the imaged complex pattern.

Abstract: A transistor includes a substrate; a pair of constant current forming regions provided in the substrate; a pair of source/drain regions respectively provided on the pair of constant current forming regions in the substrate; and a gate structure provided between the pair of source/drain regions, wherein any one of the constant current forming regions immediately adjacent to any one of the pair of source/drain regions serving as a drain forms a constant current between the any one of the pair of source/drain region serving as the drain and the any one of the constant current forming regions.

Abstract: A transistor includes a substrate; a pair of constant current forming regions provided in the substrate; a pair of source/drain regions respectively provided on the pair of constant current forming regions in the substrate; and a gate structure provided between the pair of source/drain regions, wherein any one of the constant current forming regions immediately adjacent to any one of the pair of source/drain regions serving as a drain forms a constant current between the any one of the pair of source/drain region serving as the drain and the any one of the constant current forming regions.

Abstract: A display device may include a plurality of subpixels respectively connected to a plurality of data lines; a data driving circuit configured to convert a compensated digital image data into an analog data voltage and to supply the analog data voltage to the data lines; a large-capacity memory configured to store initial compensation data based on a characteristic value for each of the plurality of subpixels; a high-speed memory configured to store sampled compensation data sampled from the initial compensation data for less than all of the plurality of subpixels in one frame; and a timing controller configured to control the gate driving circuit and the data driving circuit, to determine final compensation data based on at least one of the sampled compensation data and the initial compensation data, and to output the compensated digital image data based on an input image data and the final compensation data.

Abstract: A tunnel field effect transistor includes a constant current formation layer, a source region and a drain region provided on the constant current formation layer, a channel layer provided between the source region and the drain region, a gate electrode provided on the channel layer, and a gate insulating film provided between the gate electrode and the channel layer, wherein the source region and the drain region have different conductivity types, and the constant current formation layer forms a constant current between the drain region and the constant current formation layer.

Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: A ternary logic circuit includes: a first inverter unit; a second inverter unit arranged in parallel with the first inverter unit; a first junction unit arranged between the first inverter unit and an output terminal and including a tunnel PN junction; and a second junction unit arranged between the second inverter unit and the output terminal and including a tunnel PN junction, wherein, when an absolute value of an input voltage applied to an input terminal is less than a first input voltage, the output terminal outputs a first output voltage, and when the absolute value of the input voltage is greater than the first input voltage and less than a second input voltage, the output terminal outputs a second output voltage, and when the absolute value of the input terminal is greater than the second input voltage, the output terminal outputs a third output voltage.

Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.

Abstract: Proposed is a solar power leveling system, more particularly, a solar power leveling system via string-based power compensation, wherein outputs between strings are equalized by charging or discharging using a power compensation device so that output through solar power generation is maximized with a simple device configuration, and when there is reduction in output of a plurality of strings, compensation power for maximizing the total string output is calculated to achieve power compensation, whereby the power compensation device performs power compensation with a single discharging part and maximizes the total power generation amount of the strings connected to each other in parallel.

Abstract: The technology disclosed in the present disclosure is a method for correcting a yaw of an X-Y stage, including: moving an XY moving body in an X-axis or Y-axis direction using an actuator; measuring a yaw, which is a rotational displacement of the moved XY moving body, using a sensor; calculating, by a controller, a rotational stiffness value to be corrected, using the measured yaw data; and adding yaw correction flexures having a stiffness corresponding to the rotational stiffness value to be corrected to the X-Y stage.

Abstract: A display device includes a display panel configured to display an image, a gate driver connected to gate lines of the display panel, and a data driver connected to data lines of the display panel, and the data driver provides duplicates of red, green and blue data signals, except for a white data signal, in a digital data signal having a 4:2:0 format externally input thereto, and converts the white data signal, the red, green and blue data signals, and the duplicated red, green and blue data signals, thereby outputting an analog data voltage having a 4:4:4 format.

Abstract: The present disclosure relates to an apparatus for diagnosing a state of a photovoltaic device, a building Integrated Photovoltaics (BIPV) device, etc., and more particularly to an apparatus for diagnosing photovoltaic power generation, which diagnoses a state of the specific photovoltaic device by comparing the difference in power generation between grouped photovoltaic devices through analysis of power generation for the same period in the past through machine learning, etc., wherein the apparatus processes power generation information, which is collected from the photovoltaic devices, based on failure history and maintenance and repair information of each photovoltaic device and performs precise grouping by minimizing error information regarding a power generation trend based on information such as regional weather information and environment information for a region where each photovoltaic device is located, so that a power generation trend can be analyzed with improved accuracy of analysis of state.