Patents by Inventor Kyusik Sin

Kyusik Sin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7248431
    Abstract: A method of fabricating a write head for perpendicular recording is provided. The write head has a pole, a shield in proximity to the pole, and a gap between the pole and the shield. The method includes forming a pole layer on an undercoat layer, forming a mask over at least a portion of the pole layer, and forming the pole by removing material from the pole layer. The pole has a top surface, a first side, and a second side. The method further includes forming a first gap portion of the gap along the first side and along the second side of the pole, forming a protective layer over at least a portion of the first gap portion, removing the mask, and removing the protective layer. The method further includes forming a second gap portion of the gap over at least the top surface of the pole and forming the shield over at least the second gap portion.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: July 24, 2007
    Inventors: Yinshi Liu, Benjamin Chen, Kyusik Sin, Hongping Yuan
  • Patent number: 7239478
    Abstract: A write element for perpendicular recording in a data storage system is fabricated to maintain the thickness of a side shield at both edges of a pole P3, and to form the pole P3 in a trapezoidal shape. Forming a side shield around the pole P3 removes stray fields, creating a quiet, noise-free write element and preventing side erasure. The fabrication method utilizes a magnetic buffer layer to protect a shield gap during trim of the pole P3, and thus to provide the shield gap with a uniform thickness. The magnetic buffer layer also protects the shield gap and pole P3 when the top hard mask is removed. Consequently, the write field is made uniform across the track width. The fabrication method uses a metal in the shield gap to improve the pole geometry after pole trim and to provide a uniform edge to the pole P3.
    Type: Grant
    Filed: January 31, 2004
    Date of Patent: July 3, 2007
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kyusik Sin, Yinshi Liu, Benjamin Chen, Francis H. Liu
  • Patent number: 7177117
    Abstract: A magnetic head comprising a first layer containing NiFe having a concentration of iron that is at least thirty percent and not more than seventy percent; a second layer that adjoins the first layer and contains FeCoN having a concentration of iron that is greater than the second layer's concentration of cobalt, having a concentration of nitrogen that is less than the second layer's concentration of cobalt and less than three percent; and a third layer containing FeCoNi having a concentration of nickel that is less than eight percent, having a concentration of cobalt that is less than the third layer's concentration of iron and greater than the third layer's concentration of nickel, the third layer adjoining only one of the first and second layers. The first and second layers may be repeated to form a magnetically soft high BS laminate for a pole layer.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: February 13, 2007
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Hai Jiang, Kyusik Sin, Yingjian Chen
  • Patent number: 7134185
    Abstract: A method and system for forming a microscopic transducer are described. The method and system include forming a plurality of adjoining sensor layers. The sensor layers include a first magnetically soft layer, a nonmagnetic layer on the first magnetically soft layer, and a second magnetically soft layer on the nonmagnetic layer. The method and system also include forming a sidewall over the second magnetically soft layer. The sidewall formation includes forming a base having a surface oriented substantially perpendicular to the sensor layers and depositing an electrically conductive material on the surface. The method and system also include removing a portion of the sensor layers not covered by the sidewall.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: November 14, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kenneth E. Knapp, Kyusik Sin
  • Patent number: 7110289
    Abstract: In a method and system for reducing power consumed by a magnetic memory, magnetic memory cells are coupled to a bit line and are associated with a plurality of digit lines. A bit line current is provided in the bit line. Digit currents are provided in parallel in the digit lines at substantially the same time as the bit line current. The digit and bit line currents allow the magnetic memory cells to be written to a plurality of states in parallel.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: September 19, 2006
    Assignees: Western Digital (Fremont), Inc., STMicroelectronics S.R.L.
    Inventors: Kyusik Sin, Hugh Craig Hiner, Xizeng (Stone) Shi, William D. Jensen, Hua-Ching Tong, Matthew R Gibbons, Roberto Bez, Giulio Casagrande, Paolo Cappeletti, Marco Pasotti
  • Patent number: 7027274
    Abstract: A hard biased spin-dependent tunneling sensor and manufacturing method therefor is provided having a substrate with a first lead formed thereon. A hard magnet is formed over the first lead and a free layer is formed over the hard magnet. A tunneling barrier layer with a first pinned layer formed thereon is formed over the free layer. A nonmagnetic coupling layer with a second pinned layer formed thereon is formed over the first pinned layer. A pinning layer is formed over the second pinned layer and a second lead is formed over the pinning layer.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: April 11, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kyusik Sin, Yingjian Chen
  • Patent number: 7012832
    Abstract: A magnetic random access memory (MRAM) device has increased ?R/R for sensing a state of a pin-dependent tunneling (SDT) device. The MRAM device includes plural transistors connected to a read line for sensing the state of the SDT device. Plural transistors lower an underlying resistance during reading, increasing ?R/R. The plural transistors can share a source region.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: March 14, 2006
    Assignees: WEstern Digital (Fremont), Inc., STMicroelectronics, S.r.I.
    Inventors: Kyusik Sin, Matthew R. Gibbons, William D. Jensen, Hugh Craig Hiner, Xizeng Stone Shi, Roberto Bez, Giulio Casagrande, Paolo Cappelletti
  • Patent number: 6958885
    Abstract: A computer disk drive (22) having a write head (52) which includes a coil (38), a photoresist insulation layer (66) formed on the coil (38), and an insulation shell layer (102) which is formed on the photoresist insulation layer (66). In the first preferred embodiment (100), the top pole (42) of the write head (52) is formed on the insulation shell layer (102). In the second preferred embodiment (200), the disk drive write gap (76) is formed on the insulation shell layer (102) and the top pole (42) of the write head (52) is formed on the write gap (76). The insulation shell layers (102) in both embodiments are preferably made of dielectric materials (103). Methods of fabrication for these embodiments are also disclosed.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: October 25, 2005
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Yingjian Chen, Kyusik Sin, Ronald Barr
  • Patent number: 6888184
    Abstract: A magnetic memory fabricated on a semiconductor substrate is disclosed. The method and system include a plurality of magnetic tunneling junctions and a plurality of shields for magnetically shielding the plurality of magnetic tunneling junctions. Each of the plurality of magnetic tunneling junctions includes a first ferromagnetic layer, a second ferromagnetic layer and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. At least a portion of the plurality of shields have a high moment and a high permeability and are conductive. The plurality of shields are electrically isolated from the plurality of magnetic tunneling junctions. The plurality of magnetic tunneling junctions are between the plurality of shields.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: May 3, 2005
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Xizeng Shi, Matthew Gibbons, Hua-Ching Tong, Kyusik Sin
  • Patent number: 6809899
    Abstract: Electromagnetic transducers are disclosed having write poles with a leading edge that is smaller than a trailing edge, which can reduce erroneous writing for perpendicular recording systems. The write poles may have a trapezoidal shape when viewed from a direction of an associated medium. The write poles may be incorporated in heads or sliders that also contain read elements such as magnetoresistive sensors, and may be employed with information storage systems such as disk drives.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: October 26, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Yingjian Chen, Yugang Wang, Francis Liu, Xizeng Shi, Kyusik Sin, Hugh Craig Hiner
  • Patent number: 6803615
    Abstract: An MRAM cell includes a pinned layer, a free layer, and a bit line with a magnetic sheath. The magnetic sheath allows a magnetic field to circulate in a loop around the bit line. The looping magnetic field can couple with the magnetic field of the free layer for enhanced stability with respect to stray magnetic fields and elevated temperatures.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: October 12, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kyusik Sin, Xizeng Shi, Hugh Craig Hiner
  • Patent number: 6785955
    Abstract: A method and system for providing a writer is disclosed. The method and system include providing a first pole, an insulator covering a portion of the first pole and a coil on the first insulator. The coil includes a plurality of turns. The method and system also include providing a second insulator covering the coil, providing a second pole on the second insulator and providing a write gap separating a portion of the first pole from a second portion of the second pole. A first portion of the second pole is coupled with the first pole. In one aspect, the method and system include providing a coil having a plurality of turns with a pitch of no more than 1.2 micrometers. In another aspect, the plurality of turns of the coil is provided using a hard mask layer on a photoresist layer. A portion of the hard mask layer and a portion of the photoresist layer define a plurality of spaces between the pluralities of turns of the coil. In another aspect, the writer is a pedestal defined zero throat writer.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: September 7, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Yingjian Chen, Hugh Craig Hiner, Benjamin Chen, Xizeng Shi, Kyusik Sin
  • Patent number: 6747301
    Abstract: A tunneling barrier for a spin dependent tunneling (SDT) device is disclosed that includes a plurality of ferromagnetic atoms disposed in a substantially homogenous layer. The presence of such atoms in the tunneling barrier is believed to increase a magnetoresistance or &Dgr;R/R response, improving the signal and the signal to noise ratio. Such an increase &Dgr;R/R response also offers the possibility of decreasing an area of the tunnel barrier layer. Decreasing the area of the tunnel barrier layer can afford improvements in resolution of devices such as MR sensors and increased density of devices such as of MRAM cells.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: June 8, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Hugh Craig Hiner, Kyusik Sin, Shin Funada, Xizeng Shi, Hua-Ching Tong
  • Patent number: 6744608
    Abstract: A method and system for providing a tunneling magnetoresistive sensor is disclosed. The method and system include providing a pinned layer, a free layer and an insulating layer between the pinned and free layers. The pinned and free layers are ferromagnetic. The method and system also include providing a hard mask layer to be used in defining the sensor at the top of the tunneling magnetoresistive sensor. The method and system also include using the hard mask layer to define the tunneling magnetoresistive sensor. Thus, the pinned layer, the free layer and the insulating layer are capable of having a minimum dimension of less than 0.2 &mgr;m.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: June 1, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kyusik Sin, Kristian M. Bjelland, Benjamin Chen, Hugh C. Hiner, Xizeng Shi
  • Patent number: 6724569
    Abstract: Embodiments in accordance with the thin film write head of the present invention have a lower pole structure, an upper pole structure, and a multilayer write gap extending from an air bearing surface between the upper and lower pole structures. In preferred embodiments, the write gap comprises at least two of: (a) a first layer covering a lower pole tip portion of the lower pole structure, (b) a second layer covering turns of a semiconductor winding, or (c) a third layer covering a winding insulation stack. In more preferred embodiments, the write gap is formed of the first, the second, and the third write gap layers. An advantage of a write head with a multilayer write gap is that it allows better control of write gap thickness. As such, loss of write gap thickness can be compensated for by deposition of the second write gap layers, or by deposition of the third write gap layer.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: April 20, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Yingjian Chen, Kyusik Sin, Ronald A. Barr
  • Patent number: 6713801
    Abstract: A method and system for providing a tunneling junction is disclosed. The method and system includes providing a free layer, a pinned layer, and a barrier between the free layer and the pinned layer. The free layer and the pinned layer are ferromagnetic. The barrier layer is an insulator. The magnetic tunneling junction is coupled to an &agr;-Ta lead.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: March 30, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kyusik Sin, Hugh C. Hiner, Xizeng Shi
  • Patent number: 6707083
    Abstract: A method and system for providing a magnetic tunneling junction is disclosed. The method and system includes providing a free layer, a pinned layer, and a barrier between the free layer and the pinned layer. The free layer and the pinned layer are ferromagnetic. The barrier layer is an insulator. The magnetic tunneling junction is coupled to a bit line. The bit line includes a ferromagnetic liner and a nonmagnetic core. The nonmagnetic core includes a top, a bottom and sides. The ferromagnetic liner includes at least one tab and is adjacent to the sides and a portion of the bottom of the nonmagnetic core. The at least one tab is adjacent to the portion of the bottom of the nonmagnetic core.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: March 16, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Hugh C. Hiner, Kyusik Sin, Matthew Gibbons, Xizeng Shi
  • Patent number: 6700738
    Abstract: A thin film read/write head with a high performance inductive write section that incorporates a single layer coil with an improved fabrication method of a center tab of the single layer coil. The center tab is formed before the main body of the single layer coil is formed. Several advantages can thus be achieved. The coil resistance and inductance can be monitored for all the devices immediately after the coil fabrication to improve yield by identifying additional processing or rework before final production. Several conventional wafer processing steps can be eliminated, thereby shortening the cycle time of wafer processing. The chance of corrosion or delamination of the second pole P2 is significantly reduced.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: March 2, 2004
    Inventors: Kyusik Sin, Yingjian Chen
  • Patent number: 6700759
    Abstract: An electrically conductive sidewall for an electromagnetic transducer having a magnetoresistive sensor is formed as a layer oriented substantially perpendicular to other layers of the sensor, and is used as a mask for defining the width of the sensor. This allows the sensor to be made much thinner than conventional sensors, providing higher resolution in a track width direction. The sidewall can be nonmagnetic, serving as a spacer between the magnetic sensor layers and an adjacent magnetic shield without the need for a protective cap to guard against damage from polishing and wet etching. Alternatively, the sidewall can be magnetic, serving as an extension of the shield. In either case, the sidewall reduces the effective length of the sensor for linear resolution, sharpening the focus of the sensor and increasing linear density. Also reduced is the tolerance for error in sensor width and length.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: March 2, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kenneth E. Knapp, Kyusik Sin
  • Patent number: 6683763
    Abstract: A method and structure for providing a tunneling magnetoresistive (TMR) element is disclosed. The method and structure include providing a TMR layer that includes a first magnetic layer, a second magnetic layer and a first insulating layer disposed between the first magnetic layer and the second magnetic layer. The method and structure also include providing a first material and a protective layer. The first material allows electrical contact to be made to the tunneling magnetoresistive layer and is disposed above the tunneling magnetoresistive layer. The first material is capable of being undercut by an plasma etch without exposing a portion of the tunneling magnetoresistive layer under a remaining portion of the first material. The second protective layer covers a portion of the tunneling magnetoresistive sensor and a portion of the first material. In one aspect, the method and structure also include providing a second material disposed between the tunneling magnetoresistive layer and the first material.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: January 27, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Hugh C. Hiner, Kyusik Sin, William Jensen, Xizeng Shi