Patents by Inventor L. Hwang
L. Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240148964Abstract: An infusion system having an integrated inserter and infusion set (10) for containing and placing a flexible catheter (40), and a retractable introducer needle (26), wherein the catheter (40) is isolated from movement after placement. The integrated inserter and infusion set (10) includes a hub (20), having a user push button (30) to activate the device for catheter (40) placement. An adhesive liner (34) can be provided to cover an adhesive layer (36), such as pressure sensitive adhesive (PSA), on the bottom of the device (10).Type: ApplicationFiled: December 13, 2023Publication date: May 9, 2024Applicant: Becton, Dickinson and CompanyInventors: Victor Politis, Gary Searle, Mark Guarraia, Joseph Gordon, Dave Zitnick, Sharon Mulligan, Ralph L. Sonderegger, Thomas G. Kluck, Joshua D. Horvath, Charles G. Hwang
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Patent number: 11961870Abstract: Devices, systems, and methods are provided for reducing electrical and optical crosstalk in photodiodes. A photodiode may include a first layer with passive material, the passive material having no electric field. The photodiode may include a second layer with an absorbing material, the second layer above the first layer. The photodiode may include a diffused region with a buried p-n junction. The photodiode may include an active region with the buried p-n junction and having an electric field greater than zero. The photodiode may include a plateau structure based on etching through the second layer to the first layer, the etching performed at a distance of fifteen microns or less from the buried p-n junction.Type: GrantFiled: February 11, 2022Date of Patent: April 16, 2024Assignee: LG INNOTEK CO., LTD.Inventors: Brian Piccione, Mark Itzler, Xudong Jiang, Krystyna Slomkowski, Harold Y. Hwang, John L. Hostetler
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Patent number: 11960707Abstract: An electronic device provides, to a display, data to present a user interface that includes a plurality of user interface objects, and a current focus on a first user interface object. While the display is presenting the user interface, the electronic device receives an input that corresponds to a movement of a contact across on a touch-sensitive surface. The electronic device, in response to receiving the input and in accordance with a determination that a first axis is a dominant axis, moves the current focus along the first axis by a first amount and along the second axis by a second amount. The amount of movement of the current focus along the second axis is reduced to a first non-zero amount by a scaling factor that is based on one or more inputs received prior to receiving the input.Type: GrantFiled: April 24, 2023Date of Patent: April 16, 2024Assignee: APPLE INC.Inventors: Marcos Alonso Ruiz, Nicole M. Wells, Justin T. Voss, Blake R. Seely, Matthew D. Ricketson, Henrique D. Penha, Grace H. Hwang, Graham R. Clarke, Jeffrey L. Robbin, William M. Bachman, Benjamin W. Keighran, Jennifer L. C. Folse, Jonathan Lochhead, Joe R. Howard, Joshua K. McGlinn
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Patent number: 11927482Abstract: One or more embodiments described herein generally relate to systems and methods for calibrating an optical emission spectrometer (OES) used for processing semiconductor substrates. In embodiments herein, a light fixture is mounted to a plate within a process chamber. A light source is positioned within the light fixture such that it provides an optical path that projects directly at a window through which the OES looks into the process chamber for its reading. When the light source is on, the OES measures the optical intensity of radiation from the light source. To calibrate the OES, the optical intensity of the light source is compared at two separate times when the light source is on. If the optical intensity of radiation at the first time is different than the optical intensity of radiation at the second time, the OES is modified.Type: GrantFiled: March 27, 2020Date of Patent: March 12, 2024Assignee: Applied Materials, Inc.Inventors: Kin Pong Lo, Lara Hawrylchak, Malcolm J. Bevan, Theresa Kramer Guarini, Wei Liu, Bernard L. Hwang
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Publication number: 20230057432Abstract: Embodiments of the present disclosure include methods and apparatuses utilized to reduce particle generation within a processing chamber. In one or more embodiments, a lid for a substrate processing chamber is provided and includes a cover member, a central opening, and a trench. An inner profile of the central opening contains a first section having a first diameter, a second section having a second diameter, and a third section having a third diameter. The second section is disposed between and connected to the first section and the third section. The first diameter gradually increases from the second section toward the surface of the cover member, the second diameter cylindrically extends from the first section to the third section, and the third diameter is less than the second diameter. The trench surrounds the central opening and is formed along a closed path in the surface of the cover member.Type: ApplicationFiled: November 7, 2022Publication date: February 23, 2023Inventor: Bernard L. HWANG
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Patent number: 11581408Abstract: Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.Type: GrantFiled: March 15, 2021Date of Patent: February 14, 2023Assignee: Applied Materials, Inc.Inventors: Matthew Scott Rogers, Roger Curtis, Lara Hawrylchak, Canfeng Lai, Bernard L. Hwang, Jeffrey A. Tobin, Christopher S. Olsen, Malcolm J. Bevan
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Patent number: 11521830Abstract: Implementations of the present disclosure include methods and apparatuses utilized to reduce particle generation within a processing chamber. In one implementation, a lid for a substrate processing chamber is provided. The lid includes a cover member having a first surface and a second surface opposite the first surface, a central opening through the cover member, wherein an inner profile of the central opening includes a first section having a first diameter, a second section having a second diameter, and a third section having a third diameter, wherein the second diameter is between the first diameter and the third diameter, and the first diameter increases from the second section toward the first surface of the cover member, and a trench formed along a closed path in the first surface and having a recess formed in an inner surface of the trench.Type: GrantFiled: May 19, 2021Date of Patent: December 6, 2022Assignee: APPLIED MATERIALS, INC.Inventor: Bernard L. Hwang
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Publication number: 20220301920Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.Type: ApplicationFiled: June 6, 2022Publication date: September 22, 2022Inventors: Kin Pong LO, Vladimir NAGORNY, Wei LIU, Theresa Kramer GUARINI, Bernard L. HWANG, Malcolm J. BEVAN, Jacob ABRAHAM, Swayambhu Prasad BEHERA
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Patent number: 11380575Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.Type: GrantFiled: July 27, 2020Date of Patent: July 5, 2022Assignee: Applied Materials, Inc.Inventors: Kin Pong Lo, Vladimir Nagorny, Wei Liu, Theresa Kramer Guarini, Bernard L. Hwang, Malcolm J. Bevan, Jacob Abraham, Swayambhu Prasad Behera
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Publication number: 20220178747Abstract: One or more embodiments described herein generally relate to systems and methods for calibrating an optical emission spectrometer (OES) used for processing semiconductor substrates. In embodiments herein, a light fixture is mounted to a plate within a process chamber. A light source is positioned within the light fixture such that it provides an optical path that projects directly at a window through which the OES looks into the process chamber for its reading. When the light source is on, the OES measures the optical intensity of radiation from the light source. To calibrate the OES, the optical intensity of the light source is compared at two separate times when the light source is on. If the optical intensity of radiation at the first time is different than the optical intensity of radiation at the second time, the OES is modified.Type: ApplicationFiled: March 27, 2020Publication date: June 9, 2022Inventors: Kin Pong LO, Lara HAWRYLCHAK, Malcolm J. BEVAN, Theresa Kramer GUARINI, Wei LIU, Bernard L. HWANG
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Publication number: 20220028656Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.Type: ApplicationFiled: July 27, 2020Publication date: January 27, 2022Inventors: Kin Pong LO, Vladimir NAGORNY, Wei LIU, Theresa Kramer GUARINI, Bernard L. HWANG, Malcolm J. BEVAN, Jacob ABRAHAM, Swayambhu Prasad BEHERA
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Publication number: 20220013336Abstract: A method and apparatus for the use of hydrogen plasma treatments is described herein. The process chamber includes a plurality of chamber components. The plurality of chamber components may be coated with a yttrium zirconium oxide composition, such as a Y2O3—ZrO2 solid solution. Some of the plurality of chamber components are replaced with a bulk yttrium zirconium oxide ceramic. Yet other chamber components are replaced with similar components of different materials.Type: ApplicationFiled: July 10, 2020Publication date: January 13, 2022Inventors: Jian WU, Lara A. HAWRYLCHAK, Ren-Guan DUAN, Bernard L. HWANG, Malcolm J. BEVAN, Wei LIU
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Publication number: 20210272774Abstract: Implementations of the present disclosure include methods and apparatuses utilized to reduce particle generation within a processing chamber. In one implementation, a lid for a substrate processing chamber is provided. The lid includes a cover member having a first surface and a second surface opposite the first surface, a central opening through the cover member, wherein an inner profile of the central opening includes a first section having a first diameter, a second section having a second diameter, and a third section having a third diameter, wherein the second diameter is between the first diameter and the third diameter, and the first diameter increases from the second section toward the first surface of the cover member, and a trench formed along a closed path in the first surface and having a recess formed in an inner surface of the trench.Type: ApplicationFiled: May 19, 2021Publication date: September 2, 2021Inventor: Bernard L. HWANG
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Publication number: 20210202702Abstract: Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.Type: ApplicationFiled: March 15, 2021Publication date: July 1, 2021Inventors: Matthew Scott ROGERS, Roger CURTIS, Lara HAWRYLCHAK, Canfeng LAI, Bernard L. HWANG, Jeffrey A. TOBIN, Christopher S. OLSEN, Malcolm J. BEVAN
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Patent number: 11017984Abstract: Implementations of the present disclosure include methods and apparatuses utilized to reduce particle generation within a processing chamber. In one implementation, a lid for a substrate processing chamber is provided. The lid includes a cover member having a first surface and a second surface opposite the first surface, a central opening through the cover member, wherein an inner profile of the central opening includes a first section having a first diameter, a second section having a second diameter, and a third section having a third diameter, wherein the second diameter is between the first diameter and the third diameter, and the first diameter increases from the second section toward the first surface of the cover member, and a trench formed along a closed path in the first surface and having a recess formed in an inner surface of the trench.Type: GrantFiled: March 16, 2017Date of Patent: May 25, 2021Assignee: Applied Materials, Inc.Inventor: Bernard L. Hwang
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Patent number: 10971357Abstract: A method of modifying a layer in a semiconductor device is provided. The method includes depositing a low quality film on a semiconductor substrate, and exposing a surface of the low quality film to a first process gas comprising helium while the substrate is heated to a first temperature, and exposing a surface of the low quality film to a second process gas comprising oxygen gas while the substrate is heated to a second temperature that is different than the first temperature. The electrical properties of the film are improved by undergoing the aforementioned processes.Type: GrantFiled: October 4, 2018Date of Patent: April 6, 2021Assignee: Applied Materials, Inc.Inventors: Wei Liu, Theresa Kramer Guarini, Linlin Wang, Malcolm Bevan, Johanes S. Swenberg, Vladimir Nagorny, Bernard L. Hwang, Kin Pong Lo, Lara Hawrylchak, Rene George
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Patent number: 10950698Abstract: Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.Type: GrantFiled: August 13, 2018Date of Patent: March 16, 2021Assignee: Applied Materials, Inc.Inventors: Matthew Scott Rogers, Roger Curtis, Lara Hawrylchak, Canfeng Lai, Bernard L. Hwang, Jeffrey Tobin, Christopher S. Olsen, Malcolm Bevan
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Patent number: 10762265Abstract: Using a high-level language (HLL) callable library for multiple instances of a core includes detecting, using computer hardware, a reference to an HLL library for a core within an HLL application, determining, using the computer hardware, a plurality of instances of the core by detecting function calls within the HLL application correlated to each of the plurality of instances of the core, and generating, using the computer hardware, interface code within the HLL application for each of the plurality of instances of the core using the HLL library. An executable version of the HLL application is generated, using the computer hardware, wherein the interface code for each of the plurality of instances of the core is bound to the respective instance of the core. The function calls can specify different parameterization files corresponding to the plurality of instances of the core.Type: GrantFiled: November 13, 2018Date of Patent: September 1, 2020Assignee: Xilinx, Inc.Inventors: Zhenman Fang, James L. Hwang, Alfred Huang, Michael Gill, Tom Shui
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Patent number: 10755013Abstract: Creating a high-level language (HLL) callable library for a hardware core can include automatically querying, using computer hardware, a metadata description of a core to determine a plurality of available ports of the core, automatically determining, using the computer hardware, an argument of a first function specified in a header file corresponding to the core, mapping, using the computer hardware, the argument to a first port of the plurality of available ports, and automatically generating and storing, using the computer hardware, an HLL library specifying a mapping of the argument to the first port of the core. The HLL library is configured for inclusion with a user application during compilation.Type: GrantFiled: November 13, 2018Date of Patent: August 25, 2020Assignee: Xilinx, Inc.Inventors: Zhenman Fang, James L. Hwang, Samuel A. Skalicky, Tom Shui, Michael Gill, Welson Sun, Alfred Huang, Jorge E. Carrillo, Chen Pan
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Publication number: 20200111659Abstract: A method of modifying a layer in a semiconductor device is provided. The method includes depositing a low quality film on a semiconductor substrate, and exposing a surface of the low quality film to a first process gas comprising helium while the substrate is heated to a first temperature, and exposing a surface of the low quality film to a second process gas comprising oxygen gas while the substrate is heated to a second temperature that is different than the first temperature. The electrical properties of the film are improved by undergoing the aforementioned processes.Type: ApplicationFiled: October 4, 2018Publication date: April 9, 2020Inventors: Wei LIU, Theresa Kramer GUARINI, Linlin WANG, Malcolm BEVAN, Johanes S. SWENBERG, Vladimir NAGORNY, Bernard L. HWANG, Kin Pong LO, Lara HAWRYLCHAK, Rene GEORGE