Patents by Inventor Lakmal C. Kalutarage
Lakmal C. Kalutarage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12281382Abstract: Methods of selectively depositing blocking layers on conductive surfaces over dielectric surfaces are described. In some embodiments, a 4-8 membered substituted heterocycle is exposed to a substrate to selectively form a blocking layer. In some embodiments, a layer is selectively deposited on the dielectric surface after the blocking layer is formed. In some embodiments, the blocking layer is removed.Type: GrantFiled: May 24, 2023Date of Patent: April 22, 2025Assignee: Applied Materials, Inc.Inventors: Lakmal C. Kalutarage, Bhaskar Jyoti Bhuyan, Aaron Dangerfield, Feng Q. Liu, Mark Saly, Michael Haverty, Muthukumar Kaliappan
-
Publication number: 20250125157Abstract: The methods of the present disclosure enable formation of highly conductive contacts that facilitate in increasing the device speed and lowering the operating voltages of semiconductor devices such as, but not limited to, metal-on-semiconductor (MOS) transistors and the like. In one embodiment, the methods create the optimal contacts, useful in N type or P type MOS devices, by forming metal-insulator-semiconductor (MIS) contact structure or a non-stoichiometric layer contact structure. It is noted that N type or P type contacts require different work function metals to achieve a low Schottky barrier height (SBH).Type: ApplicationFiled: April 12, 2024Publication date: April 17, 2025Inventors: Michael HAVERTY, Avgerinos V. GELATOS, Gaurav THAREJA, Lauren Mary BAGBY, Lakmal C. KALUTARAGE, Jeffrey W. ANTHIS, Archana KUMAR
-
Publication number: 20250125154Abstract: Exemplary methods and systems of semiconductor processing may include etching a portion of a silicon-containing material from a substrate disposed within a processing region of a semiconductor processing chamber. Methods may include forming a low quality oxide within one or more of the recesses, where the low quality oxide and a silicon-containing material each contain an exposed surface. Methods include contacting the low quality oxide and the high quality semiconductor material with a passivating agent selective to a surface defect of the low quality oxide. Methods include contacting the substrate with an etching agent and/or a cleaning agent, where the contacting with the cleaning agent removes the high quality semiconductor material at an equal or faster rate than the low quality oxide.Type: ApplicationFiled: October 12, 2023Publication date: April 17, 2025Applicant: Applied Materials, Inc.Inventors: Lala Zhu, Yimin Huang, Shi Che, Yi Jin, Dongqing Yang, Lakmal C. Kalutarage, Anchuan Wang, Nitin K. Ingle
-
Publication number: 20240420934Abstract: Exemplary methods of semiconductor processing may include methods for nonconformally building up silicon-and-oxygen-containing material where the top of the feature preferentially fills at a slower rate as compared to the bottom of the feature. Such methods may include iterative nonconformal etching operations and/or iterative nonconformal inhibition operations. For example, after building up a layer comprising silicon-and-oxygen-containing material, the layer may be nonconformally etched before building up another layer comprising silicon-and-oxygen-containing material. In another example, in the building up of the layer, an inhibitor may be introduced preferentially at and near the top of the features to provide nonconformal buildup of the silicon-and-oxygen-containing material.Type: ApplicationFiled: June 14, 2023Publication date: December 19, 2024Applicant: Applied Materials, Inc.Inventors: Bhaskar Soman, Yanze Wu, Zeqing Shen, Supriya Ghosh, Susmit Singha Roy, Abhijit Basu Mallick, Siyao Wang, Keith Tatseun Wong, Lakmal C. Kalutarage
-
Patent number: 12131900Abstract: Methods of enhancing selective deposition are described. In some embodiments, a blocking layer is deposited on a metal surface before deposition of a dielectric. In some embodiments, a metal surface is functionalized to enhance or decrease its reactivity.Type: GrantFiled: July 26, 2022Date of Patent: October 29, 2024Assignee: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Mark Saly, Lakmal C. Kalutarage, Thomas Joseph Knisley
-
Publication number: 20240332001Abstract: Exemplary methods of semiconductor processing may include providing a first precursor to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The substrate may define a feature. The methods may include contacting the substrate with the first precursor. The contacting may form a first portion of a silicon-carbon-and-nitrogen-containing material on the substrate. The methods may include providing a second precursor to the semiconductor processing chamber. The methods may include contacting the substrate with the second precursor. The contacting may form the silicon-carbon-and-nitrogen-containing material on the substrate. The silicon-carbon-and-nitrogen-containing material may be void free.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Lakmal C. Kalutarage, Bhaskar Jyoti Bhuyan, Mark J. Saly, Jeffrey W. Anthis
-
Publication number: 20240248391Abstract: Methods of manufacturing an extreme ultraviolet (EUV) pellicles are disclosed. The methods comprise forming on a carbon nanotube (CNT) membrane of an EUV pellicle a nucleation layer. A protective material layer is deposited on the nucleation layer, the protective material layer exhibiting greater than 90% transmission of 13.5 nm EUV light. The methods may be performed by atomic layer deposition. The protective material layer may be selected from aluminum (Al), aluminum nitride (AlN), aluminum oxide (Al2O3), boron carbide (B4C), boron nitride (BN), molybdenum (Mo), molybdenum silicide (MoSi2), molybdenum carbide (MoC, Mo2C), ruthenium (Ru), ruthenium niobium alloy (RuNb), ruthenium oxide (RuO, RUO2), tantalum nitride (TaN), tantalum (Ta), yttrium nitride (YN), zirconium boride (ZrB2), zirconium silicide (ZrSi2), and silicon carbide (SiC).Type: ApplicationFiled: January 16, 2024Publication date: July 25, 2024Applicant: Applied Mateials, Inc.Inventors: Thomas Joseph Knisley, Lakmal C. Kalutarage, Mark Saly, Nasrin Kazem, Feng Q. Liu, Jeffrey W. Anthis
-
Patent number: 12031209Abstract: Methods of forming a metal film having a metal halide with a reducing agent are disclosed. The reducing agent, the reducing agent includes a group IV element containing heterocyclic compound, a radical initiator, an alkly alane, a diborene species and/or a Sn(II) compound.Type: GrantFiled: February 16, 2021Date of Patent: July 9, 2024Assignee: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Mark Saly, Lakmal C. Kalutarage, Thomas Knisley
-
Patent number: 12018363Abstract: Methods for depositing film comprise depositing an aluminum-containing gap-fill film in a bottom-up manner in a feature of a substrate surface. The substrate can be sequentially exposed to an aluminum-containing precursor, a reactant, a fluorinating agent, and an etchant any number of times to promote bottom-up growth of the film in the feature.Type: GrantFiled: September 20, 2019Date of Patent: June 25, 2024Assignee: Applied Materials, Inc.Inventors: Mark Saly, Lakmal C. Kalutarage, Jeffrey W. Anthis, Tatsuya E. Sato
-
Publication number: 20240120193Abstract: Exemplary methods of semiconductor processing may include etching a portion of a silicon-containing material from a substrate disposed within a processing region of a semiconductor processing chamber. The silicon-containing material may extend into one or more recesses defined by alternating layers of material deposited on the substrate. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting a remaining silicon-containing material with the carbon-containing precursor. The contacting with the carbon-containing precursor may replenish carbon in the silicon-containing material. The methods may include providing a cleaning agent to the processing region of the semiconductor processing chamber. The methods may include contacting the substrate with the cleaning agent. The contacting with the cleaning precursor may remove surface oxide from the substrate.Type: ApplicationFiled: October 5, 2022Publication date: April 11, 2024Applicant: Applied Materials, Inc.Inventors: Shankar Venkataraman, Zeqing Shen, Susmit Singha Roy, Abhijit Basu Mallick, Lakmal C. Kalutarage, Jongbeom Seo, Sai Hooi Yeong, Benjamin Colombeau, Balasubramanian Pranatharthiharan
-
Patent number: 11942330Abstract: Exemplary methods of etching gallium oxide from a semiconductor substrate may include flowing a first reagent in a substrate processing region housing the semiconductor substrate. The first reagent may include HX. X may be at least one of fluorine, chlorine, and bromine. The semiconductor substrate may include an exposed region of gallium oxide. Fluorinating the exposed region of gallium oxide may form a gallium halide and H2O. The methods may include flowing a second reagent in the substrate processing region. The second reagent may be at least one of trimethylgallium, tin acetylacetonate, tetramethylsilane, and trimethyltin chloride. The second reagent may promote a ligand exchange where a methyl group may be transferred to the gallium halide to form a volatile Me2GaY or Me3Ga. Y may be at least one of fluorine, chlorine, and bromine from the second reagent. The methods may include recessing a surface of the gallium oxide.Type: GrantFiled: June 9, 2022Date of Patent: March 26, 2024Assignee: Applied Materials, Inc.Inventors: Feng Q. Liu, Lisa J. Enman, Lakmal C. Kalutarage, Mark J. Saly
-
Publication number: 20240087880Abstract: Embodiments include semiconductor processing methods to form low-? films on semiconductor substrates are described. The processing methods may include flowing one or more deposition precursors to a semiconductor processing system. The one or more deposition precursors may include a silicon-containing precursor that may be a cyclic compound. The methods may include generating a deposition plasma from the one or more deposition precursors. The methods may include depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant less than or about 3.0.Type: ApplicationFiled: August 26, 2022Publication date: March 14, 2024Applicant: Applied Materials, Inc.Inventors: Shruba Gangopadhyay, Bhaskar Jyoti Bhuyan, Michael Haverty, Bo Xie, Li-Qun Xia, Rui Lu, Yijun Liu, Ruitong Xiong, Xiaobo Li, Lakmal C. Kalutarage, Lauren Bagby
-
Publication number: 20240087881Abstract: Embodiments include semiconductor processing methods to form low-K films on semiconductor substrates are described. The processing methods may include flowing one or more deposition precursors to a semiconductor processing system, wherein the one or more deposition precursors include a silicon-containing precursor. The silicon-containing precursor may include a carbon chain. The methods may include generating a deposition plasma from the one or more deposition precursors. The methods may include depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant less than or about 3.0.Type: ApplicationFiled: August 26, 2022Publication date: March 14, 2024Applicant: Applied Materials, Inc.Inventors: Michael Haverty, Shruba Gangopadhyay, Bo Xie, Yijun Liu, Ruitong Xiong, Rui Lu, Xiaobo Li, Li-Qun Xia, Lakmal C. Kalutarage, Lauren Bagby
-
Publication number: 20240038833Abstract: Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where carbon is used as the removable mold material for the formation of a DRAM capacitor. A dense, high-temperature (500° C. or greater) PECVD carbon material is used as the removable mold material, e.g., the core material, instead of oxide. The carbon material can be removed by isotropic etching with exposure to radicals of oxygen (O2), nitrogen (N2), hydrogen (H2), ammonia (NH3), and combinations thereof.Type: ApplicationFiled: July 14, 2023Publication date: February 1, 2024Applicant: Applied Materials, Inc.Inventors: Fredrick Fishburn, Tomohiko Kitajima, Qian Fu, Srinivas Guggilla, Hang Yu, Jun Feng, Shih Chung Chen, Lakmal C. Kalutarage, Jayden Potter, Karthik Janakiraman, Deenesh Padhi, Yifeng Zhou, Yufeng Jiang, Sung-Kwan Kang
-
Publication number: 20230295803Abstract: Methods of forming metal-containing films for electronic devices (e.g., logic devices and/or memory devices) and methods for reducing equivalent oxide thickness (EOT) penalty in electronic devices are disclosed. The methods comprise exposing a substrate surface to a metal precursor, such as titanium chloride (TiCl4), a reducing agent, such as a cyclic 1,4-diene, and a reactant, ammonia (NH3), either simultaneously, partially simultaneously or separately and sequentially to form the metal-containing film.Type: ApplicationFiled: April 14, 2023Publication date: September 21, 2023Applicant: Applied Materials, Inc.Inventors: Haoming Yan, Shih Chung Chen, Mandyam Sriram, EunKee Hong, Janardhan Devrajan, Lakmal C. Kalutarage, Yongjing Lin, Lisa Michelle Mandrell, Arkaprava Dan
-
Publication number: 20230295794Abstract: Methods of selectively depositing blocking layers on conductive surfaces over dielectric surfaces are described. In some embodiments, a 4-8 membered substituted heterocycle is exposed to a substrate to selectively form a blocking layer. In some embodiments, a layer is selectively deposited on the dielectric surface after the blocking layer is formed. In some embodiments, the blocking layer is removed.Type: ApplicationFiled: May 24, 2023Publication date: September 21, 2023Inventors: Lakmal C. Kalutarage, Bhaskar Jyoti Bhuyan, Aaron Dangerfield, Feng Q. Liu, Mark Saly, Michael Haverty, Muthukumar Kaliappan
-
Publication number: 20230235451Abstract: Molybdenum-DAD precursors are described. Methods for depositing molybdenum-containing films on a substrate are described. The substrate is exposed to a molybdenum-DAD precursor and a reactant to form the molybdenum-containing film (e.g., elemental molybdenum, molybdenum oxide, molybdenum carbide, molybdenum silicide, molybdenum nitride). The exposures can be sequential or simultaneous.Type: ApplicationFiled: January 24, 2023Publication date: July 27, 2023Applicants: Applied Materials, Inc., Wayne State UniversityInventors: Thomas Joseph Knisley, Martha Serna Villacis, Mark Saly, Lakmal C. Kalutarage, Charles H. Winter, Matthew Bertram Edward Griffiths, Shalini Tripathi
-
Patent number: 11702733Abstract: Methods of selectively depositing blocking layers on conductive surfaces over dielectric surfaces are described. In some embodiments, a 4-8 membered substituted heterocycle is exposed to a substrate to selectively form a blocking layer. In some embodiments, a layer is selectively deposited on the dielectric surface after the blocking layer is formed. In some embodiments, the blocking layer is removed.Type: GrantFiled: May 7, 2021Date of Patent: July 18, 2023Assignee: Applied Materials, Inc.Inventors: Lakmal C. Kalutarage, Bhaskar Jyoti Bhuyan, Aaron Dangerfield, Feng Q. Liu, Mark Saly, Michael Haverty, Muthukumar Kaliappan
-
Publication number: 20220384176Abstract: Methods of enhancing selective deposition are described. In some embodiments, a blocking layer is deposited on a metal surface before deposition of a dielectric. In some embodiments, a metal surface is functionalized to enhance or decrease its reactivity.Type: ApplicationFiled: July 26, 2022Publication date: December 1, 2022Applicant: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Mark Saly, Lakmal C. Kalutarage, Thomas Joseph Knisley
-
Patent number: 11515149Abstract: Methods for seam-less gapfill comprising forming a flowable film by exposing a substrate surface to a silicon-containing precursor and a co-reactant are described. The silicon-containing precursor has at least one akenyl or alkynyl group. The flowable film can be cured by any suitable curing process to form a seam-less gapfill.Type: GrantFiled: July 19, 2017Date of Patent: November 29, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Lakmal C. Kalutarage, Mark Saly, David Thompson, Abhijit Basu Mallick, Tejasvi Ashok, Pramit Manna