Abstract: A semiconductor processing method may include providing a fluorine-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may include an exposed region of silicon-and-oxygen-containing material. The substrate may include an exposed region of a liner material. The methods may include providing a hydrogen-containing precursor to the semiconductor processing region. The methods may include contacting the substrate with the fluorine-containing precursor and the hydrogen-containing precursor. The methods may include selectively removing at least a portion of the exposed silicon-and-oxygen-containing material.

Abstract: Exemplary support assemblies may include a top puck and a backing plate coupled with the top puck. The support assemblies may include a cooling plate coupled with the backing plate. The support assemblies may include a heater coupled between the cooling plate and the backing plate. The support assemblies may also include a back plate coupled with the backing plate about an exterior of the backing plate. The back plate may at least partially define a volume, and the heater and the cooling plate may be housed within the volume.

Abstract: Exemplary semiconductor processing systems may include a processing chamber, and may include a remote plasma unit coupled with the processing chamber. Exemplary systems may also include an adapter coupled with the remote plasma unit. The adapter may include a first end and a second end opposite the first end. The adapter may define a central channel through the adapter. The adapter may define an exit from a second channel at the second end, and the adapter may define an exit from a third channel at the second end. The central channel, the second channel, and the third channel may each be fluidly isolated from one another within the adapter.

Abstract: Exemplary support assemblies may include a top puck and a backing plate coupled with the top puck. The support assemblies may include a cooling plate coupled with the backing plate. The support assemblies may include a heater coupled between the cooling plate and the backing plate. The support assemblies may also include a back plate coupled with the backing plate about an exterior of the backing plate. The back plate may at least partially define a volume, and the heater and the cooling plate may be housed within the volume.

Abstract: Exemplary semiconductor processing chambers may include showerhead. The chambers may include a pedestal configured to support a semiconductor substrate, where the showerhead and pedestal at least partially define a processing region within the semiconductor chamber. The chamber may include a spacer characterized by a first surface in contact with the showerhead and a second surface opposite the first surface. The chamber may include a pumping liner characterized by a first surface in contact with the spacer and a second surface opposite the first surface. The pumping liner may define a plurality of apertures within the first surface of the pumping liner.

Abstract: Exemplary support assemblies may include a top puck and a backing plate coupled with the top puck. The support assemblies may include a cooling plate coupled with the backing plate. The support assemblies may include a heater coupled between the cooling plate and the backing plate. The support assemblies may also include a back plate coupled with the backing plate about an exterior of the backing plate. The back plate may at least partially define a volume, and the heater and the cooling plate may be housed within the volume.

Abstract: Exemplary semiconductor processing systems may include a processing chamber, and may include a remote plasma unit coupled with the processing chamber. Exemplary systems may also include an adapter coupled with the remote plasma unit. The adapter may include a first end and a second end opposite the first end. The adapter may define a central channel through the adapter. The adapter may define an exit from a second channel at the second end, and the adapter may define an exit from a third channel at the second end. The central channel, the second channel, and the third channel may each be fluidly isolated from one another within the adapter.

Abstract: Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber to form a first mixture. The method may also include flowing the first mixture to a substrate in a second section of the chamber. The first section and the second section may include nickel plated material. The method may further include reacting the first mixture with the substrate to etch a first layer selectively over a second layer. In addition, the method may include forming a second mixture including products from reacting the first mixture with the substrate.

Abstract: Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.

Abstract: Exemplary semiconductor processing systems may include a processing chamber, and may include a remote plasma unit coupled with the processing chamber. Exemplary systems may also include an adapter coupled with the remote plasma unit. The adapter may include a first end and a second end opposite the first end. The adapter may define a central channel through the adapter. The adapter may define an exit from a second channel at the second end, and the adapter may define an exit from a third channel at the second end. The central channel, the second channel, and the third channel may each be fluidly isolated from one another within the adapter.

Abstract: Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber to form a first mixture. The method may also include flowing the first mixture to a substrate in a second section of the chamber. The first section and the second section may include nickel plated material. The method may further include reacting the first mixture with the substrate to etch a first layer selectively over a second layer. In addition, the method may include forming a second mixture including products from reacting the first mixture with the substrate.

Abstract: Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber to form a first mixture. The method may also include flowing the first mixture to a substrate in a second section of the chamber. The first section and the second section may include nickel plated material. The method may further include reacting the first mixture with the substrate to etch a first layer selectively over a second layer. In addition, the method may include forming a second mixture including products from reacting the first mixture with the substrate.

Abstract: Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber to form a first mixture. The method may also include flowing the first mixture to a substrate in a second section of the chamber. The first section and the second section may include nickel plated material. The method may further include reacting the first mixture with the substrate to etch a first layer selectively over a second layer. In addition, the method may include forming a second mixture including products from reacting the first mixture with the substrate.

Abstract: Exemplary semiconductor processing systems may include a processing chamber, and may include a remote plasma unit coupled with the processing chamber. Exemplary systems may also include an adapter coupled with the remote plasma unit. The adapter may include a first end and a second end opposite the first end. The adapter may define a central channel through the adapter. The adapter may define an exit from a second channel at the second end, and the adapter may define an exit from a third channel at the second end. The central channel, the second channel, and the third channel may each be fluidly isolated from one another within the adapter.

Abstract: Exemplary support assemblies may include a top puck and a backing plate coupled with the top puck. The support assemblies may include a cooling plate coupled with the backing plate. The support assemblies may include a heater coupled between the cooling plate and the backing plate. The support assemblies may also include a back plate coupled with the backing plate about an exterior of the backing plate. The back plate may at least partially define a volume, and the heater and the cooling plate may be housed within the volume.

Abstract: Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.

Abstract: Methods of selectively removing silicon oxide are described. Exposed portions of silicon oxide and spacer material may both be present on a patterned substrate. The silicon oxide may be a native oxide formed on silicon by exposure to atmosphere. The exposed portion of spacer material may have been etched back using reactive ion etching (RIE). A portion of the exposed spacer material may have residual damage from the reactive ion etching. A self-assembled monolayer (SAM) is selectively deposited over the damaged portion of spacer material but not on the exposed silicon oxide or undamaged portions of spacer material. A subsequent gas-phase etch may then be used to selectively remove silicon oxide but not the damaged portion of the spacer material because the SAM has been found to not only preferentially adsorb on the damaged spacer but also to halt the etch rate.