Abstract: A method for detecting corrosion on a conductive object includes submerging a surface of the conductive object at least partially in an aqueous solution, flowing current through the surface of the conductive object by forming a voltage differential across the surface, varying the voltage differential across the surface while monitoring the current through the surface of the conductive object, determining a total charge corresponding to a corrosion level of the surface of the conductive object based on current versus voltage levels. The corrosion level may further be utilized in selecting a cleaning process to remediate the corrosion of the surface based on the corrosion level and in applying a protective corrosion barrier to on at least part of the surface after the cleaning process.

Abstract: Plasma is generated in a semiconductor process chamber by a plurality of microwave inputs with slow or fast rotation. Radial uniformity of the plasma is controlled by regulating the power ratio of a center-high mode and an edge-high mode of the plurality of microwave inputs into a microwave cavity. The radial uniformity of the generated plasma in a plasma chamber is attained by adjusting the power ratio for the two modes without inputting time-splitting parameters for each mode.

Abstract: Methods and apparatus provide plasma generation for semiconductor process chambers. In some embodiments, the plasma is generated by a system that may comprise a process chamber having at least two upper microwave cavities separated from a lower microwave cavity by a metallic plate with a plurality of radiation slots, at least one microwave input port connected to a first one of the at least two upper microwave cavities, at least two microwave input ports connected to a second one of the at least two upper microwave cavities, and the lower microwave cavity receives radiation through the plurality of radiation slots in the metallic plate from both of the at least two upper microwave cavities, the lower microwave cavity is configured to form an electric field that provides uniform plasma distribution in a process volume of the process chamber.

Abstract: A method for detecting corrosion on a conductive object includes submerging a surface of the conductive object at least partially in an aqueous solution, flowing current through the surface of the conductive object by forming a voltage differential across the surface, varying the voltage differential across the surface while monitoring the current through the surface of the conductive object, determining a total charge corresponding to a corrosion level of the surface of the conductive object based on current versus voltage levels. The corrosion level may further be utilized in selecting a cleaning process to remediate the corrosion of the surface based on the corrosion level and in applying a protective corrosion barrier to on at least part of the surface after the cleaning process.

Abstract: Methods and apparatus provide plasma generation for semiconductor process chambers. In some embodiments, the plasma is generated by a system that may comprise a process chamber having at least two upper microwave cavities separated from a lower microwave cavity by a metallic plate with a plurality of radiation slots, at least one microwave input port connected to a first one of the at least two upper microwave cavities, at least two microwave input ports connected to a second one of the at least two upper microwave cavities, and the lower microwave cavity receives radiation through the plurality of radiation slots in the metallic plate from both of the at least two upper microwave cavities, the lower microwave cavity is configured to form an electric field that provides uniform plasma distribution in a process volume of the process chamber.

Abstract: Plasma is generated in a semiconductor process chamber by a plurality of microwave inputs with slow or fast rotation. Radial uniformity of the plasma is controlled by regulating the power ratio of a center-high mode and an edge-high mode of the plurality of microwave inputs into a microwave cavity. The radial uniformity of the generated plasma in a plasma chamber is attained by adjusting the power ratio for the two modes without inputting time-splitting parameters for each mode.

Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.

Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant.

Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.

Abstract: In some embodiments, a method of processing a substrate disposed within a processing volume of a hot wire chemical vapor deposition (HWCVD) process chamber, includes: (a) providing a carbon containing precursor gas into the processing volume, the carbon containing precursor gas being provided into the processing volume from an inlet located a first distance above a surface of the substrate; (b) breaking hydrogen-carbon bonds within molecules of the carbon containing precursor via introduction of hydrogen radicals to the processing volume to deposit a flowable carbon layer atop the substrate, wherein the hydrogen radicals are formed by flowing a hydrogen containing gas over a plurality of filaments disposed within the processing volume above the substrate and the inlet.

Abstract: In some embodiments, a method of processing a substrate disposed within a processing volume of a hot wire chemical vapor deposition (HWCVD) process chamber, includes: (a) providing a silicon containing precursor gas into the processing volume, the silicon containing precursor gas is provided into the processing volume from an inlet located a first distance above a surface of the substrate; (b) breaking hydrogen-silicon bonds within molecules of the silicon containing precursor via introduction of hydrogen radicals to the processing volume to deposit a flowable silicon containing layer atop the substrate, wherein the hydrogen radicals are formed by flowing a hydrogen containing gas over a plurality of wires disposed within the processing volume above the substrate and the inlet.

Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.

Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.

Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant.

Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.

Abstract: Methods for fabricating semiconductor devices and devices therefrom are provided. A method includes providing a substrate having a semiconducting surface with first and second layers, where the semiconducting surface has a plurality of active regions comprising first and second active regions. In the first active region, the first layer is an undoped layer and the second layer is a highly doped screening layer. The method also includes removing a part of the first layer to reduce a thickness of the substantially undoped layer for at least a portion of the first active region without a corresponding thickness reduction of the first layer in the second active region. The method additionally includes forming semiconductor devices in the plurality of active regions. In the method, the part of the first layer removed is selected based on a threshold voltage adjustment required for the substrate in the portion of the first active region.

Abstract: Methods for fabricating semiconductor devices and devices therefrom are provided. A method includes providing a substrate having a semiconducting surface with first and second layers, where the semiconducting surface has a plurality of active regions comprising first and second active regions. In the first active region, the first layer is an undoped layer and the second layer is a highly doped screening layer. The method also includes removing a part of the first layer to reduce a thickness of the substantially undoped layer for at least a portion of the first active region without a corresponding thickness reduction of the first layer in the second active region. The method additionally includes forming semiconductor devices in the plurality of active regions. In the method, the part of the first layer removed is selected based on a threshold voltage adjustment required for the substrate in the portion of the first active region.

Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant.

Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.

Abstract: An advanced transistor with threshold voltage set dopant structure includes a gate with length Lg and a well doped to have a first concentration of a dopant. A screening region is positioned between the well and the gate and has a second concentration of dopant greater than 5×1018 dopant atoms per cm3. A threshold voltage set region is formed by placement of a threshold voltage offset plane positioned above the screening region. The threshold voltage set region may be formed by delta doping and have a thickness between Lg/5 and Lg/1 The structure uses minimal or no halo implants to maintain channel dopant concentration at less than 5×1017 dopant atoms per cm3.