Patents by Inventor Larry Alan Nesbit

Larry Alan Nesbit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6245651
    Abstract: A method for simultaneously forming a line interconnect such as a bitline and a borderless contact to diffusion, e.g. bitline contact, is described. A semiconductor substrate having prepatterned gate stacks thereon is covered with a first dielectric to form a first level and then a second dielectric is deposited which forms a second level. Line interconnect openings are defined in the second level by lithography and etching. Etching is continued down to monocrystalline regions in an array region of the substrate to form borderless contact openings coincident to the line interconnects between the gate stacks. The openings are filled with one or more conductors to form contacts to diffusion, e.g. bitline contacts, which are coincident to the line interconnects, e.g. bitlines.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: June 12, 2001
    Assignee: Intenational Business Machines Corporation
    Inventors: Rama Divakaruni, Larry Alan Nesbit, Carl John Radens
  • Patent number: 6084276
    Abstract: A semiconductor MOSFET device is formed on a silicon substrate which includes trenches filled with Shallow Trench Isolation dielectric trench fill structures and extending above the surface of the substrate. The trench fill structures have protruding sidewalls with channel regions in the substrate having corner regions adjacent to the trench fill structures. The channel regions are between and adjacent to the STI trench fill structures doped with one concentration of dopant in the centers of the channel regions with a higher concentration of dopant in the corner regions. The dopant concentration differential provides a substantially equal concentration of electrons in the centers and at the corner regions of the channel regions.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 4, 2000
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Peter Gambino, Gary Bela Bronner, Jack Allan Mandelman, Larry Alan Nesbit
  • Patent number: 5994202
    Abstract: A semiconductor MOSFET device is formed on a silicon substrate which includes trenches filled with Shallow Trench Isolation dielectric trench fill structures and extending above the surface of the substrate. The trench fill structures have protruding sidewalls with channel regions in the substrate having corner regions adjacent to the trench fill structures. The channel regions are between and adjacent to the STI trench fill structures doped with one concentration of dopant in the centers of the channel regions with a higher concentration of dopant in the corner regions. The dopant concentration differential provides a substantially equal concentration of electrons in the centers and at the corner regions of the channel regions.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: November 30, 1999
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Peter Gambino, Gary Bela Bronner, Jack Allan Mandelman, Larry Alan Nesbit