Patents by Inventor Lars Samuelson

Lars Samuelson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100252808
    Abstract: The present invention relates to growth of III-V semiconductor nanowires (2) on a Si substrate (3). Controlled vertical nanowire growth is achieved by a step, to be taken prior of the growing of the nanowire, of providing group III or group V atoms to a (111) surface of the Si substrate to provide a group III or group V 5 surface termination (4). A nanostructured device comprising a plurality of aligned III-V semiconductor nanowires (2) grown on, and protruding from, a (111) surface of a Si substrate (3) in an ordered pattern in compliance with a predetermined device layout is also presented.
    Type: Application
    Filed: October 27, 2008
    Publication date: October 7, 2010
    Inventors: Lars Samuelson, Jonas Ohlsson, Thomas Mårtensson, Patrik Svensson
  • Publication number: 20100186809
    Abstract: The solar cell structure according to the present invention comprises a nanowire (205) that constitutes the light absorbing part of the solar cell structure and a passivating shell (209) that encloses at least a portion of the nanowire (205). In a first aspect of the invention, the passivating shell (209) of comprises a light guiding shell (210), which preferably has a high- and indirect bandgap to provide light guiding properties. In a second aspect of the invention, the solar cell structure comprises a plurality of nanowires which are positioned with a maximum spacing between adjacent nanowires which is shorter than the wavelength of the light which the solar cell structure is intended to absorbin order to provide an effective medium for light absorption. Thanks to the invention it is possible to provide high efficiency solar cell structures.
    Type: Application
    Filed: June 19, 2008
    Publication date: July 29, 2010
    Inventors: Lars Samuelson, Martin Magnusson, Federico Capasso
  • Publication number: 20100176459
    Abstract: The present invention relates to vertical nanowire transistors with a wrap-gated geometry. The threshold voltage of the vertical nanowire transistors is controlled by the diameter of the nanowire, the doping of the nanowire, the introduction of segments of heterostructures in the nanowire, the doping in shell-structures surrounding the nanowire, tailoring the work function of the gate stack, by strain engineering, by control of the dielectrica or the choice of nanowire material. Transistors with varying threshold voltages are provided on the same substrate, which enables the design of advanced circuits utilizing the shifts in the threshold voltages, similar to the directly coupled field logic.
    Type: Application
    Filed: September 19, 2007
    Publication date: July 15, 2010
    Inventors: Lars-Erik Wernersson, Erik Lind, Tomas Bryllert, Jonas Ohlsson, Truls Löwgren, Lars Samuelson, Claes Thelander
  • Publication number: 20100148149
    Abstract: The present invention relates to light emitting diodes comprising at least one nanowire. The LED according to the invention is an upstanding nanostructure with the nanowire protruding from a substrate. A bulb with a larger diameter than the nanowire is arranged in connection to the nanowire and at an elevated position with regards to the substrate. A pn-junction is formed by the combination of the bulb and the nanowire resulting in an active region to produce light.
    Type: Application
    Filed: December 22, 2007
    Publication date: June 17, 2010
    Inventors: Bo Pedersen, Lars Samuelson, Jonas Ohlsson, Patrik Svensson
  • Publication number: 20100102380
    Abstract: The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5) essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device (1) is utilised in combination with either anisotropic deposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.
    Type: Application
    Filed: September 18, 2007
    Publication date: April 29, 2010
    Inventors: Jonas Ohlsson, Lars Samuelson, Erik Lind, Lars-Erik Wernersson, Truls Löwgren
  • Publication number: 20100006817
    Abstract: The present invention provides an optoelectronic semiconductor device comprising at least one semiconductor nanowire, wherein the nanowire comprises a nanowire core and at least one shell layer arranged around at least a portion of the nanowire core. The nanowire core and the shell layer form a pn or pin junction that in operation provides an active region for carrier generation or carrier recombination. Quantum dots adapted to act as carrier recombination centres or carrier generation centres are arranged in the active region. By using the nanowire core as template for formation of the quantum dots and the shell layer, quantum dots of homogeneous size and uniform distribution can be obtained. Basically, the optoelectronic semiconductor device can be used for light generation or light absorption.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 14, 2010
    Inventors: Jonas Ohlsson, Lars Samuelson
  • Publication number: 20090321716
    Abstract: A nanowire wrap-gate transistor is realised in a semiconductor material with a band gap narrower than Si. The strain relaxation in the nanowires allows the transistor to be placed on a large variety of substrates and heterostructures to be incorporated in the device. Various types of heterostructures should be introduced in the transistor to reduce the output conductance via reduced impact ionization rate, increase the current on/off ratio, reduction of the sub-threshold slope, reduction of transistor contact resistance and improved thermal stability. The parasitic capacitances should be minimized by the use of semi-insulating substrates and the use of cross-bar geometry between the source and drain access regions. The transistor may find applications in digital high frequency and low power circuits as well as in analogue high frequency circuits.
    Type: Application
    Filed: June 16, 2006
    Publication date: December 31, 2009
    Inventors: Lars-Erik Wernersson, Tomas Bryllert, Erik Lind, Lars Samuelson
  • Publication number: 20090301389
    Abstract: The present invention relates to epitaxial growth of nanowires on a substrate. In particular the invention relates to growth of nanowires on an Si-substrate without using Au as a catalyst. In the method according to the invention an oxide template is provided on a passivated surface of the substrate. The oxide template defines a plurality of nucleation onset positions for subsequent nanowire growth. According to one embodiment a thin organic film is used to form the oxide template.
    Type: Application
    Filed: March 7, 2007
    Publication date: December 10, 2009
    Inventors: Lars Samuelson, Thomas Mårtensson, Werner Seifert, Anders Mikkelsen, Bernhard Mandl
  • Publication number: 20090294757
    Abstract: The present invention relates to nanoscaled electronic devices with a vertical nanowire as a functional part. Contacts are arranged on the nanowire at different parts of the nanowire, for example drain and source contacts. In connection to the nanowire contacts are external electrodes, that connect at different levels, as seen from the substrate, of the device. The external electrodes are elongated, and typically and preferably stripe-like. According to the invention a first external electrode, or contacts, associated with contact(s) at a first part of the nanowire, and a second external electrode, associated with contact(s) at a second part of the nanowire are arranged in a cross-bar configuration. The cross-bar configuration minimizes the overlay of the external electrodes, hence, parasitic capacitances and current leakage can be reduced, and the performance of the device improved.
    Type: Application
    Filed: June 16, 2006
    Publication date: December 3, 2009
    Inventors: Lars-Erik Wernersson, Tomas Bryllert, Erik Lind, Lars Samuelson
  • Publication number: 20080105296
    Abstract: A resonant tunneling diode, and other one dimensional electronic, photonic structures, and electromechanical MEMS devices, are formed as a heterostructure in a nanowhisker by forming length segments of the whisker with different materials having different band gaps.
    Type: Application
    Filed: December 31, 2007
    Publication date: May 8, 2008
    Inventors: Lars Samuelson, Bjorn Ohlsson
  • Publication number: 20070206488
    Abstract: The present invention relates to a device for data storage. In particular the invention relates to a single electron memory device utilizing multiple tunnel junctions, and arrays or matrixes of such devices. The data storage device according to the invention comprises at least one nanowhisker adapted to store a charge. Each of the nanowhiskers comprises a sequence of axial segments of materials of different band gaps, arranged to provide a sequence of conductive islands separated by tunnel barriers and a storage island arranged at one end of the conductive island/tunnel barrier sequence, whereby to provide a data storage capability. The number of conductive islands should preferably be between five and ten.
    Type: Application
    Filed: February 23, 2006
    Publication date: September 6, 2007
    Inventors: Claes Thelander, Lars Samuelson
  • Publication number: 20060125056
    Abstract: A method for forming a nanowhisker of, e.g., a III-V semiconductor material on a silicon substrate, comprises: preparing a surface of the silicon substrate with measures including passivating the substrate surface by HF etching, so that the substrate surface is essentially atomically flat. Catalytic particles on the substrate surface are deposited from an aerosol; the substrate is annealed; and gases for a MOVPE process are introduced into the atmosphere surrounding the substrate, so that nanowhiskers are grown by the VLS mechanism. In the grown nanowhisker, the crystal directions of the substrate are transferred to the epitaxial crystal planes at the base of the nanowhisker and adjacent the substrate surface.
    Type: Application
    Filed: June 24, 2005
    Publication date: June 15, 2006
    Inventors: Lars Samuelson, Thomas Martensson
  • Publication number: 20060057360
    Abstract: A method of forming a nanostructure having the form of a tree, comprises a first stage and a second stage. The first stage includes providing one or more catalytic particles on a substrate surface, and growing a first nanowhisker via each catalytic particle. The second stage includes providing, on the periphery of each first nanowhisker, one or more second catalytic particles, and growing, from each second catalytic particle, a second nanowhisker extending transversely from the periphery of the respective first nanowhisker. Further stages may be included to grow one or more further nanowhiskers extending from the nanowhisker(s) of the preceding stage. Heterostructures may be created within the nanowhiskers. Such nanostructures may form the components of a solar cell array or a light emitting flat panel, where the nanowhiskers are formed of a photosensitive material.
    Type: Application
    Filed: November 12, 2004
    Publication date: March 16, 2006
    Inventors: Lars Samuelson, Knut Deppert
  • Publication number: 20060019470
    Abstract: Nanowhiskers are grown in a non-preferential growth direction by regulation of nucleation conditions to inhibit growth in a preferential direction. In a preferred implementation, <001> III-V semiconductor nanowhiskers are grown on an (001) III-V semiconductor substrate surface by effectively inhibiting growth in the preferential <111>B direction. As one example, <001> InP nano-wires were grown by metal-organic vapor phase epitaxy directly on (001) InP substrates. Characterization by scanning electron microscopy and transmission electron microscopy revealed wires with nearly square cross sections and a perfect zincblende crystalline structure that is free of stacking faults.
    Type: Application
    Filed: February 3, 2005
    Publication date: January 26, 2006
    Inventors: Werner Seifert, Lars Samuelson, Bjorn Ohlsson, Lars Borgstrom
  • Publication number: 20050017171
    Abstract: A probe structure for a scanning probe microscope comprises a nanowhisker (16,34) projecting from a free end of an upstanding tip member (4,26), and being formed integrally with the tip member. In another embodiment, a data storage medium comprises an array of nanowhiskers (54), each nanowhisker being formed from magnetic material, the diameter of the nanowhisker being such that a single ferromagnetic domain exists within the nanowhisker, preferably having a diameter not greater than about 25 nm and more preferably not greater than about 10 nm, and a read/write structure comprising the probe structure for injecting a stream of spin-polarised electrons into a selected nanowhisker of the array, either for sensing the direction of magnetisation in the nanowhisker, or for forcing the nanowhisker into a desired direction of magnetisation.
    Type: Application
    Filed: January 7, 2004
    Publication date: January 27, 2005
    Inventors: Lars Samuelson, Bjorn Ohlsson
  • Publication number: 20050011431
    Abstract: A nanoengineered structure comprising an array of more than about 1000 nanowhiskers on a substrate in a predetermined spatial configuration, for use for example as a photonic band gap array, wherein each nanowhisker is sited within a distance from a predetermined site not greater than about 20% of its distance from its nearest neighbour. To produce the array, an array of masses of a catalytic material are positioned on the surface, heat is applied and materials in gaseous form are introduced such as to create a catalytic seed particle from each mass, and to grow, from the catalytic seed particle, epitaxially, a nanowhisker of a predetermined material, and wherein each mass upon melting, retains approximately the same interface with the substrate surface such that forces causing the mass to migrate across said surface are less than a holding force across a wetted interface on the substrate surface.
    Type: Application
    Filed: January 7, 2004
    Publication date: January 20, 2005
    Inventors: Lars Samuelson, Bjorn Ohlsson, Thomas Martensson
  • Publication number: 20050006673
    Abstract: Nano-engineered structures are disclosed, incorporating nanowhiskers of high mobility conductivity and incorporating pn junctions. In one embodiment, a nanowhisker of a first semiconducting material has a first band gap, and an enclosure comprising at least one second material with a second band gap encloses said nanoelement along at least part of its length, the second material being doped to provide opposite conductivity type charge carriers in respective first and second regions along the length of the of the nanowhisker, whereby to create in the nanowhisker by transfer of charge carriers into the nanowhisker, corresponding first and second regions of opposite conductivity type charge carriers with a region depleted of free carriers therebetween. The doping of the enclosure material may be degenerate so as to create within the nanowhisker adjacent segments having very heavy modulation doping of opposite conductivity type analogous to the heavily doped regions of an Esaki diode.
    Type: Application
    Filed: April 1, 2004
    Publication date: January 13, 2005
    Inventors: Lars Samuelson, Bjorn Ohlsson, Lars-Ake Ledebo