Patents by Inventor Lawrence L. Case
Lawrence L. Case has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9954681Abstract: A method of encrypting data on a memory device includes receiving a memory transaction request at an inline encryption engine coupled between a processing core and switch fabric in a system on a chip (SOC). The memory transaction request includes a context component and a data component. The context component is analyzed to determine whether the data component will be stored in an encrypted memory region. If the data component will be stored in an encrypted memory region, the data component is encrypted and communicated to a location in the encrypted memory region. The location is based at least on the context component.Type: GrantFiled: June 10, 2015Date of Patent: April 24, 2018Assignee: NXP USA, Inc.Inventors: Lawrence L. Case, Charles E. Cannon, Mingle Sun, Thomas E. Tkacik
-
Patent number: 9830295Abstract: A resource domain controller in a data processing system stores information that is used to group various resources, such as bus masters and peripherals, into common domains. Each group can be referred to as a resource domain and can include one or more data processor and peripheral devices. The resource domain information is then used to determine whether a particular access request from a data processor is authorized to access its intended target, e.g., one of the peripheral devices, by determining whether the access request and the intended target each belong to a common resource domain. If so, the access request is allowed, otherwise the access request is prevented from being successfully completed.Type: GrantFiled: January 15, 2015Date of Patent: November 28, 2017Assignee: NXP USA, Inc.Inventors: Lawrence L. Case, Charles E. Cannon, Simon J. Gallimore, Glen G. Wienecke
-
Patent number: 9824243Abstract: A runtime classifier hardware circuit is incorporated into an electronic device for implementing hardware security by storing a support vector model in memory which is derived from pre-silicon verification data to define secure behavior for a first circuit on the electronic device; monitoring input and/or output signals associated with the first circuit using the runtime classifier hardware circuit which compares the input and/or output signals to the support vector model to detect an outlier input signal and/or outlier output signal for the first circuit; and blocking the outlier input and/or output signal from being input to or output from the first circuit.Type: GrantFiled: September 11, 2015Date of Patent: November 21, 2017Assignee: NXP USA, INC.Inventors: Wen Chen, Jayanta Bhadra, Lawrence L. Case
-
Patent number: 9729319Abstract: Methods and systems are disclosed for key management for on-the-fly hardware decryption within an integrated circuit. Encrypted information is received from an external memory and stored in an input buffer within the integrated circuit. The encrypted information includes one or more encrypted key blobs. The encrypted key blobs include one or more secret keys for encrypted code associated with one or more encrypted software images stored within the external memory. A key-encryption key (KEK) code for the encrypted key blobs is received from an internal data storage medium within the integrated circuit, and the KEK code is used to generate one or more key-encryption keys (KEKs). A decryption system then decrypts the encrypted key blobs using the KEKs to obtain the secret keys, and the decryption system decrypts the encrypted code using the secret keys. The resulting decrypted software code is then available for further processing.Type: GrantFiled: December 15, 2014Date of Patent: August 8, 2017Assignee: NXP USA, Inc.Inventors: Joseph C. Circello, David J. Schimke, Mohit Arora, Lawrence L. Case, Rodney D. Ziolkowski
-
Publication number: 20170076116Abstract: A runtime classifier hardware circuit is incorporated into an electronic device for implementing hardware security by storing a support vector model in memory which is derived from pre-silicon verification data to define secure behavior for a first circuit on the electronic device; monitoring input and/or output signals associated with the first circuit using the runtime classifier hardware circuit which compares the input and/or output signals to the support vector model to detect an outlier input signal and/or outlier output signal for the first circuit; and blocking the outlier input and/or output signal from being input to or output from the first circuit.Type: ApplicationFiled: September 11, 2015Publication date: March 16, 2017Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Wen Chen, Jayanta Bhadra, Lawrence L. Case
-
Publication number: 20160364343Abstract: A method of encrypting data on a memory device includes receiving a memory transaction request at an inline encryption engine coupled between a processing core and switch fabric in a system on a chip (SOC). The memory transaction request includes a context component and a data component. The context component is analyzed to determine whether the data component will be stored in an encrypted memory region. If the data component will be stored in an encrypted memory region, the data component is encrypted and communicated to a location in the encrypted memory region. The location is based at least on the context component.Type: ApplicationFiled: June 10, 2015Publication date: December 15, 2016Inventors: LAWRENCE L. CASE, Charles E. Cannon, Mingle Sun, Thomas E. Tkacik
-
Patent number: 9436248Abstract: A semiconductor device includes a processing system including a section of power domain circuitry and a section of coin cell power domain circuitry. The coin cell power domain circuitry is configured to, when power is initially provided to the coin cell power domain circuitry, using power provided by a power management circuit as feedback to determine that the power management circuit provides the power in response to a power request signal being a toggle signal, and determine that the power management circuit provides the power in response to the power request signal being a pulse signal.Type: GrantFiled: July 31, 2013Date of Patent: September 6, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Lawrence L. Case, Matthew W. Brocker, Mingle Sun, Thomas E. Tkacik
-
Patent number: 9430658Abstract: To securely configure an electronic circuit and provision a product that includes the electronic circuit, a first entity (e.g., a chip manufacturer) embeds one or more secret values into copies of the circuit. A second entity (e.g., an OEM): 1) derives a trust anchor from a code signing public key; 2) embeds the trust anchor in a first circuit copy; 3) causes the first circuit copy to generate a secret key derived from the trust anchor and the embedded secret value(s); 4) signs provisioning code using a code signing private key; and 5) sends the code signing public key, the trust anchor, and the signed provisioning code to a third entity (e.g., a product manufacturer). The third entity embeds the trust anchor in a second circuit copy and causes it to: 1) generate the secret key; 2) verify the signature of the signed provisioning code using the code signing public key; and 3) launch the provisioning code.Type: GrantFiled: December 16, 2014Date of Patent: August 30, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Carlin R. Covey, Lawrence L. Case, Thomas E. Tkacik
-
Patent number: 9418246Abstract: Methods and systems are disclosed for on-the-fly decryption within an integrated circuit that adds zero additional cycles of latency within the overall decryption system performance. A decryption system within a processing system integrated circuit generates an encrypted counter value using an address while encrypted code associated with an encrypted software image is being obtained from an external memory using the address. The decryption system then uses the encrypted counter value to decrypt the encrypted code and to output decrypted code that can be further processed. A secret key and an encryption engine can be used to generate the encrypted counter value, and an exclusive-OR logic block can process the encrypted counter value and the encrypted code to generate the decrypted code. By pre-generating the encrypted counter value, additional cycle latency is avoided. Other similar data independent encryption/decryption techniques can also be used such as output feedback encryption/decryption modes.Type: GrantFiled: December 15, 2014Date of Patent: August 16, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Joseph C. Circello, David J. Schimke, Mohit Arora, Lawrence L. Case, Rodney D. Ziolkowski
-
Publication number: 20160226710Abstract: An abstract and method for providing home evolved node-B (H(e)NB) integrity verification and validation using autonomous validation and semi-autonomous validation is disclosed herein.Type: ApplicationFiled: January 19, 2016Publication date: August 4, 2016Inventors: Inhyok Cha, Andreas Leicher, Yogendra C. Shah, Andreas Schmidt, Dolores F. Howry, Sudhir B. Pattar, David G. Greiner, Louis J. Guccione, Michael V. Meyerstein, Lawrence L. Case
-
Publication number: 20160210260Abstract: A resource domain controller in a data processing system stores information that is used to group various resources, such as bus masters and peripherals, into common domains. Each group can be referred to as a resource domain and can include one or more data processor and peripheral devices. The resource domain information is then used to determine whether a particular access request from a data processor is authorized to access its intended target, e.g., one of the peripheral devices, by determining whether the access request and the intended target each belong to a common resource domain. If so, the access request is allowed, otherwise the access request is prevented from being successfully completed.Type: ApplicationFiled: January 15, 2015Publication date: July 21, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Lawrence L. Case, Charles E. Cannon, Simon J. Gallimore, Glen G. Wienecke
-
Publication number: 20160171223Abstract: To securely configure an electronic circuit and provision a product that includes the electronic circuit, a first entity (e.g., a chip manufacturer) embeds one or more secret values into copies of the circuit. A second entity (e.g., an OEM): 1) derives a trust anchor from a code signing public key; 2) embeds the trust anchor in a first circuit copy; 3) causes the first circuit copy to generate a secret key derived from the trust anchor and the embedded secret value(s); 4) signs provisioning code using a code signing private key; and 5) sends the code signing public key, the trust anchor, and the signed provisioning code to a third entity (e.g., a product manufacturer). The third entity embeds the trust anchor in a second circuit copy and causes it to: 1) generate the secret key; 2) verify the signature of the signed provisioning code using the code signing public key; and 3) launch the provisioning code.Type: ApplicationFiled: December 16, 2014Publication date: June 16, 2016Inventors: CARLIN R. COVEY, LAWRENCE L. CASE, THOMAS E. TKACIK
-
Publication number: 20160171249Abstract: Methods and systems are disclosed for on-the-fly decryption within an integrated circuit that adds zero additional cycles of latency within the overall decryption system performance. A decryption system within a processing system integrated circuit generates an encrypted counter value using an address while encrypted code associated with an encrypted software image is being obtained from an external memory using the address. The decryption system then uses the encrypted counter value to decrypt the encrypted code and to output decrypted code that can be further processed. A secret key and an encryption engine can be used to generate the encrypted counter value, and an exclusive-OR logic block can process the encrypted counter value and the encrypted code to generate the decrypted code. By pre-generating the encrypted counter value, additional cycle latency is avoided. Other similar data independent encryption/decryption techniques can also be used such as output feedback encryption/decryption modes.Type: ApplicationFiled: December 15, 2014Publication date: June 16, 2016Inventors: Joseph C. Circello, David J. Schimke, Mohit Arora, Lawrence L. Case, Rodney D. Ziolkowski
-
Publication number: 20160173282Abstract: Methods and systems are disclosed for key management for on-the-fly hardware decryption within an integrated circuit. Encrypted information is received from an external memory and stored in an input buffer within the integrated circuit. The encrypted information includes one or more encrypted key blobs. The encrypted key blobs include one or more secret keys for encrypted code associated with one or more encrypted software images stored within the external memory. A key-encryption key (KEK) code for the encrypted key blobs is received from an internal data storage medium within the integrated circuit, and the KEK code is used to generate one or more key-encryption keys (KEKs). A decryption system then decrypts the encrypted key blobs using the KEKs to obtain the secret keys, and the decryption system decrypts the encrypted code using the secret keys. The resulting decrypted software code is then available for further processing.Type: ApplicationFiled: December 15, 2014Publication date: June 16, 2016Inventors: Joseph C. Circello, David J. Schimke, Mohit Arora, Lawrence L. Case, Rodney D. Ziolkowski
-
Patent number: 9253643Abstract: An apparatus and method for providing home evolved node-B (H(e)NB) integrity verification and validation using autonomous validation and semi-autonomous validation is disclosed herein.Type: GrantFiled: March 5, 2010Date of Patent: February 2, 2016Assignee: InterDigital Patent Holdings, Inc.Inventors: Sudhir B. Pattar, Inhyok Cha, Andreas U. Schmidt, Andreas Leicher, Yogendra C. Shah, Dolores F. Howry, David G. Greiner, Lawrence L. Case, Michael V. Meyerstein, Louis J. Guccione
-
Patent number: 9129536Abstract: Embodiments of electronic circuits enable security of sensitive data in a design and manufacturing process that includes multiple parties. An embodiment of an electronic circuit can include a private key embedded within the electronic circuit that is derived from a plurality of components including at least one component known only to the electronic circuit and at least one immutable value cryptographically bound into messages and residing on the electronic circuit, public key generation logic that generates a public key to match the private key, and message signing logic that signs messages with the private key.Type: GrantFiled: August 31, 2012Date of Patent: September 8, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Thomas E. Tkacik, Lawrence L. Case, Carlin R. Covey, David H. Hartley, Rodney D. Ziolkowski
-
Patent number: 9100174Abstract: Embodiments include methods for securely provisioning copies of an electronic circuit. A first entity (e.g., a chip manufacturer) embeds one or more secret values into copies of the electronic circuit. A second entity (e.g., an OEM): 1) embeds a trust anchor in a first copy of the electronic circuit; 2) causes the electronic circuit to generate a message signing key pair using the trust anchor and the embedded secret value(s); 3) signs provisioning code using a code signing private key; and 4) sends a corresponding code signing public key, the trust anchor, and the signed provisioning code to a third entity (e.g., a product manufacturer). The third entity embeds the trust anchor in a second copy of the electronic circuit and causes the electronic circuit to: 1) generate the message signing private key; 2) verify the signature of the signed provisioning code using the code signing public key; and 3) launch the provisioning code on the electronic circuit.Type: GrantFiled: March 20, 2014Date of Patent: August 4, 2015Assignee: Freescale Semiconductor, Inc.Inventors: David H. Hartley, Thomas E. Tkacik, Carlin R. Covey, Lawrence L. Case, Rodney D. Ziolkowski
-
Patent number: 9100189Abstract: Embodiments include methods for securely provisioning copies of an electronic circuit. A first entity embeds one or more secret values into copies of the circuit. A second entity: 1) embeds a trust anchor in a first copy of the circuit; 2) causes the circuit to generate a message signing key pair using the trust anchor and the embedded secret value(s); 3) signs provisioning code using a code signing private key; and 4) sends a corresponding code signing public key, the trust anchor, and the signed provisioning code to a third entity. The third entity embeds the trust anchor in a second copy of the circuit and causes the circuit to: 1) generate the message signing private key; 2) verify the signature of the signed provisioning code using the code signing public key; and 3) launch the provisioning code on the circuit.Type: GrantFiled: August 21, 2013Date of Patent: August 4, 2015Assignee: Freescale Semiconductor, Inc.Inventors: David H. Hartley, Thomas E. Tkacik, Carlin R. Covey, Lawrence L. Case, Rodney D. Ziolkowski
-
Patent number: 9094205Abstract: Embodiments of methods of provisioning an electronic circuit enable security of sensitive data in a design and manufacturing process that includes multiple parties. In an illustrative embodiment, a method of provisioning an electronic circuit includes generating at least one secret value, embedding the at least one secret value into the electronic circuit, programming into the electronic circuit a private key derivation function that derives the private key from the at least one secret value and a trust anchor, and programming into the electronic circuit a public key generation function that generates a public key matching the private key. The method can further include receiving for execution trust anchor-authenticated logic that contacts a predetermined actor of the plurality of distinct actors and communicates to the predetermined actor a message signed with the private key.Type: GrantFiled: August 31, 2012Date of Patent: July 28, 2015Assignee: Freescale Semiconductor, Inc.Inventors: David H. Hartley, Thomas E. Tkacik, Carlin R. Covey, Lawrence L. Case, Rodney D. Ziolkowski
-
Publication number: 20150039916Abstract: A semiconductor device includes a processing system including a section of power domain circuitry and a section of coin cell power domain circuitry. The coin cell power domain circuitry is configured to, when power is initially provided to the coin cell power domain circuitry, using power provided by a power management circuit as feedback to determine that the power management circuit provides the power in response to a power request signal being a toggle signal, and determine that the power management circuit provides the power in response to the power request signal being a pulse signal.Type: ApplicationFiled: July 31, 2013Publication date: February 5, 2015Inventors: Lawrence L. Case, Matthew W. Brocker, Mingle Sun, Thomas E. Tkacik