Patents by Inventor Lawrence Melvin

Lawrence Melvin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100212036
    Abstract: The present invention provides for methods of treating and preventing cardiac hypertrophy. Class I HDACs, which are known to participate in regulation of chromatin structure and gene expression, have generally been considered as pro-hypertrophic in their action. However, the present invention demonstrates that inhibition of certain Class I HDACs should be avoided in the treatment of cardiac hypertrophy, thereby pointing toward selective, and not global, inhibition of Class I HDACs. In particular, the present invention provides for selective inhibition of HDACs 1 and/or 2, and the avoidance of inhibition of HDAC3.
    Type: Application
    Filed: September 29, 2009
    Publication date: August 19, 2010
    Inventors: Eric N. Olson, Lawrence Melvin, Rusty L. Montgomery
  • Publication number: 20080187122
    Abstract: To provide a globally useful telephone number a character string which may be similar to an email address may be provided to a mobile phone server or an internet server for translation to the actual phone number and establishment of a call to that number.
    Type: Application
    Filed: January 17, 2006
    Publication date: August 7, 2008
    Inventor: Colin Lawrence Melvin Baker
  • Publication number: 20070276050
    Abstract: This invention is directed to methods for identifying apoptosis signal-regulated kinase 1 (“ASK1”) inhibitors useful for preventing and/or treating cardiovascular disease. This invention also relates to methods for preventing and/or treating cardiovascular disease in an animal by administering to the animal an ASK1 inhibitor.
    Type: Application
    Filed: February 26, 2007
    Publication date: November 29, 2007
    Applicant: GILEAD SCIENCES, INC.
    Inventors: Keith Koch, Lawrence Melvin, Richard Gorczynski
  • Publication number: 20070250804
    Abstract: One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal (e.g., optimal) process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary (e.g., non-optimal) process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Note that identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout.
    Type: Application
    Filed: May 8, 2007
    Publication date: October 25, 2007
    Inventors: Lawrence Melvin, James Shiely, Qiliang Yan
  • Publication number: 20070162888
    Abstract: One embodiment provides a method to determine if a pattern is robustly manufacturable. During operation, the system may receive a first pattern and a design intent, wherein the first pattern is intended to generate the design intent. Next, the system may determine a second pattern using the design intent, wherein subjecting the second pattern to a second manufacturing process is expected to generate a third pattern that is substantially similar to the design intent. The system may then determine if a first semiconductor manufacturing process is capable of robustly manufacturing the second pattern. If the second pattern is not robustly manufacturable, the system may generate an indicator that indicates that the first pattern is not robustly manufacturable.
    Type: Application
    Filed: February 28, 2007
    Publication date: July 12, 2007
    Inventors: Lawrence Melvin III, Daniel Beale
  • Publication number: 20070082281
    Abstract: One embodiment of the present invention provides a system that accurately determines a critical dimension of a feature in a layout by compensating for the effects of topography variation on the performance of an optical lithography process. During operation, the system first receives a layout. Next, the system computes an aerial-image intensity at an evaluation point in the layout using an optical lithography model that models the optical lithography process. Note that the aerial-image intensity is typically compared with a constant intensity threshold to determine a critical dimension of a feature in the layout. The system then computes an intensity threshold based on features in the proximity of the evaluation point, which compensates for the effects of topography variations on the performance of the optical lithography process.
    Type: Application
    Filed: October 7, 2005
    Publication date: April 12, 2007
    Inventors: Lawrence Melvin, Jensheng Huang
  • Publication number: 20070038973
    Abstract: One embodiment of the present invention determines the effect of placing an assist feature at a location in a layout. During operation, the system receives a first value which was pre-computed by convolving a model with a layout at an evaluation point, wherein the model models semiconductor manufacturing processes. Next, the system determines a second value by convolving the model with an assist feature, which is assumed to be located at a first location which is in proximity to the evaluation point. The system then determines the effect of placing an assist feature using the first value and the second value. An embodiment of the present invention can be used to determine a substantially optimal location for placing an assist feature in a layout.
    Type: Application
    Filed: October 19, 2006
    Publication date: February 15, 2007
    Inventors: Jianliang Li, Qiliang Yan, Lawrence Melvin, Levi Barnes, Alakananda Biswas, Abani Biswas
  • Publication number: 20060236297
    Abstract: One embodiment of the present invention provides a system that assesses the quality of a process model. During operation, the system receives a mask layout and additionally receives a process model that models the effects of one or more semiconductor manufacturing processes on the mask layout. Next, the system computes a gradient of the process model with respect to a process model parameter. The system then computes a quality indicator at an evaluation point in the mask layout using the gradient of the process model and the mask layout. Next, the system assesses the quality of the process model using the quality indicator. In one embodiment, the system assesses the quality of the process model by comparing the quality indicator with a threshold.
    Type: Application
    Filed: October 3, 2005
    Publication date: October 19, 2006
    Inventors: Lawrence Melvin, Qiliang Yan
  • Publication number: 20060236296
    Abstract: One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems due to a missing or an improperly placed assist feature. During operation, the system receives an uncorrected or corrected mask layout. The system then dissects the mask layout into segments. Next, the system identifies a problem area associated with a segment using a process-sensitivity model which can be represented by a multidimensional function that captures process-sensitivity information. Note that identifying the problem area allows a new assist feature to be added or an existing assist feature to be adjusted, thereby improving the wafer manufacturability. Moreover, using the process-sensitivity model reduces the computational time required to identify the problem area.
    Type: Application
    Filed: April 19, 2005
    Publication date: October 19, 2006
    Inventors: Lawrence Melvin, Benjamin Painter
  • Publication number: 20060212839
    Abstract: One embodiment of the present invention provides a system that modifies a layout to improve manufacturing robustness. During operation, the system receives a layout. The system then selects a segment in the layout. Next, the system determines a target location in the proximity of the segment where the value of a process-sensitivity model is within a desired range of values. The system then modifies the layout so that the segment is located at the target location. The layout modification can cause the pattern which is associated with the segment to exhibit isofocal behavior, which can improve manufacturing robustness.
    Type: Application
    Filed: May 24, 2006
    Publication date: September 21, 2006
    Inventors: Lawrence Melvin, Ebo Croffie
  • Publication number: 20060206854
    Abstract: One embodiment of the present invention provides a system that determines an assist feature placement. During operation, the system receives an initial assist feature placement for a layout. Next, the system determines assist feature perturbations using the initial assist feature placement. An assist feature perturbation typically comprises a few simple polygons. The system then determines perturbation values at evaluation points in the layout using the assist feature perturbations and an analytical model. If a process-sensitivity model is used, the perturbation value at an evaluation point is associated with the change in the through-process window at that point in the layout. Next, the system determines a change in the value of an objective function using the perturbation values. The objective function can be indicative of the overall manufacturability of the layout. The system then determines an assist feature placement using the change in the value of the objective function.
    Type: Application
    Filed: May 12, 2006
    Publication date: September 14, 2006
    Inventors: Levi Barnes, Lawrence Melvin, Benjamin Painter
  • Publication number: 20060188673
    Abstract: One embodiment of the present invention provides a system that determines the locations and dimensions of one or more assist features in an uncorrected or corrected mask layout. During operation, the system receives a mask layout. The system then creates a set of candidate assist feature configurations, which specify locations and sizes for one or more assist features in the mask layout. Next, the system determines an improved assist feature configuration using the set of candidate assist feature configurations and a process-sensitivity model which can be represented by a multidimensional function that captures process-sensitivity information. Note that placing assist features in the mask layout based on the improved assist feature configuration improves the manufacturability of the mask layout. Moreover, using the process-sensitivity model to determine the improved assist feature configuration reduces the computational time required to determine the improved assist feature configuration in the mask layout.
    Type: Application
    Filed: April 19, 2005
    Publication date: August 24, 2006
    Inventors: Lawrence Melvin, Benjamin Painter
  • Publication number: 20060190912
    Abstract: One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal (e.g., optimal) process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary (e.g., non-optimal) process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. Note that a process model (on-target, off-target, or process-sensitivity) can be represented by a multidimensional (e.g., 2-D) function. The system then identifies a problem area in the mask layout using the process-sensitivity model. Note that identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout.
    Type: Application
    Filed: February 24, 2005
    Publication date: August 24, 2006
    Inventors: Lawrence Melvin, James Shiely
  • Publication number: 20060190913
    Abstract: One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal (e.g., optimal) process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary (e.g., non-optimal) process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Note that identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout.
    Type: Application
    Filed: March 17, 2005
    Publication date: August 24, 2006
    Inventors: Lawrence Melvin, James Shiely, Qiliang Yan
  • Publication number: 20060189545
    Abstract: Methods and composition for treating or preventing, the occurrence of senile dementia of the Alzheimer's type, or other conditions arising from reduced neuronal metabolism and leading to lessened cognitive function are described. In a preferred embodiment the administration of novel esterified saccharide compounds to said patient at a level to produce an improvement in cognitive ability.
    Type: Application
    Filed: March 8, 2004
    Publication date: August 24, 2006
    Inventors: Samuel Henderson, Steve Orndorff, Lawrence Melvin
  • Publication number: 20060190914
    Abstract: One embodiment of the present invention provides a system that identifies a problem edge in a mask layout which is likely to have manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more process conditions that are different from nominal process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes an edge-detecting process-sensitivity model by convolving the process-sensitivity model with an edge-detecting function which can be used to detect edges in an image. Next, the system identifies a problem edge in the mask layout using the edge-detecting process-sensitivity model.
    Type: Application
    Filed: May 6, 2005
    Publication date: August 24, 2006
    Inventors: Lawrence Melvin, James Shiely, Qiliang Yan, Benjamin Painter
  • Publication number: 20060166110
    Abstract: One embodiment of the present invention provides a system that improves the depth of focus during an optical lithography process. During operation, the system receives a mask layout. The system then selects an edge in the mask layout. Next, the system adds a notch to the edge to improve the depth of focus by helping to maintain a critical dimension associated with the edge as the optical lithography process drifts out of focus. Note that adding a notch to the edge adds a high spatial-frequency component to the mask layout. This high spatial-frequency component degrades as the optical lithography process drifts out of focus. This degradation causes the mask layout to allow more light into the pattern, which helps maintain the critical dimension, thereby improving depth of focus.
    Type: Application
    Filed: January 27, 2005
    Publication date: July 27, 2006
    Inventors: Lawrence Melvin, James Shiely
  • Publication number: 20060156270
    Abstract: One embodiment of the present invention provides a system that improves lithography performance by correcting for 3D mask effects. During operation the system receives a mask layout that contains etched regions, called shifters, which can have a phase shift relative to other regions. Next, the system chooses a shifter in the mask layout. The system then corrects for 3D mask effects by, iteratively, (a) selecting a region within the shifter, (b) adjusting the phase shift of the selected region in a simulation model to account for 3D mask effects, and (c) modifying the shape of the shifter based on the difference between a desired pattern and a simulated pattern generated using the simulation model.
    Type: Application
    Filed: January 10, 2005
    Publication date: July 13, 2006
    Inventors: Lawrence Melvin, Qiliang Yan, James Shiely
  • Publication number: 20060147815
    Abstract: One embodiment of the present invention provides a system that determines a location in a layout to place an assist feature. During operation, the system receives a layout of an integrated circuit. Next, the system selects an evaluation point in the layout. The system then chooses a candidate location in the layout for placing an assist feature. Next, the system determines the final location in the layout to place an assist feature by, iteratively, (a) selecting perturbation locations for placing representative assist features in the proximity of the candidate location, (b) computing aerial-images using an image intensity model, the layout, and by placing representative assist features at the candidate location and the perturbation locations, (c) calculating image-gradient magnitudes at the evaluation point based on the aerial-images, and (d) updating the candidate location for the assist feature based on the image-gradient magnitudes.
    Type: Application
    Filed: January 3, 2005
    Publication date: July 6, 2006
    Inventor: Lawrence Melvin
  • Publication number: 20060026541
    Abstract: One embodiment of the invention provides a system that expedites or stabilizes convergence in a model-based optical proximity correction (OPC) process. During operation, the system receives a layout for an integrated circuit. Next, the system dissects shapes in the layout into a number of segments, and then runs a number of OPC iterations on the segments to produce an OPC-corrected layout. During each OPC iteration, the system calculates a chrome shift for each segment based on a current layout obtained from the previous iteration, wherein the chrome shift for a segment is measured from the previous position of the chrome edge in that segment. The system then calculates an adjusted chrome shift for each segment based on the newly calculated chrome shift and chrome shift values obtained in one or more previous iterations. Next, the system applies the adjusted chrome shift values to the current layout to obtain an updated layout.
    Type: Application
    Filed: August 2, 2004
    Publication date: February 2, 2006
    Inventors: Lawrence Melvin, Benjamin Painter