Abstract: A system comprises a variable gain amplifier (VGA) that amplifies an input signal with a gain that is based on a gain control signal. A power amplifier receives an output of the VGA. Memory switches between at least two of N output power settings each including a predetermined reference value and a predetermined gain offset value. The memory substantially concurrently changes from the predetermined reference value and the predetermined gain offset value of a prior one of the N output power settings to the predetermined reference value and the predetermined gain offset value of a current one of the N output power settings, where N is an integer greater than one. A gain control adjuster adjusts the gain control signal based on an output of the power amplifier and the predetermined reference value and gain offset value of the current one of the N output power settings.

Abstract: A voltage regulator comprises a master regulator circuit that receives a reference signal and that generates a feedback signal and a master bias signal. The master bias signal is based on the reference signal and the feedback signal. N slave regulator circuits receive the master bias signal from the master regulator circuit and output N regulated output signals to N circuits, respectively, where N is an integer greater than one.

Abstract: A system for communicating information signals includes a receiver in selective communication with a first antenna and a second antenna. The receiver is configured to selectively receive information signals via the first or second antenna. The system includes a first low-noise amplifier in communication with the first antenna and in selective communication with the receiver. The first low-noise amplifier is configured to amplify a first information signal received by the first antenna to generate a first amplified signal. The system includes a second low-noise amplifier in communication with the second antenna and in selective communication with the receiver. At least the first and second low-noise amplifiers are formed on a monolithic substrate. The second low-noise amplifier is configured to amplify a second information signal received by the second antenna to generate a second amplified signal. Either the first or second amplified signal is selectively applied to the receiver.

Abstract: A method for reducing a parasitic capacitance of an electrostatic discharge (ESD) protection circuit for an integrated circuit (IC) includes providing an ESD protection circuit including a plurality of transistors; coupling one end of a resistor to a shared drain of the plurality of transistors; and coupling an opposite end of the resistor to at least one of an input pad of the IC, a blocking capacitor of the IC and a transistor in the IC.

Abstract: A mixer comprises a differential input circuit that is configured to receive an input signal. The mixer comprises a tank circuit including a tuning capacitor arranged in parallel with an inductor. A resonant frequency of the inductor and tuning capacitor is substantially centered around a predetermined frequency of the input signal. The mixer comprises a mixer circuit that communicates with the differential input circuit and that is configured to receive first and second current signals and a second input signal. The mixer circuit is configured as a Gilbert cell double-balanced switching mixer for generating a differential mixer output signal as a product of the first and second current signals and the second input signal.

Abstract: A Gilbert cell mixer for a wireless transceiver includes a first stage that performs voltage to current conversions and that includes first and second transistors that are operated in a saturation region and third and fourth transistors that are operated in a triode region. A second stage communicates with the first stage and that performs frequency conversion. A biasing circuit communicates with the first stage to maintain a substantially constant input linear range over temperature and process variations.

Abstract: A wireless network apparatus includes a receive circuit, a transmit circuit, and a processor. The receive circuit receives a first signal over a wireless link. The first signal represents packets of first data. The transmit circuit transmits a second signal over the wireless link at a power level indicated by a transmit power control signal. The second signal represents packets of second data. The processor determines a link quality of the wireless link based on the first signal. The processor selects one of a plurality of link quality thresholds based on the power level. The processor compares the link quality to the selected one of the plurality of link quality thresholds. The processor generates the transmit power control signal based on the comparison.

Abstract: A low noise amplifier (LNA) circuit includes a linear input stage including a first circuit that generates an output current and has a low input impedance. A device receives an input signal, communicates with the low impedance input of the first circuit, and includes a variable resistor having a resistance that varies based on the input signal.

Abstract: A protection circuit for a power amplifier of a radio frequency transmitter includes a sensing circuit that generates a sensed signal based on an output of the power amplifier. A reference signal generator generates a reference signal. A comparator communicates with the sensing circuit and the reference signal generator and outputs a first state when the reference signal exceeds the sensed signal and a second state when the sensed signal exceeds the reference signal. A turn off circuit turns off the power amplifier when the comparator is in the second state.

Abstract: An analog signal processing circuit comprises a bias circuit, a first circuit including a control input that communicates with the bias circuit, a first terminal that generates an output current, and a second terminal, and a device that communicates with the second terminal of the first circuit, that includes a variable resistor, and that has a resistance that is modulated in response to an input signal to the analog signal processing circuit.

Abstract: A wireless network device having active and inactive modes comprises a clock generating module that generates a first clock signal having a first clock rate. A voltage supply module generates a first voltage level and a second voltage level that is less than the first voltage level. A first digital module receives the first clock rate and the first voltage level during the active mode, receives the second voltage level during the inactive mode and does not receive the first clock signal during the inactive mode. A first analog module communicates with the voltage supply module and has reduced current consumption during the inactive mode.

Abstract: A gain calibration circuit comprises a generator that generates a constant overdrive voltage that biases a radio frequency (RF) mixer. A reference signal generator generates a reference signal. A comparator receives the reference signal and a second signal that is a function of a mixer bias current flowing through the RF mixer and that generates a difference signal. An adjustment circuit adjusts a transconductance gain of the RF mixer based on the difference signal.

Abstract: A system for controlling the true output power of a transmitter includes a voltage detector in communication with a power amplifier for detecting an output voltage of the power amplifier and generating a voltage signal proportional to the output voltage. A current detector in communication with the power amplifier detects an output current of the power amplifier and generates a current signal proportional to the output current. A power detector in communication with the voltage and current detectors detects a true output power delivered by the power amplifier. The power detector includes a multiplier for multiplying the current signal and the voltage signal to generate a power signal proportional to the true output power. A power controller in communication with the power detector and the power amplifier controls the power amplifier to regulate the true output power based on the power signal.

Abstract: A communication apparatus comprises accumulator logic managing reference data. First, second, and third inputs are communicatively coupled to the accumulator logic and capable of receiving first, second, and third signals respectively. The first and second signals express one of a true and a false state. The accumulator logic increments the reference data when the accumulator logic receives the third signal while the first signal expresses the true state. The accumulator logic decrements the reference data when the accumulator logic receives the third signal while the second signal expresses the true state.

Abstract: A charge pump includes first and second pairs of differential transistors. Each transistor includes control, first, and second terminals. First and second charge pump drivers communicate with the control terminal of one of the first pair of differential transistors and one of the second pair of differential transistors, respectively. Third and fourth charge pump drivers communicate with the control terminal of the other of the first pair of differential transistors and the other of the second pair of differential transistors, respectively. The first through fourth charge pump drivers include respective pairs of differential transistors that receive control signals from respective control circuits.

Abstract: A charge pump comprises a limit swing generator that receives an input signal and that generates a drive signal based on the input signal. A charge pump core includes output switches that generate a charge pump output in response to the drive signal. The drive signal includes a voltage level. The limit swing generator includes at least one voltage generator to control the voltage level of the drive signal such that the drive signal tracks a parametric variable of the output switches.

Abstract: A low noise amplifier (LNA) comprises a bias circuit having an output. A first transistor includes a control input that communicates with the bias circuit, a first terminal that generates a LNA output current and a second terminal. A device communicates with the second terminal of the first transistor, includes a variable resistor, and has a resistance that is modulated in response to an input signal to the LNA.

Abstract: A bias circuit for biasing a linear input stage of an amplifier comprises a first MOS device having a size. A second MOS device has a size and is arranged with the first MOS device in a cascode configuration. The second MOS device is operated in a saturation region. A third MOS device has a size and biases the first MOS device in a triode region. A bias switch ratio of the size of the first MOS device to the size of the third MOS device is greater than one.

Abstract: A method of amplifying an input signal comprises providing a semiconductor die, forming an LNA input stage having a transconductance, on the semiconductor die, and desensitizing the LNA input stage transconductance to variations in process and environmental conditions.

Abstract: Method and apparatus for communicating numeric data between first and second circuits incorporating a controller communicatively coupled to the first circuit to receive the numeric data, and an accumulator communicatively coupled to the second circuit and the controller, the accumulator comprising accumulator logic managing reference data, the controller being responsive to the numeric data selectively causing the accumulator logic to increment or decrement the reference data to match the numeric data. The accumulator will notify the second circuit of the so-updated reference data. In one embodiment, three signal lines (UP, DN, CLK) are used by the controller to direct the accumulator to increment, decrement, reset or hold the reference data. In another embodiment, only two signal lines are used at the expense of reset complexity.