Patents by Inventor Lee Kuan

Lee Kuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060244141
    Abstract: A package including a package substrate, a die-substrate assembly including a substrate including a plurality of layers including a layer having a mesh to stiffen the substrate adapted to mount one or more dice, one or more dice mounted on the substrate and a molding compound to attach the substrate to the package substrate. Various embodiments include a method comprising providing a substrate including a layer having an outer surface, depositing a metal layer on the outer surface, and etching the metal layer to form an opening, the opening enclosing an area on the outer surface to mount one or more dice.
    Type: Application
    Filed: July 13, 2006
    Publication date: November 2, 2006
    Inventors: Lee Kuan, Lee Chai
  • Publication number: 20060163702
    Abstract: A leadframe for semiconductor components includes leadfingers, interconnect bonding sites for wire bonding to a semiconductor die, terminal bonding sites for terminal contacts for the component in an area array, and bus bars which electrically connect selected leadfingers to one another. The interconnect bonding sites are located on the leadframe relative to the bus bars such that shorting to the bus bars by wire interconnects is eliminated.
    Type: Application
    Filed: March 27, 2006
    Publication date: July 27, 2006
    Inventors: Dalson Kim, Jeffrey Tuck Fook, Lee Kuan
  • Publication number: 20050087847
    Abstract: A semiconductor package includes a semiconductor die having a circuit side and a back side, a multi layered leadframe attached to the die, a dense array of terminal contacts in electrical communication with the die, and a plastic body encapsulating the die and the leadframe. The leadframe includes circuit side leads attached to the circuit side of the die, and back side leads located proximate to the back side of the die. Both the circuit side leads and the back side leads are wire bonded to bond pads on the die. In addition, the back side leads provide electrical paths between the bond pads and selected terminal contacts that would otherwise be inaccessible due to line/space design rules. A method for fabricating the package includes the steps of: attaching the die to the circuit side leads, attaching the back side leads to the circuit side leads, wire bonding the die to the leads, encapsulating the die, and then forming the terminal contacts.
    Type: Application
    Filed: November 29, 2004
    Publication date: April 28, 2005
    Inventors: Lee Kuan, Chong Hui, Lee Lai
  • Publication number: 20050029552
    Abstract: A package including a package substrate, a die-substrate assembly including a substrate including a plurality of layers including a layer having a mesh to stiffen the substrate adapted to mount one or more dice, one or more dice mounted on the substrate and a molding compound to attach the substrate to the package substrate.
    Type: Application
    Filed: August 31, 2004
    Publication date: February 10, 2005
    Inventors: Lee Kuan, Lee Chai
  • Publication number: 20050023651
    Abstract: A semiconductor component includes a chip on board leadframe, a semiconductor die back bonded and wire bonded to the leadframe, an encapsulant on the die and an area array of terminal contacts on the leadframe. The leadframe includes leadfingers, interconnect bonding sites for wire bonding the die, terminal bonding sites for the terminal contacts, and bus bars which electrically connect selected leadfingers to one another. The interconnect bonding sites are located on the leadframe relative to the bus bars such that shorting to the bus bars by wire interconnects is eliminated. A method for fabricating the component includes the steps of attaching the die to the leadframe, bonding the wire interconnects to the die and to the interconnect bonding sites, forming the encapsulant, and then forming the terminal contacts on the terminal bonding sites.
    Type: Application
    Filed: August 1, 2003
    Publication date: February 3, 2005
    Inventors: Dalson Kim, Jeffrey Fook, Lee Kuan
  • Publication number: 20050023654
    Abstract: A semiconductor component includes a chip on board leadframe, a semiconductor die back bonded and wire bonded to the leadframe, an encapsulant on the die and an area array of terminal contacts on the leadframe. The leadframe includes leadfingers, interconnect bonding sites for wire bonding the die, terminal bonding sites for the terminal contacts, and bus bars which electrically connect selected leadfingers to one another. The interconnect bonding sites are located on the leadframe relative to the bus bars such that shorting to the bus bars by wire interconnects is eliminated. A method for fabricating the component includes the steps of attaching the die to the leadframe, bonding the wire interconnects to the die and to the interconnect bonding sites, forming the encapsulant, and then forming the terminal contacts on the terminal bonding sites.
    Type: Application
    Filed: March 10, 2004
    Publication date: February 3, 2005
    Inventors: Dalson Seng Kim, Jeffrey Fook, Lee Kuan