Patents by Inventor Lee Seung-Ryong

Lee Seung-Ryong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100013022
    Abstract: Disclosed are a semiconductor device with dual gate dielectric layers and a method for fabricating the same. The semiconductor device includes: a silicon substrate divided into a cell region where NMOS transistors are formed and a peripheral region where NMOS and PMOS transistors are formed; a targeted silicon oxide layer formed on the silicon substrate in the cell region; an oxynitride layer formed on the silicon substrate in the peripheral region; a first gate structure formed in the cell region; a second gate structure formed on the oxynitride layer in an NMOS region of the peripheral region; and a third gate structure formed on the oxynitride layer in a PMOS region of the peripheral region.
    Type: Application
    Filed: June 15, 2009
    Publication date: January 21, 2010
    Inventors: Cho Heung-Jae, Lim Kwan-Yong, Lee Seung-Ryong