Abstract: An integrated circuit includes an input circuit coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second or a third input signal, and a level shifter circuit coupled to the input circuit and a second voltage supply, and configured to receive a first enable signal, the second or third input signal, and to generate a first signal responsive to the first enable signal, the second or third input signal. The input circuit includes a first set of transistors having a first threshold voltage. The first set of transistors includes a first set of active regions extending in a first direction. The level shifter circuit includes a second set of transistors having a second threshold voltage. The second set of transistors includes a second set of active regions extending in the first direction.

Abstract: A method and a device for detecting slot format indication, and a method and a device for configuring slot format indication are provided. The method for detecting slot format indication is applied to a terminal and includes: obtaining a bit length of SFI index information of a target cell or a target carrier and a slot format configuration set corresponding to the bit length; detecting the SFI index information of the target cell or the target carrier; and determining a slot format configuration corresponding to the detected SFI index information based on the detected SFI index information and the slot format configuration set corresponding to the bit length of the detected SFI index information.

Abstract: A display includes a polygonal display region and a plurality of non-display portions. The non-display portions are coupled to side edges of the display region in a one-to-one correspondence. At least two of the non-display portions are bent to a back side of the display region. When the non-display portions bent to the back side include adjacent non-display portions, there is an opening between two adjacent non-display portions.

Abstract: Disclosed is a spectroscopic device, system, and method for measuring the concentration of one or more molecular species of interest in a gas, liquid or solid sample, where the device may be portable, may be commercially manufactured, and/or may be adapted to existing systems and/or integrated with new systems to provide optical gas sensing for such systems. The disclosed devices, systems, and methods can be particularly useful in monitoring the purity of, e.g., a certain gas species, including determining whether a gas mixture contains certain gas species above a set concentration limit.

Abstract: A system adapted to detect rotation of at least two spray arms of a household appliance spaced along a longitudinal axis of the appliance includes a first detection magnet, a second detection magnet and a magnetic sensor. The first detection magnet is arranged on a first spray arm of the at least two spray arms. The second detection magnet is arranged on a second spray arm of the at least two spray arms. A magnetic field direction of the second detection magnet is different from a magnetic field direction of the first detection magnet. The magnetic sensor is arranged in the household appliance and is adapted to sense a motion status of the first detection magnet and the second detection magnet.

Abstract: Disclosed is a sub-Kelvin temperature zone refrigeration mechanism. The sub-Kelvin temperature zone refrigeration mechanism includes a pulse tube refrigeration unit, first pre-cooling heat exchangers, a throttling refrigeration unit, second pre-cooling heat exchangers, an adsorption refrigeration unit, a third pre-cooling heat exchanger and a dilution refrigeration unit. The pulse tube refrigeration unit includes a pulse tube refrigeration part. The throttling refrigeration unit includes a throttling refrigeration part, and the throttling refrigeration part is connected with the adsorption refrigeration unit through the second pre-cooling heat exchangers so as to pre-cool the adsorption refrigeration unit. The adsorption refrigeration unit includes an adsorption refrigeration part, and the adsorption refrigeration part is connected with the dilution refrigeration unit through the third pre-cooling heat exchanger.

Abstract: A constant current generation circuit for optocoupler isolation amplifier and a current precision adjustment method are provided. The constant current generation circuit includes a start circuit, a current generation circuit and a precision adjustment and output circuit integrated into a same substrate. The start circuit can generate and output a first start current and a second start current. The current generation circuit includes a negative temperature change rate current generation circuit connected to a first start current output and a positive temperature change rate current generation circuit connected to a second start current output. The precision adjustment and output circuit outputs constant current meeting application requirements of optocoupler isolation amplifier by adjusting proportional precision of two currents output from a current generation circuit.

Abstract: Methods and apparatus are described for mitigating intercell interference in wireless communication systems utilizing substantially the same operating frequency band across multiple neighboring coverage areas. The operating frequency band may be shared across multiple neighboring or otherwise adjacent cells, such as in a frequency reuse one configuration. The wireless communication system can synchronize one or more resource allocation regions or zones across the multiple base stations, and can coordinate a permutation type within each resource allocation zone. The base stations can coordinate a pilot configuration in each of a plurality of coordinated resource allocation regions. Subscriber stations can be assigned resources in a coordinated resource allocation region based on interference levels. A subscriber station can determine a channel estimate for each of multiple base stations in the coordinated resource allocation region to mitigate interference.

Abstract: Methods of growing large, free-standing single crystals of (FAxCs1-x)PbBr3 perovskites, where 0?x<1, in solution using tertiary or ternary alkyl ammonium salts, weak organic acids, or a combination thereof are provided. By including the additives in a crystallization solution with perovskite precursors, larger single crystals can be grown by slow evaporation or inverse temperature crystallization than would possible in the absence of the additives under the same growth conditions.

Abstract: A vibration detector includes a housing, a cover plate, a piezoelectric sensing module, and a PCBA module. The piezoelectric sensing module is arranged in the housing and generates a piezoelectric signal in response to vibration of the cover plate. The PCBA module is arranged in the housing and is electrically coupled to the piezoelectric sensing module. The PCBA module is adapted to receive the piezoelectric signal from the piezoelectric sensing module and to generate a detection signal based on the piezoelectric signal.

Abstract: A combined bio-artificial liver support system, includes branch tubes that are connected in sequence: a blood input branch tube, an upstream tail end, a first plasma separation branch tube comprising at least a first plasma separator, a non-biological purification branch tube comprising at least a plasma perfusion device and a bilirubin adsorber, a biological purification branch tube comprising at least a hepatocyte culture cartridge assembly, and a plasma return branch tube, a downstream tail end of which is set as a blood output end.

Abstract: A sensor module comprises a housing and a liquid level sensing module. The housing includes a first passage adapted to permit liquid to flow into an interior of the housing. The first passage defines an air chamber and an air passage in communication with the air chamber. The liquid level sensing module is arranged in the interior of the housing, and includes at least a first part positioned within the air passage. The liquid level sensing module is adapted to sense a characteristic indicative of a liquid level when the liquid flows into the first passage and compresses air in the air passage.

Abstract: A method of manufacturing an IC structure includes forming first through fourth PMOS transistors in an n-well, constructing a bias circuit including the first and second PMOS transistors, constructing a level shifter including the third and fourth PMOS transistors, building a first power distribution structure including electrical connections to each of the first and third PMOS transistors, and building a second power distribution structure including electrical connections to each of the second and fourth PMOS transistors.

Abstract: A circuit includes an input circuit, a level shifter circuit and an output circuit. The input circuit is coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second or a third input signal. The level shifter circuit is coupled to the input circuit and a second voltage supply, and configured to receive a first enable signal, the second or third input signal, and to generate a first signal responsive to the first enable signal, the second input signal or the third input signal. The level shifter circuit includes a header circuit coupled to a first node, and is configured to enable or disable the level shifter circuit responsive to the first enable signal. The output circuit is coupled to at least the level shifter circuit and the second voltage supply, and is configured to generate an output signal.

Abstract: An IC structure includes first and second gates, first and second source regions, a shared drain region, and an isolation region. The first gate has a first portion extending along a first direction and a second portion extending along a second direction. The second gate has a first portion extending along the first direction and a second portion extending along the second direction. The shared drain region extends from the first portion of the first gate to the first portion of the second gate. The first source region is spaced apart from the shared drain region by the first gate. The second source region is spaced apart from the shared drain region by the second gate. The isolation region is between the first portion of the first gate and the first portion of the second gate, and resembles a quadrilateral pattern bordering the shared drain region.

Abstract: An integrated circuit (IC) includes a first power supply node configured to have a first power supply voltage level, a second power supply node configured to have a second power supply voltage level separate from the first power supply voltage level, an n-well, a bias circuit, and a level shifter. The n-well contains first and second PMOS transistors including first source/drain (S/D) terminals coupled to the first power supply node, and third and fourth PMOS transistors including second S/D terminals coupled to the second power supply node. The bias circuit includes the first PMOS transistor including a third S/D terminal coupled to the n-well and a gate coupled to the second power supply node, and the third PMOS transistor including a fourth S/D terminal coupled to the n-well and a gate coupled to the first power supply node. The level shifter includes the second and fourth PMOS transistors.

Abstract: Methods, systems, and devices for external power functionality techniques for memory devices are described. A memory system, which may be coupled to a first power source associated with a first voltage, may detect whether a second power source associated with a second voltage higher than the first voltage is available. The memory device may activate a functionality to use the second power source for the access operations if the second power source is available, and the memory device may then perform one or more access operations using the second voltage from the second power source based on the activated functionality.

Abstract: An integrated circuit includes a middle active-region structure between a group-one active-region structure and a group-two active-region structure. The integrated circuit also includes a main circuit, a group-one circuit, and a group-two circuit. The main circuit includes at least one boundary gate-conductor intersecting the middle active-region structure. The group-one circuit includes a group-one isolation structure separating the group-one active-region structure into a first part in the group-one circuit and a second part in a first adjacent circuit. The group-two circuit includes a group-two isolation structure separating the group-two active-region structure into a first part in the group-two circuit and a second part in a second adjacent circuit.

Abstract: Technologies for storing streaming data include, in some embodiments, in response to determining that the chunk size satisfies a chunk size threshold and the streaming data is sequential data of a size that satisfies a threshold sequential data size, writing the sequential data to a first file system partition of a file system comprising a plurality of file system partitions, and in response to determining that the chunk size does not satisfy the chunk size threshold or the chunk size satisfies the chunk size threshold and the streaming data is the first type of metadata, writing the streaming data to a second file system partition of the plurality of file system partitions.

Abstract: A Schmitt trigger circuit includes a first and second set of transistors, a first and second feedback transistor, and a first and second circuit. The first set of transistors is connected between a first voltage supply and an output node. The first voltage supply has a first voltage. The second set of transistors is connected between the output node and a second voltage supply. The second voltage supply has a second voltage. The first feedback transistor is connected to the output node, a first node and a second node. The second feedback transistor is connected to the output node, a third node and a fourth node. The first circuit is coupled to and configured to supply the second supply voltage to the second node. The second circuit is coupled to and configured to supply the first supply voltage to the fourth node.