Abstract: An integrated circuit includes a first region including a first set of transistors that include a first set of active regions having a first threshold voltage, the first set of transistors in a first portion of a level shifter circuit, the first portion of the level shifter circuit being coupled to a first voltage supply. The integrated circuit further includes a second region adjacent to the first region. The second region includes a second set of transistors that include a second set of active regions having a second threshold voltage different from the first threshold voltage, and the second set of transistors being in a second portion of the level shifter circuit.

Abstract: A connector terminal includes a terminal body and an electroplated component. The electroplated component includes a substrate layer and an electroplating layer. The substrate layer has a first and second surface opposite to each other in its thickness direction, wherein the first surface of the substrate layer is attached to a local area of the terminal body. The electroplating layer which formed on the second surface of the substrate layer for electrical contact with a mating terminal.

Abstract: A terminal includes a horizontal plate having a first side and a second side opposite to each other in a first horizontal direction, a first elastic arm, and a second elastic arm. A first end of the first elastic arm is connected to a first side edge of the horizontal plate and a second end of the first elastic arm is fixed to a circuit board. A first end of the second elastic arm is connected to a second side edge of the horizontal plate and a second end of the second elastic arm is fixed to the circuit board. The first elastic arm and the second elastic arm grip a mating plug inserted between them to make electrical contact with the mating plug. The horizontal plate is suspended above the circuit board by the first elastic arm and the second elastic arm.

Abstract: An integrated circuit includes first to second transistors and a resistive device. The first transistor is coupled between a pad and a first voltage terminal that provides a first supply voltage. The second transistor is coupled in parallel with the first transistor. A breakdown voltage of the first transistor is different from a trigger voltage of the second transistor. The resistive device is coupled between the pad and a second voltage terminal that provides a second supply voltage higher than the first supply voltage, and operates with the second supply voltage in an electrostatic discharge (ESD) event when the first and second transistors discharge a ESD current between the pad and the first voltage terminal.

Abstract: A Schmitt trigger circuit includes a first and second set of transistors, a first and second feedback transistor, and a first and second circuit. The first set of transistors is connected between a first voltage supply and an output node. The first voltage supply has a first voltage. The second set of transistors is connected between the output node and a second voltage supply. The second voltage supply has a second voltage. The first feedback transistor is connected to the output node, a first node and a second node. The second feedback transistor is connected to the output node, a third node and a fourth node. The first circuit is coupled to and configured to supply the second supply voltage to the second node. The second circuit is coupled to and configured to supply the first supply voltage to the fourth node.

Abstract: A welding system (1) comprising a main module (2) equipped with an external casing (3) in which an inlet port (4) for the connection to an external electric power source, an electric generator (5) configured to adapt the electrical characteristics of the electric power received at the inlet to a first type of welding, an outlet port (6) for the connection by means of an electric conductor (10) to a welding torch (20) and an electronic control unit (7) configured to control the functionality of the electric generator (5) are identified. The welding system also comprises a welding torch (20) configured to be connected by means of the electrical conductor (10) to the outlet port (6).

Abstract: In a method of operating a circuit, at a beginning of a first edge of a driving signal, a first transistor is turned ON to pull, at a first changing rate, a voltage of the driving signal on the first edge from a first voltage toward a second voltage. Then, in response to the voltage of the driving signal on the first edge reaching a threshold voltage between the first voltage and the second voltage, the first transistor is turned OFF and an output circuit is caused to start a second edge of an output signal in response to the first edge of the driving signal. The second edge has a slew rate corresponding to a second changing rate of the voltage of the driving signal on the first edge from the threshold voltage toward the second voltage. The second changing rate is controlled by a passive circuit and is smaller than the first changing rate.

Abstract: Methods, systems, and devices for data handling during a reflow operation are described. The method may include a memory system receiving first signaling indicating that a reflow operation is to be performed on the memory system and determining whether an amount of data stored in a first set of memory cells within one or more memory devices of the memory system satisfy a threshold. The method may further include the memory system communicating an indication of whether the memory system is ready for the reflow operation based on the amount of data satisfying the threshold.

Abstract: Disclosed herein are charge or electricity generating devices and methods of making and use thereof.

Abstract: An enterprise knowledge retention and access system is disclosed. In various embodiments, data comprising a plurality of content items associated specifically with a user is stored. Generative artificial intelligence techniques are used to generate, based at least in part on the plurality of content items associated specifically with the user, a generated content reflecting information derived from the plurality of content items with respect to a specific subject.

Abstract: An integrated circuit includes an input circuit coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second or a third input signal, and a level shifter circuit coupled to the input circuit and a second voltage supply, and configured to receive a first enable signal, the second or third input signal, and to generate a first signal responsive to the first enable signal, the second or third input signal. The input circuit includes a first set of transistors having a first threshold voltage. The first set of transistors includes a first set of active regions extending in a first direction. The level shifter circuit includes a second set of transistors having a second threshold voltage. The second set of transistors includes a second set of active regions extending in the first direction.

Abstract: An intelligent anti-icing material and a preparation method and use thereof are disclosed. The intelligent anti-icing material includes a hydrophobic resin and a nickel-titanium alloy wire embedded in the hydrophobic resin. When the surrounding temperature decreases, the hydrophobic resin in the intelligent anti-icing material shrinks, and the nickel-titanium alloy wire featured by thermoelastic martensitic transformation undergoes phase transformation and expands, which changes the direction of the expansion force inside the ice layer, and thus tiny cracks occur at the interface between the ice layer and the surface of the material, thereby reducing the adhesion of the ice layer to the surface of the material, accelerating the spontaneous shedding of the ice layer, without heating, and achieving an excellent anti-icing effect.

Abstract: An integrated circuit includes first to second transistors and a resistive device. The first transistor is coupled between a pad and a first voltage terminal that provides a first supply voltage. The second transistor is coupled in parallel with the first transistor. A breakdown voltage of the first transistor is different from a trigger voltage of the second transistor. The resistive device is coupled between the pad and a second voltage terminal that provides a second supply voltage higher than the first supply voltage, and operates with the second supply voltage in an electrostatic discharge (ESD) event when the first and second transistors discharge a ESD current between the pad and the first voltage terminal.

Abstract: An integrated circuit is provided and includes a first active region of a first conductivity type coupled to a first voltage terminal and corresponding to a first terminal of a first transistor and a first terminal of a second transistor included in an inverter of a level shifter circuit, wherein the first transistor is configured to discharge electrostatic charges to the first voltage terminal; and second and third active regions, corresponding to a third transistor, of a second conductivity type different from the first conductivity type, wherein the second active region is coupled to a second voltage terminal, and the third active region is coupled to a first terminal, different from the second voltage terminal, of the level shifter circuit. The third transistor is configured to transmit a first supply voltage from the second voltage terminal for the integrated circuit.

Abstract: A method of generating an integrated circuit (IC) layout diagram includes defining first through fourth PMOS transistors in an n-well region, arranging a plurality of conductive regions whereby a bias circuit is configured to include the first and second PMOS transistors and a level shifter is configured to include the third and fourth PMOS transistors, and arranging a plurality of conductive elements whereby a first power domain includes electrical connections to each of the first and third PMOS transistors and a second power domain includes electrical connections to each of the second and fourth PMOS transistors.

Abstract: The present application relates to a welding system comprising a main module provided with an outer casing identifying an input port for the connection to a source of external electrical power, an electric generator configured to adapt the electrical characteristics of said electrical power to a first type of welding, at least an output port for the connection to a welding torch, an electronic control unit configured to control the functionality of said electric generator. Said main module comprises a mechanical and electrical connection unit of a first type, said welding system comprising at least an auxiliary module provided with an outer casing identifying an electric generator configured to adapt the electrical characteristics of an electrical power to a second type of welding, at least a mechanical and electrical connection unit of a second type couplable to said mechanical and electrical connection unit of a first type.

Abstract: In a method of operating a circuit, at a beginning of a first edge of a driving signal, a first transistor is turned ON to pull, at a first changing rate, a voltage of the driving signal on the first edge from a first voltage toward a second voltage. Then, in response to the voltage of the driving signal on the first edge reaching a threshold voltage between the first voltage and the second voltage, the first transistor is turned OFF and an output circuit is caused to start a second edge of an output signal in response to the first edge of the driving signal. The second edge has a slew rate corresponding to a second changing rate of the voltage of the driving signal on the first edge from the threshold voltage toward the second voltage. The second changing rate is smaller than the first changing rate.

Abstract: A method of manufacturing an IC structure includes forming first through fourth PMOS transistors in an n-well, constructing a bias circuit including the first and second PMOS transistors, constructing a level shifter including the third and fourth PMOS transistors, building a first power distribution structure including electrical connections to each of the first and third PMOS transistors, and building a second power distribution structure including electrical connections to each of the second and fourth PMOS transistors.

Abstract: An integrated circuit (IC) device includes a first die, and a second die coupled to the first die through an input/output (I/O) terminal. The first die includes a first antenna effect protection circuit electrically coupled to the I/O terminal. The first antenna effect protection circuit includes at least one first transistor of a first type, and at least one second transistor of a second type different from the first type. A gate terminal, a first terminal and a second terminal of each of the at least one first transistor and the at least one second transistor are electrically coupled together, and to the I/O terminal.

Abstract: Exemplary methods, apparatuses, and systems include a performance mode manager for controlling performance of a wireless update by selecting a performance mode using rations of allocation. The performance mode manager receives a request to initialize a file transfer from a host using wireless communication. In response to the request, the performance mode manager identifies a size of the file transfer by the memory subsystem. The performance mode manager selects a performance mode from a plurality of performance modes and allocates the available set of memory pages using the performance mode. The performance mode manager receives a file of the file transfer. The performance mode manager programs a first portion of the file at the default bit density to the first portion of memory and a second portion of the file at the reduced bit density to the second portion of memory.