Patents by Inventor Leland Szewerenko
Leland Szewerenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8341311Abstract: A flash memory system having the capability of streaming data directly from flash memory to the interface of a host computer in order to substantially reduce latency of to-host transfers, while also maintaining the capabilities for caching and overlapped flash I/O provided by RAM DMA transfers. When data is read from the flash memory, the data is transferred into the RAM buffer and at the option of the memory controller, directly (via an intermediate FIFO) to the host interface. This results in a desirable reduction in the latency of data transfer because as soon as the first byte of data is read from the flash memory by the DMA engine, the data will be transferred directly to the host interface. Because the data is also being transferred to the buffer RAM, preferred embodiments of the present invention still provide the advantages of using an intermediate transfer buffer.Type: GrantFiled: November 18, 2009Date of Patent: December 25, 2012Assignee: Entorian Technologies, IncInventors: Leland Szewerenko, Thomas Branca
-
Patent number: 7804985Abstract: Impact resistant circuit modules are disclosed for enclosing a die having a sensor area. Preferred modules include a flexible circuit and a die coupled thereto. The flexible circuit is preferably folded over compressible material to help absorb applied forces. A gap may be provided between sides of the die and the compressible material to help prevent peeling. A metal reinforcing layer may be bonded to the back of the die. A low modulus material including a patterned gap underneath the die may be used to absorb forces. A dry film adhesive may be placed between at least part of the upper surface of the die and the flexible circuit, preferably to provide further point impact resistance and protection. High and low modulus material may be combined in ruggedizing structures. Consumer devices employing such circuit modules are also taught, as well as module construction methods.Type: GrantFiled: August 25, 2008Date of Patent: September 28, 2010Assignee: Entorian Technologies LPInventors: Leland Szewerenko, Julian Partridge, Ron Orris
-
Patent number: 7759791Abstract: A system and method for assembling dual-die integrated circuit packages using thermocompression bonding or thermosonic bonding to bond a second die to a substrate opposite a first die bonded to the substrate. The second die is bonded using heat conducted through the first die to the substrate, and optionally through an underfill material. The first and second die are connected such that bumps are connected to common bonding pads on the substrate. Bumps on one of the die extend through openings in the substrate to connect to the common bonding pads. The bonding pads are within the perimeter of the first die.Type: GrantFiled: April 20, 2007Date of Patent: July 20, 2010Assignee: Entorian Technologies LPInventors: Julian Partridge, Leland Szewerenko, James Douglas Wehrly, Jr.
-
Publication number: 20090309214Abstract: Turbulence inducers are provided on circuit modules. Rising above a substrate or heat spreader surface, turbulence generators may be added to existing modules or integrated into substrates or heat spreaders employed by circuit modules constructed according to traditional or new technologies.Type: ApplicationFiled: August 24, 2009Publication date: December 17, 2009Inventors: Leland Szewerenko, Julian Partridge, Wayne Lieberman, Paul Goodwin
-
Publication number: 20090294948Abstract: The present description provides increased contrast between interposer and leads in a stack embodiment that employs an interposer that extends beyond a boundary or perimeter established by the leads of the constituent IC devices.Type: ApplicationFiled: August 10, 2009Publication date: December 3, 2009Inventors: Julian Partridge, Roel Perez, Leland Szewerenko
-
Publication number: 20090294946Abstract: The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices. In preferred embodiments, the plastic body of one or more leaded packaged ICs bear conductive traces that create circuitry to provide stacking related electrical interconnections between the constituent ICs of a stacked module without the use of separate interposers or carrier structures. Typically, the circuitry is borne by the body of the upper one of the ICs of a two-IC leaded package stack to implement stacking-related connections between the constituent ICs.Type: ApplicationFiled: May 7, 2009Publication date: December 3, 2009Inventors: Leland Szewerenko, James Douglas Wehrly, JR.
-
Patent number: 7579687Abstract: Turbulence inducers are provided on circuit modules. Rising above a substrate or heat spreader surface, turbulence generators may be added to existing modules or integrated into substrates or heat spreaders employed by circuit modules constructed according to traditional or new technologies.Type: GrantFiled: January 13, 2006Date of Patent: August 25, 2009Assignee: Entorian Technologies, LPInventors: Leland Szewerenko, Julian Partridge, Wayne Lieberman, Paul Goodwin
-
Patent number: 7573129Abstract: The present description provides increased contrast between interposer and leads in a stack embodiment that employs an interposer that extends beyond a boundary or perimeter established by the leads of the constituent IC devices.Type: GrantFiled: September 20, 2006Date of Patent: August 11, 2009Assignee: Entorian Technologies, LPInventors: Julian Partridge, Roel Perez, Leland Szewerenko
-
Publication number: 20090160042Abstract: A system and method for combining a leaded package IC and a semiconductor die using a flex circuitry. The leaded packaged IC is disposed along an obverse side of a flex circuit. In a preferred embodiment, the lower surface of the body of the leaded packaged IC contacts the surface of the flex circuitry. The semiconductor die is disposed beneath the leaded package IC and, in preferred embodiments, disposed in a window that passes through at least a part of the flex circuitry and is attached to a conductive layer of the flex circuitry. In other embodiments, the semiconductor die is attached to the body of the leaded packaged IC. The flex circuitry preferably employs at least two conductive layers and, in preferred embodiments, the leaded packaged IC is connected to the flex circuitry at one layer while the semiconductor die is connected to the flex circuitry at the other conductive layer.Type: ApplicationFiled: March 2, 2009Publication date: June 25, 2009Inventors: James Douglas Wehrly, JR., Leland Szewerenko, David L. Roper
-
Patent number: 7508069Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.Type: GrantFiled: May 18, 2006Date of Patent: March 24, 2009Assignee: Entorian Technologies, LPInventors: James Douglas Wehrly, Jr., Ron Orris, Leland Szewerenko, Tim Roy, Julian Partridge, David L. Roper
-
Patent number: 7468553Abstract: The present invention provides a system and method for devising stackable assemblies that may be then stacked to create a stacked circuit module. One or more integrated circuit (IC) die are disposed on one or more sides of a redistribution substrate that is preferably flexible circuitry. In some preferred embodiments, the die and redistribution substrate are bonded together and wire-bond connected. Two or more stackable assemblies are interconnected through frame members to create low profile high density stacked circuit modules.Type: GrantFiled: March 6, 2007Date of Patent: December 23, 2008Assignee: Entorian Technologies, LPInventors: Leland Szewerenko, Paul Goodwin, James Douglas Wehrly, Jr.
-
Publication number: 20080308924Abstract: Impact resistant circuit modules are disclosed for enclosing a die having a sensor area. Preferred modules include a flexible circuit and a die coupled thereto. The flexible circuit is preferably folded over compressible material to help absorb applied forces. A gap may be provided between sides of the die and the compressible material to help prevent peeling. A metal reinforcing layer may be bonded to the back of the die. A low modulus material including a patterned gap underneath the die may be used to absorb forces. A dry film adhesive may be placed between at least part of the upper surface of the die and the flexible circuit, preferably to provide further point impact resistance and protection. High and low modulus material may be combined in ruggedizing structures. Consumer devices employing such circuit modules are also taught, as well as module construction methods.Type: ApplicationFiled: August 25, 2008Publication date: December 18, 2008Inventors: Leland Szewerenko, Julian Partridge, Ron Orris
-
Publication number: 20080246134Abstract: The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices. In preferred embodiments, the plastic body of one or more leaded packaged ICs bear conductive traces that create circuitry to provide stacking related electrical interconnections between the constituent ICs of a stacked module without the use of separate interposers or carrier structures. Typically, the circuitry is borne by the body of the upper one of the ICs of a two-IC leaded package stack to implement stacking-related connections between the constituent ICs.Type: ApplicationFiled: April 3, 2007Publication date: October 9, 2008Applicant: STAKTEK GROUP L.P.Inventors: Leland Szewerenko, James Douglas Wehrly
-
Publication number: 20080222365Abstract: A managed memory system is provided. More specifically, in one embodiment, there is provided a system including a memory device and a switch coupled to the memory device. The switch has at least a first switch position and a second switch position. The system also includes a memory controller coupled to the first switch position and a processor interface coupled to the second switch position.Type: ApplicationFiled: March 8, 2007Publication date: September 11, 2008Applicant: STAKTEK GROUP L.P.Inventors: Leland Szewerenko, Bert Haskell
-
Patent number: 7417310Abstract: Impact resistant circuit modules are disclosed for enclosing a die having a sensor area. Preferred modules include a flexible circuit and a die coupled thereto. The flexible circuit is preferably folded over compressible material to help absorb applied forces. A gap may be provided between sides of the die and the compressible material to help prevent peeling. A metal reinforcing layer may be bonded to the back of the die. A low modulus material including a patterned gap underneath the die may be used to absorb forces. A dry film adhesive may be placed between at least part of the upper surface of the die and the flexible circuit, preferably to provide further point impact resistance and protection. High and low modulus material may be combined in ruggedizing structures. Consumer devices employing such circuit modules are also taught, as well as module construction methods.Type: GrantFiled: November 2, 2006Date of Patent: August 26, 2008Assignee: Entorian Technologies, LPInventors: Leland Szewerenko, Julian Partridge, Ron Orris
-
Publication number: 20080122054Abstract: Impact resistant circuit modules are disclosed for enclosing a die having a sensor area. Preferred modules include a flexible circuit and a die coupled thereto. The flexible circuit is preferably folded over compressible material to help absorb applied forces. A gap may be provided between sides of the die and the compressible material to help prevent peeling A metal reinforcing layer may be bonded to the back of the die. A low modulus material including a patterned gap underneath the die may be used to absorb forces. A dry film adhesive may be placed between at least part of the upper surface of the die and the flexible circuit, preferably to provide further point impact resistance and protection. High and low modulus material may be combined in ruggedizing structures. Consumer devices employing such circuit modules are also taught, as well as module construction methods.Type: ApplicationFiled: November 2, 2006Publication date: May 29, 2008Inventors: Leland Szewerenko, Julian Partridge, Ron Orris
-
Publication number: 20080093734Abstract: A system a method for assembling dual-die integrated circuit packages using thermocompression bonding or thermosonic bonding to bond a second die to a substrate opposite a first die bonded to the substrate. The second die is bonded using heat conducted through the first die to the substrate, and optionally through an underfill material. The first and second die are connected such that bumps are connected to common bonding pads on the substrate. Bumps on one of the die extend through openings in the substrate to connect to the common bonding pads. The bonding pads are within the perimeter of the first die.Type: ApplicationFiled: April 20, 2007Publication date: April 24, 2008Applicant: STAKTEK GROUP L.P.Inventors: Julian Partridge, Leland Szewerenko, James Douglas Wehrly
-
Publication number: 20080093724Abstract: The present invention provides a system and method for devising stackable assemblies that may be then stacked to create a stacked circuit module. One or more integrated circuit (IC) die are disposed on one or more sides of a redistribution substrate that is preferably flexible circuitry. In some preferred embodiments, the die and redistribution substrate are bonded together and wire-bond connected. Two or more stackable assemblies are interconnected through frame members to create low profile high density stacked circuit modules.Type: ApplicationFiled: March 6, 2007Publication date: April 24, 2008Applicant: STAKTEK GROUP L.P.Inventors: Leland Szewerenko, Paul Goodwin, James Douglas Wehrly
-
Publication number: 20080062652Abstract: A circuit module is provided that includes a system for reducing thermal variation and cooling the circuit module. The module includes a thermally-conductive rigid substrate having first and second lateral sides and an edge. Flex circuitry populated with a plurality of ICs and exhibiting a connective facility that comprises plural contacts for use with an edge connector is wrapped about the edge of the thermally-conductive substrate. Heat from the plurality of ICs is thermally-conducted by the thermally-conductive substrate. The module also includes one or more heat pipes. Each heat pipe is sealed water-tight and includes a wick and a vaporizable fluid.Type: ApplicationFiled: September 7, 2006Publication date: March 13, 2008Inventors: Wayne Lieberman, Leland Szewerenko
-
Publication number: 20070290314Abstract: The present description provides increased contrast between interposer and leads in a stack embodiment that employs an interposer that extends beyond a boundary or perimeter established by the leads of the constituent IC devices.Type: ApplicationFiled: September 20, 2006Publication date: December 20, 2007Inventors: Julian Partridge, Roel Perez, Leland Szewerenko