Abstract: A semiconductor device (10) has a decoupling capacitor (55) which is formed of a ground paddle (37), a dielectric element (57), and a power paddle (23). The power paddle is formed as a conductive element of a first TAB leadframe (12) and is contiguous with power leads (19). The first TAB leadframe also includes signal leads (16). The ground paddle is formed as a conductive element of a second TAB leadframe (14) and is contiguous with ground leads (36). The two leadframes are superimposed with one another to form the decoupling capacitor and to intersperse the ground leads with the power and signal leads. In one embodiment of the invention, power paddle (23) is raised above the leads to accommodate the dielectric element. The invention permits all power and all ground leads to be electrically coupled to the decoupling capacitor while keeping the decoupling capacitor very close to a semiconductor die (38).

Abstract: A semiconductor device (20) has reduced die stress by incorporating a lid (30) which constrains the expansion and contraction of an encapsulant. In one embodiment, a semiconductor die (22) having an active surface (23) is coupled to a plurality of leads (24). An encapsulant (28) is disposed on the active surface. The lid (30) overlies the active surface (23) and is adhesively coupled to the semiconductor die (22) by the encapsulant (28). The lid is of a material which has a coefficient of thermal expansion which closely approximates that of the semiconductor die in order to prevent stress build-up in the die which is normally caused by higher rates of expansion and contraction of the encapsulant in comparison to the those of the semiconductor die.

Abstract: A test probe for testing electronic circuits is provided with a flexible conductive pad disposed at the end of the test probe. The flexible conductive pad is resilient so that when it makes physical and electrical contact with an electronic circuit, it compresses and does not damage either the electrical circuit or the probe itself.

Abstract: A heat sink apparatus for convective cooling of circuit packages or components by direct impinging fluid operation employing a housing having an inlet port and a plurality of radially fluid flow passages communicating with the inlet port with each passage also having an outlet port. A fluid deflection member is supported with the housing in line with the inlet port and is provided with a deflection surface adapted to redirect the fluid flow from the inlet port to the air flow passages.

Abstract: A high density multi-level printed wiring board having inter-level electrical connections made by via interconnect holes which are drilled or punched through only those layers of the wiring board that separate the two layers containing the conductors which are to be connected and said holes being filled with a low-resistance silver-filled conductive epoxy.

Abstract: A first plurality of contacts are disposed on a first surface of a flexible tape in a pattern matching the pattern of the contacts of a semiconductor die. A second plurality of contacts are disposed on a second surface of the flexible tape in a pattern matching the pattern of the contacts of a substrate. The first and second plurality of contacts are then coupled by conductive lines disposed on the surfaces of the flexible tape and extending through the conductive tape.

Abstract: A heat sink apparatus for convective cooling of circuit packages or components by direct impinging fluid operation employing a housing having an inlet port and a plurality of radially fluid flow passages communicating with the inlet port with each passage also having an outlet port. A fluid deflection member is supported with the housing in line with the inlet port and is provided with a deflection surface adapted to redirect the fluid flow from the inlet port to the air flow passages.

Abstract: A high density multi-level printed wiring board having inter-level electrical connections made by via interconnect holes which are drilled or punched through only those layers of the wiring board that separate the two layers containing the conductors which are to be connected and said holes being filled with a low-resistance silver-filled conductive epoxy.

Abstract: A multifaceted package is disclosed that permits VLSI and VHSIC integrated circuits in the form of integrated circuit die or chip carries to be mounted on the faces of the package to form a high-density circuit package. The package comprises a plurality of ceramic layers which are cofired and fused together to form a monolithic body having a plurality of planar faces. The body may have a cubic, pyramidal, pentagonal, or other solid geometric form and may have integrated circuit elements disposed on one or more faces of the body. Integrated circuit die or dies discrete electrical components such as chip carriers, resistors, etc. may be mounted to faces of the body and a lid may be provided for hermetic encapsulation of integrated circuit die between lids and respective faces of the body.