Abstract: Electronic device, comprising: a semiconductor body having a surface; a body region in the semiconductor body, extending along a main direction parallel to the surface of the semiconductor body; and a source region in the body region, extending along the main direction. The electronic device has, at the body and source regions, a first and a second electrical contact region alternating with each other along the main direction, wherein the first electrical contact region exposes the body region, and the second electrical contact region exposes the source region. The electronic device further comprises an electrical connection layer extending with electrical continuity longitudinally to the body and source regions, in electrical connection with the first and the second electrical contact regions.

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Abstract: A diode is integrated on a semiconductor chip having anode and cathode surfaces opposite to each other. The diode comprises a cathode region extending inwardly from the cathode surface, a drift region extending between the anode surface and the cathode region, and a plurality of anode regions extending from the anode surface in the drift region. The diode further comprises a cathode electrode coupled with the cathode region, and an anode electrode that contacts one or more contacted anode regions of said anode regions and is electrically insulated from one or more floating anode regions of the anode regions. The diode is configured so that charge carriers are injected from the floating anode regions into the drift region in response to applying of a control voltage exceeding a threshold voltage.

Abstract: A power device integrated on a semiconductor substrate and having a plurality of conductive bridges within a trench gate structure. In an embodiment, a semiconductor substrate includes a trench having sidewalls and a bottom, the walls and bottom are covered with a first insulating coating layer which then also includes a conductive gate structure. An embodiment provides the formation of the conductive gate structure with covering at least the sidewalls with a second conductive coating layer of a first conductive material. This results in a conductive central region of a second conductive material having a different resistivity than the first conductive material forming a plurality of conductive bridges between said second conductive coating layer and said conductive central region.

Abstract: An integrated device has: a structural layer of semiconductor material doped with a first conductivity type and having a top surface defining a plane; a functional region, doped with a second conductivity type, arranged in an active area of the structural layer at the top surface, in the proximity of an edge area of the integrated device, which externally surrounds the active area; and an edge termination region, doped with the second conductivity type, joined to the functional region and arranged in the edge area. The edge termination region has a doping profile and a junction depth that vary in a first direction parallel to the plane.

Abstract: A device includes an epitaxial region extending into a front surface of a chip. A portion of the chip adjacent the epitaxial region defines a collector. A gate is provided in a trench extending into the epitaxial region from the front surface. An emitter includes a body extending into the epitaxial region at a first side of the trench and a source extending into the body region from the front surface at the trench. A dummy emitter extends into the epitaxial region from the front surface at a second side of the trench opposite said first side. The dummy emitter lacks the source. The gate extends along a first wall of the trench facing the emitter region. A dummy gate is formed in the trench in a manner electrically isolated from the gate and extending along a second wall of the trench opposite said first wall.

Abstract: A diode is integrated on a semiconductor chip having anode and cathode surfaces opposite to each other. The diode comprises a cathode region extending inwardly from the cathode surface, a drift region extending between the anode surface and the cathode region, and a plurality of anode regions extending from the anode surface in the drift region. The diode further comprises a cathode electrode coupled with the cathode region, and an anode electrode that contacts one or more contacted anode regions of said anode regions and is electrically insulated from one or more floating anode regions of the anode regions. The diode is configured so that charge carriers are injected from the floating anode regions into the drift region in response to applying of a control voltage exceeding a threshold voltage.

Abstract: A device includes an epitaxial region extending into a front surface of a chip. A portion of the chip adjacent the epitaxial region defines a collector. A gate is provided in a trench extending into the epitaxial region from the front surface. An emitter includes a body extending into the epitaxial region at a first side of the trench and a source extending into the body region from the front surface at the trench. A dummy emitter extends into the epitaxial region from the front surface at a second side of the trench opposite said first side. The dummy emitter lacks the source. The gate extends along a first wall of the trench facing the emitter region. A dummy gate is formed in the trench in a manner electrically isolated from the gate and extending along a second wall of the trench opposite said first wall.

Abstract: A device includes an epitaxial region extending into a front surface of a chip. A portion of the chip adjacent the epitaxial region defines a collector. A gate is provided in a trench extending into the epitaxial region from the front surface. An emitter includes a body extending into the epitaxial region at a first side of the trench and a source extending into the body region from the front surface at the trench. A dummy emitter extends into the epitaxial region from the front surface at a second side of the trench opposite said first side. The dummy emitter lacks the source. The gate extends along a first wall of the trench facing the emitter region. A dummy gate is formed in the trench in a manner electrically isolated from the gate and extending along a second wall of the trench opposite said first wall.

Abstract: A diode is integrated on a semiconductor chip having anode and cathode surfaces opposite to each other. The diode comprises a cathode region extending inwardly from the cathode surface, a drift region extending between the anode surface and the cathode region, and a plurality of anode regions extending from the anode surface in the drift region. The diode further comprises a cathode electrode coupled with the cathode region, and an anode electrode that contacts one or more contacted anode regions of said anode regions and is electrically insulated from one or more floating anode regions of the anode regions. The diode is configured so that charge carriers are injected from the floating anode regions into the drift region in response to applying of a control voltage exceeding a threshold voltage.

Abstract: An integrated device has: a structural layer of semiconductor material doped with a first conductivity type and having a top surface defining a plane; a functional region, doped with a second conductivity type, arranged in an active area of the structural layer at the top surface, in the proximity of an edge area of the integrated device, which externally surrounds the active area; and an edge termination region, doped with the second conductivity type, joined to the functional region and arranged in the edge area. The edge termination region has a doping profile and a junction depth that vary in a first direction parallel to the plane.

Abstract: A diode is integrated on a semiconductor chip having anode and cathode surfaces opposite to each other. The diode comprises a cathode region extending inwardly from the cathode surface, a drift region extending between the anode surface and the cathode region, and a plurality of anode regions extending from the anode surface in the drift region. The diode further comprises a cathode electrode coupled with the cathode region, and an anode electrode that contacts one or more contacted anode regions of said anode regions and is electrically insulated from one or more floating anode regions of the anode regions. The diode is configured so that charge carriers are injected from the floating anode regions into the drift region in response to applying of a control voltage exceeding a threshold voltage.

Abstract: A device includes an epitaxial region extending into a front surface of a chip. A portion of the chip adjacent the epitaxial region defines a collector. A gate is provided in a trench extending into the epitaxial region from the front surface. An emitter includes a body extending into the epitaxial region at a first side of the trench and a source extending into the body region from the front surface at the trench. A dummy emitter extends into the epitaxial region from the front surface at a second side of the trench opposite said first side. The dummy emitter lacks the source. The gate extends along a first wall of the trench facing the emitter region. A dummy gate is formed in the trench in a manner electrically isolated from the gate and extending along a second wall of the trench opposite said first wall.

Abstract: An embodiment of a method for manufacturing a power device being integrated on a semiconductor substrate comprising at least the steps of making, in the semiconductor substrate, at least a trench having sidewalls and a bottom, covering the sidewalls and the bottom of said at least one trench with a first insulating coating layer and making, inside said at least one trench, a conductive gate structure. An embodiment of the method provides the formation of the conductive gate structure comprising the steps of covering at least the sidewalls with a second conductive coating layer of a first conductive material; making a conductive central region of a second conductive material having a different resistivity than the first conductive material; and making a plurality of conductive bridges between said second conductive coating layer and said conductive central region.

Abstract: A power device integrated on a semiconductor substrate and having a plurality of conductive bridges within a trench gate structure. In an embodiment, a semiconductor substrate includes a trench having sidewalls and a bottom, the walls and bottom are covered with a first insulating coating layer which then also includes a conductive gate structure. An embodiment provides the formation of the conductive gate structure with covering at least the sidewalls with a second conductive coating layer of a first conductive material. This results in a conductive central region of a second conductive material having a different resistivity than the first conductive material forming a plurality of conductive bridges between said second conductive coating layer and said conductive central region.