Patents by Inventor Leonel Ernesto Enriquez

Leonel Ernesto Enriquez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7260103
    Abstract: A mode-dependent, battery-coupling switch for a subscriber line interface circuit (SLIC) selectively adjusts its current requirements to provide optimal current handling capability irrespective of the mode of operation of the SLIC. Where current demands of the SLIC are relatively minimal (e.g., on-hook idle mode), the bias is set at a relatively small, default value. During high current demand, such as ringing and off-hook signaling, the bias is set at a relatively large value, to maintain a low voltage drop across the battery-coupling switch.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: August 21, 2007
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood
  • Patent number: 7260214
    Abstract: A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: August 21, 2007
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood, Edward A. Berrios
  • Patent number: 7206405
    Abstract: A subscriber line interface circuit contains a high voltage analog section, and a low voltage and digital signal processing section, that monitors and controls the high voltage analog section. The high voltage analog section includes a dual mode tip/ring amplifier unit coupled to a subscriber loop pair, and an input signal receiving unit, that conditions input voice and low voltage signaling and ringing signals from the mixed signal section. Attributes of and/or enhancements to the high voltage section are used to improve the operational performance of the subscriber line interface circuit, in particular, low noise, low power, wide-bandwidth and wide dynamic range characteristics.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: April 17, 2007
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas L. Youngblood
  • Patent number: 7130414
    Abstract: A voltage regulator circuit arrangement limits the DC voltage applied to a tip and ring amplifiers of a subscriber line interface circuit (SLIC), each of which has a first polarity input coupled to a first current flow path to which a DC input (battery) voltage is coupled. A first current source supplies a first current derived via a low pass filter path from that flowing through the first current flow path to a second polarity input node of the tip amplifier, while a second current source supplies a similarly low pass filter path-derived second current to a second polarity input node of the ring amplifier. A voltage regulator is coupled with the first current flow path and is operative to regulate the voltage at the first polarity inputs of the tip and ring amplifiers to a regulated voltage value Vreg, so that the magnitudes of the first and second currents are based upon the regulated voltage value Vreg.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: October 31, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood
  • Patent number: 7050577
    Abstract: A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: May 23, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood, Edward A. Berrios
  • Patent number: 7003103
    Abstract: A mode-dependent, battery-coupling switch for a subscriber line interface circuit (SLIC) selectively adjusts its current requirements to provide optimal current handling capability irrespective of the mode of operation of the SLIC. Where current demands of the SLIC are relatively minimal (e.g., on-hook idle mode), the bias is set at a relatively small, default value. During high current demand, such as ringing and off-hook signaling, the bias is set at a relatively large value, to maintain a low voltage drop across the battery-coupling switch.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: February 21, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood
  • Patent number: 6873703
    Abstract: A transmission channel for a subscriber line interface circuit comprises a front end, tip/ring current-sensing transimpedance stage, containing relatively low valued tip and ring sense resistors coupled in circuit with tip and ring paths of a telecommunication wireline pair. The front end transimpedance stage transforms differential tip and ring input currents sensed by the tip and ring sense resistors into a single ended voltage, which is coupled to a transconductance amplifier filter/gain stage. The filter/gain stage is configured to provide a programmable output impedance, and converts the voltage from the current-sensing transimpedance stage into an output transmission voltage for application to a selected one of a current-sense, voltage-feed, or voltage-sense, voltage-feed telecommunication circuit.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: March 29, 2005
    Assignee: Intersil Corporation
    Inventor: Leonel Ernesto Enriquez
  • Patent number: 6862352
    Abstract: A controllably switched arrangement selectively couples multiple circuit functions, such as reverse polarity detection, ring-trip and line voltage measurement, of a telecommunication card to the same external programming component (e.g., capacitor) on an as needed basis, by means of associated coupling circuits and a controlled switching circuit. The coupling circuits are controllably enabled/disabled in association with the particular circuit function required, while the controlled switching circuit selectively connects each coupling circuit with the external component. Through combined control of the coupling circuits and the switching circuit, respectively different circuit functions can be implemented with the same external component.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: March 1, 2005
    Assignee: Intersil Corporation
    Inventor: Leonel Ernesto Enriquez
  • Patent number: 6829354
    Abstract: A subscriber line interface circuit (SLIC) drive arrangement controllably adjusts DC biasing and overhead voltage characteristics for wireline pair that is optimized for each mode of operation of the SLIC. Respective tip and ring DC drive voltages supplied by tip and ring drive amplifiers are controlled so that the differential DC voltage across the wireline pair has a first constant value during on-hook mode, in which DC loop current may vary between zero and a first DC loop current threshold value associated with a transition from on-hook mode toward off-hook mode. During a transition between on-hook mode and off-hook mode, the tip and ring DC drive voltages are controlled so as to vary the differential DC drive voltage in proportion to monitored DC loop current. During off-hook mode, the differential DC voltage is set at a second fixed value. If an upper DC loop current threshold is reached during off-hook mode, the differential DC voltage is sharply reduced from its second constant value.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: December 7, 2004
    Assignee: Intersil Corporation
    Inventor: Leonel Ernesto Enriquez
  • Patent number: 6829353
    Abstract: A circuit arrangement prevents clipping of pulse metering (teletax) signals in a telephone line card channel that results from the differential impedance between a subscriber line interface circuit (SLIC) and the line at the frequency band of teletax signals. The circuit arrangement is configured to sense pulse metering signals through a delay circuit, which is coupled to a reflected signal cancellation circuit. The reflected signal cancellation circuit contains a transconductance amplifier circuit that generates a pair of complementary polarity output currents representative of the sensed teletax signal. One of these output currents is fed back to a programmed impedance element in the transmission channel path of the SLIC so as to effectively cancel the reflected teletax signal.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: December 7, 2004
    Assignee: Intersil Corporation
    Inventor: Leonel Ernesto Enriquez
  • Publication number: 20030169871
    Abstract: A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.
    Type: Application
    Filed: March 6, 2002
    Publication date: September 11, 2003
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood, Edward A. Berrios
  • Publication number: 20030169874
    Abstract: A subscriber line interface circuit contains a high voltage analog section, and a low voltage and digital signal processing section, that monitors and controls the high voltage analog section. The high voltage analog section includes a dual mode tip/ring amplifier unit coupled to a subscriber loop pair, and an input signal receiving unit, that conditions input voice and low voltage signaling and ringing signals from the mixed signal section. Attributes of and/or enhancements to the high voltage section are used to improve the operational performance of the subscriber line interface circuit, in particular, low noise, low power, wide-bandwidth and wide dynamic range characteristics.
    Type: Application
    Filed: June 25, 2002
    Publication date: September 11, 2003
    Applicant: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas L. Youngblood
  • Publication number: 20030169873
    Abstract: A mode-dependent, battery-coupling switch for a subscriber line interface circuit (SLIC) selectively adjusts its current requirements to provide optimal current handling capability irrespective of the mode of operation of the SLIC. Where current demands of the SLIC are relatively minimal (e.g., on-hook idle mode), the bias is set at a relatively small, default value. During high current demand, such as ringing and off-hook signaling, the bias is set at a relatively large value, to maintain a low voltage drop across the battery-coupling switch.
    Type: Application
    Filed: June 21, 2002
    Publication date: September 11, 2003
    Applicant: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood
  • Publication number: 20030165232
    Abstract: A voltage regulator circuit arrangement limits the DC voltage applied to a tip and ring amplifiers of a subscriber line interface circuit (SLIC), each of which has a first polarity input coupled to a first current flow path to which a DC input (battery) voltage is coupled. A first current source supplies a first current derived via a low pass filter path from that flowing through the first current flow path to a second polarity input node of the tip amplifier, while a second current source supplies a similarly low pass filter path-derived second current to a second polarity input node of the ring amplifier. A voltage regulator is coupled with the first current flow path and is operative to regulate the voltage at the first polarity inputs of the tip and ring amplifiers to a regulated voltage value Vreg, so that the magnitudes of the first and second currents are based upon the regulated voltage value Vreg.
    Type: Application
    Filed: March 4, 2002
    Publication date: September 4, 2003
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Leonel Ernesto Enriquez, Douglas Youngblood
  • Patent number: 6570431
    Abstract: An output current limiter circuit is effectively insensitive to variations in temperature. A first arm of each of an NPN and a PNP network has a first auxiliary resistor, the current through which is proportional to temperature, and compensates for the negative temperature coefficient of the base-emitter voltage of that arm's (NPN or PNP) transistor, as well as tracks the positive temperature variation in the Vbe-bias control resistor in the other arm of the network. The other arm includes a second additional resistor, the voltage across which is established by a (fixed) bandgap voltage device, that uses a current from which the current through the first arm of the network is derived.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: May 27, 2003
    Assignee: Intersil Americas Inc.
    Inventor: Leonel Ernesto Enriquez
  • Publication number: 20030068032
    Abstract: A fully differentially based analog interface is used to couple a (ringing) subscriber line interface circuit (SLIC) to a dynamic range-constrained circuit, such as a low voltage codec. In the receive direction, and for ringing signal generation, an operational amplifier has its inputs differentially coupled to first and second polarity signal input ports; the amplifier's output is coupled to a single ended node of the internal circuitry of the respective port. In the output signal direction for transmission, a single ended output node of the internal circuitry of the respective SLIC circuit function is coupled to each of a pair of opposite polarity buffer paths, terminated by differential polarity output ports.
    Type: Application
    Filed: October 5, 2001
    Publication date: April 10, 2003
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Leonel Ernesto Enriquez, Douglas L. Youngblood
  • Patent number: 6545540
    Abstract: A current mirror circuit incorporates a resistor-capacitor (RC) filter circuit in the base-coupling path of input and output current mirror transistors, to realize a highly integrated low pass filter current mirror architecture, that reduces implementation complexity, and complies with reduced power supply parameters of a subscriber line interface circuit. A filter resistor is connected in series between the bases of the input and output current mirror transistors. A filter capacitor is coupled between the base of the output transistor and the power supply rail. The effect of this low pass filter circuit is such that the output current is equal to the frequency content of the input current below the cut-off frequency as defined by the RC time constant of the filter.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: April 8, 2003
    Assignee: Intersil Americas Inc.
    Inventor: Leonel Ernesto Enriquez
  • Patent number: 6518832
    Abstract: To mitigate against base current errors in a current mirror circuit that has limited overhead voltage, a compensated current mirror circuit includes a complementary polarity base current error reduction and auxiliary turn-on circuit, that provides an overhead voltage that enjoys a base-emitter diode drop improvement over the overhead voltage of a conventional circuit. Due to the base current error-reduction transistor in the circuit path from the power supply rail to the input port, the overhead voltage is improved by a base-emitter diode drop larger than the overhead voltage of the conventional circuit. In addition, it further reduces base current error.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: February 11, 2003
    Assignee: Intersil Americas Inc.
    Inventor: Leonel Ernesto Enriquez
  • Patent number: RE42123
    Abstract: A subscriber line interface circuit has a battery-powered, high voltage analog section, that drives tip and ring lines of a subscriber loop, and a mixed signal (low voltage and digital signal processing) section, that monitors and controls the high voltage analog section. An input signal receiving unit of the high voltage analog section conditions input voice and low voltage signaling and ringing signals from the mixed signal section, for application to a dual mode, programmable gain, tip/ring amplifier coupled to the loop. A sense amplifier at the output of the tip/ring amplifier is through an auxiliary amplifier to an analog feedback monitor port for closing a loop to synthesize the circuit's output impedance.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: February 8, 2011
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Lawton Youngblood, Edward Berrios
  • Patent number: RE42237
    Abstract: A voltage regulator circuit arrangement limits the DC voltage applied to a tip and ring amplifiers of a subscriber line interface circuit (SLIC), each of which has a first polarity input coupled to a first current flow path to which a DC input (battery) voltage is coupled. A first current source supplies a first current derived via a low pass filter path from that flowing through the first current flow path to a second polarity input node of the tip amplifier, while a second current source supplies a similarly low pass filter path-derived second current to a second polarity input node of the ring amplifier. A voltage regulator is coupled with the first current flow path and is operative to regulate the voltage at the first polarity inputs of the tip and ring amplifiers to a regulated voltage value Vreg, so that the magnitudes of the first and second currents are based upon the regulated voltage value Vreg.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: March 22, 2011
    Assignee: Intersil Americas Inc.
    Inventors: Leonel Ernesto Enriquez, Douglas Lawton Youngblood