Abstract: To mitigate against base current errors in a current mirror circuit having a low overhead supply voltage, a complementary polarity base current error reduction and auxiliary turn-on circuit provides an overhead voltage that enjoys a base-emitter diode drop improvement over a conventional circuit. The emitter area of an input stage's input current mirror transistor is used as a normalizing factor, and each output stage contains additional current circuitry that compensates for geometry differences of current mirror transistors, minimizing power dissipation and crosstalk. Emitter areas of input stage transistors are defined in accordance with current compensation relationships between the transistor circuits of the output stages and the input stage.

Abstract: To mitigate against base current errors in a current mirror circuit having a low overhead supply voltage, a complementary polarity base current error reduction and auxiliary turn-on circuit provides an overhead voltage that enjoys a base-emitter diode drop improvement over a conventional circuit. The emitter area of an input stage's input current mirror transistor is used as a normalizing factor, and each output stage contains additional current circuitry that compensates for geometry differences of current mirror transistors, minimizing power dissipation and crosstalk. Emitter areas of input stage transistors are defined in accordance with current compensation relationships between the transistor circuits of the output stages and the input stage.

Abstract: To mitigate against base current errors in a current mirror circuit that has limited overhead voltage, a compensated current mirror circuit includes a complementary polarity base current error reduction and auxiliary turn-on circuit, that provides an overhead voltage that enjoys a base-emitter diode drop improvement over the overhead voltage of a conventional circuit. Due to the base current error-reduction transistor in the circuit path from the power supply rail to the input port, the overhead voltage is improved by a base-emitter diode drop larger than the overhead voltage of the conventional circuit. In addition, it further reduces base current error.

Abstract: An output current limiter circuit is effectively insensitive to variations in temperature. A first arm of each of an NPN and a PNP network has a first auxiliary resistor, the current through which is proportional to temperature, and compensates for the negative temperature coefficient of the base-emitter voltage of that arm's (NPN or PNP) transistor, as well as tracks the positive temperature variation in the Vbe-bias control resistor in the other arm of the network. The other arm includes a second additional resistor, the voltage across which is established by a (fixed) bandgap voltage device, that uses a current from which the current through the first arm of the network is derived.

Abstract: A capacitor multiplier/time constant circuit transforms (by approximately a scaling constant k) a relatively small valued capacitor to a much larger valued capacitor in circuit with a relatively small valued resistor. A first of a pair of terminals across which an impedance having a reactance component containing a desired value of capacitance is to be supplied is coupled through a first, relatively small valued resistor to the inverting input of a high input impedance operational amplifier, the output of which is fed back in common with its inverting input terminal. The first terminal is further coupled through a second resistor having a resistance that is a scaling constant multiple of the resistance of the relatively small valued reference resistor, to the non-inverting input of the operational amplifier and to one end of a small reference capacitor, a second end of which is coupled to the second terminal, and an AC (ground) node.

Abstract: A periodic waveform-based wireline measurement circuit derives a voltage that is very precisely proportional to the differential voltage across a wireline pair, and uses this voltage to modulate the width of a periodic waveform, such as one derived from a ringing signal. This periodic waveform can be interfaced in an asynchronous manner with digital processing components, such as a DSP codec, to provide for automatic compensation for the resistance of the phone line.

Abstract: A non-sampling cascaded current mode analog-to-digital converter is formed of cascaded threshold detector bit cells driven by a transconductance amplifier for substantially instantaneously propagated current mode operation. A front end stage receives an input voltage representative of the quantity to be digitized, and outputs a pair of currents to N−1 cascaded, identically configured threshold comparator-based bit cells, N being the number of bits of resolution of the converter. A bit cell resolves a digital bit and couples a pair of output currents to the next bit cell. The N−1th bit cell in the cascaded architecture is configured to provide both the next to least significant bit and the least significant bit.

Abstract: A precision loop voltage measurement circuit outputs a voltage proportional to the differential voltage across a telephone wireline pair. This voltage is coupled to a tip-ring sense rectifier circuit having complementary transistor pairs coupled through a sense resistor to a node, which provides a current as of a composite of the tip-ring voltage and transistor voltage drops within the tip-ring sense rectifier circuit. A differential current extraction circuit generates a first current proportional to the sum of the tip-ring voltage plus voltage drops in the tip-ring sense rectifier circuit, and a second current fractionally proportional to only the internal voltage drops in the tip-ring sense rectifier circuit. The scaled currents are combined in an output resistor to produce a single ended output proportional to tip-ring voltage.

Abstract: A transconductance amplifier-based, rectifier circuit architecture is configured to programmably provide normal or inverted, half-wave or full-wave rectification of a single ended or differentially derived input signal. The output current produced by commonly connected outputs of current mirror circuits of the transconductance amplifier's output stage from its power supply terminals is coupled through a first pair of opposite polarity rectifier elements to a first pair of rectifier terminals. The current mirrors include additional current mirror outputs coupled to auxiliary current mirror stages, whose outputs are coupled through a second pair of opposite polarity rectifier elements to a second pair of rectifier terminals. Respective ones of the first and second pairs of rectifier terminals are programmably coupled to ground or to a single ended input terminal of an output amplifier stage.

Abstract: A transconductance amplifier circuit, which may used in a subscriber line interface circuit, transforms a single ended input voltage into a precise, single ended output current, in a manner that is effectively independent of respective voltage supply rails, and which can be operated at a very low quiescent current. An operational amplifier is configured as a unity gain buffer whose output stage is coupled in circuit with first current flow paths of first and second current mirrors. A single ended output of the output stage serves as an input terminal and is coupled via a negative feedback path to a first, inverting input of the operational amplifier. Second current flow paths of the pair of current mirrors are coupled to an output port, which supplies an output current linearly proportional to the composite input voltage applied to the input terminal.

Abstract: A precision, low power operational amplifier employs a transconductance amplifier architecture to provide wide operational bandwidth at any closed looped gain, and maintain DC precision. A single ended output node/port, to which current paths of first and second current mirrors of the transconductance amplifier are coupled serves as a ‘non-inverting’ terminal. The first and second current mirrors include additional current mirror stages whose outputs are coupled to respective third and fourth auxiliary current mirrors. The outputs of the third and fourth current mirrors are coupled to an ‘inverting’ terminal. An output amplifier stage has its non-inverting input coupled to ground and its inverting input coupled to a feedback port. A gain-defining feedback resistor is coupled between the output and the feedback port of the output amplifier stage.

Abstract: A circuit generates a programmable output current in proportion to the ratio of a precision reference voltage and a programming resistor, such that internal parameters of the circuit are effectively independent of the programming resistor. A bandgap voltage device supplies a reference current proportional to temperature through the collector-emitter path of a reference transistor through a reference resistor. The reference resistor has the same geometry as the internal bandgap's resistor and has a value such that the sum of the base-emitter voltage drop across the reference transistor and the voltage across the reference resistor due to the precision current equals the bandgap voltage. The base of the reference transistor is coupled to the emitter of an output transistor and to a programming resistor.

Abstract: A transimpedance circuit adapted for use in a subscriber line interface circuit includes sense resistors installed in closed loop, negative feedback paths of respective sense amplifiers. Voltage drops across the sense resistors are applied to first and second differential coupling circuits for applying differential currents to complementary polarity inputs of an operational amplifier. The inputs of the amplifier are also coupled to a linearity compensator, that is configured to provide sufficient overhead voltages in the presence of worst case voltage swing conditions. The compensator has a differential amplifier configuration, that closes a negative feedback loop from the output of the amplifier and one of its inputs, relative to a reference voltage balancing path coupled to the amplifier's other (complementary) input.

Abstract: A compensation circuit for minimizing undesirable effects of parasitic components, such as a parasitic capacitance of a controlled electronic device (e.g., transistor) is coupled in parallel with the controlled electronic device in a manner that is effective to decrease the spurious AC signal-coupling of the parasitic component, such that the amplitude of the unwanted AC noise voltage across the load element is very significantly reduced, or effectively minimized. The parametric values of the transfer function of the electronic device in the by-pass compensation circuit are such as to attenuate the unwanted AC noise voltage across the load, by a factor that approximates the amplitude of the spurious signal, thereby effectively minimizing its unwanted contribution to the load voltage.

Abstract: A transimpedance circuit adapted for use in a subscriber line interface circuit includes sense resistors installed in closed loop, negative feedback paths of respective sense amplifiers. Voltage drops across the sense resistors are applied to first and second differential coupling circuits for applying differential currents to complementary polarity inputs of an operational amplifier. The inputs of the amplifier are also coupled to a linearity compensator, that is configured to provide sufficient overhead voltages in the presence of worst case voltage swing conditions. The compensator has a differential amplifier configuration, that closes a negative feedback loop from the output of the amplifier and one of its inputs, relative to a reference voltage balancing path coupled to the amplifier's other (complementary) input.

Abstract: A non-sampling cascaded current mode analog-to-digital converter is formed of cascaded threshold detector bit cells driven by a transconductance amplifier for substantially instantaneously propagated current mode operation. A front end stage receives an input voltage representative of the quantity to be digitized, and outputs a pair of currents to N−1 cascaded, identically configured threshold comparator-based bit cells, N being the number of bits of resolution of the converter. A bit cell resolves a digital bit and couples a pair of output currents to the next bit cell. The N−1th bit cell in the cascaded architecture is configured to provide both the next to least significant bit and the least significant bit.

Abstract: A precision, low power operational amplifier employs a transconductance amplifier architecture to provide wide operational bandwidth at any closed looped gain, and maintain DC precision. A single ended output node/port, to which current paths of first and second current mirrors of the transconductance amplifier are coupled serves as a ‘non-inverting’ terminal. The first and second current mirrors include additional current mirror stages whose outputs are coupled to respective third and fourth auxiliary current mirrors. The outputs of the third and fourth current mirrors are coupled to an ‘inverting’ terminal. An output amplifier stage has its non-inverting input coupled to ground and its inverting input coupled to a feedback port. A gain-defining feedback resistor is coupled between the output and the feedback port of the output amplifier stage.

Abstract: A transconductance amplifier-based, rectifier circuit architecture is configured to programmably provide normal or inverted, half-wave or full-wave rectification of a single ended or differentially derived input signal. The output current produced by commonly connected outputs of current mirror circuits of the transconductance amplifier's output stage from its power supply terminals is coupled through a first pair of opposite polarity rectifier elements to a first pair of rectifier terminals. The current mirrors include additional current mirror outputs coupled to auxiliary current mirror stages, whose outputs are coupled through a second pair of opposite polarity rectifier elements to a second pair of rectifier terminals. Respective ones of the first and second pairs of rectifier terminals are programmably coupled to ground or to a single ended input terminal of an output amplifier stage.

Abstract: A transimpedance circuit adapted for use in a subscriber line interface circuit includes sense resistors installed in closed loop, negative feedback paths of respective sense amplifiers. Voltage drops across the sense resistors are applied to first and second differential coupling circuits for applying differential currents to complementary polarity inputs of an operational amplifier. The inputs of the amplifier are also coupled to a linearity compensator, that is configured to provide sufficient overhead voltages in the presence of worst case voltage swing conditions. The compensator has a differential amplifier configuration, that closes a negative feedback loop from the output of the amplifier and one of its inputs, relative to a reference voltage balancing path coupled to the amplifier's other (complementary) input.

Abstract: FIG. 5b shows a first thin film resistor 14 formed by direct etching or lift off on a first dielectric layer 12 that covers an integrated circuit (not shown) in a silicon substrate 10. A patterned layer of photoresist covers a portion of the second thin film resistor material 30. The second thin film resistor material 30 is different from the first thin film resistor material 14. The exposed portion of the second thin film resistor material 30 is removed to leave first and second thin film resistors on the first dielectric layer 12.