Patents by Inventor Li Chen

Li Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129508
    Abstract: A reference block is determined from a plurality of candidate reference blocks for a current block in a current picture based on template matching (TM) costs of the plurality of candidate reference blocks. The TM costs indicate differences between a template of the current block and respective reference templates of the plurality of candidate reference blocks. Samples of the determined reference block are classified into a plurality of classes of samples. A partitioning pattern of the current block is derived based on the determined reference block from a predetermined plurality of partitioning patterns. The derived partitioning pattern indicates a plurality of partitions of the current block. Each of the plurality of classes of the samples of the determined reference block corresponds to a respective partition of the plurality of partitions of the current block. The current block is reconstructed based on the derived partitioning pattern of the current block.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Applicant: Tencent America LLC
    Inventors: Xin ZHAO, Guichun LI, Lien-Fei CHEN, Han GAO, Shan LIU
  • Publication number: 20240129506
    Abstract: A current block is partitioned into a first partition and a second partition. Template samples of the current block are split into a first template region adjacent to the first partition and a second template region adjacent to the second partition. A plurality of first candidate reference blocks is determined for the first partition. A plurality of second candidate reference blocks is determined for the second partition. At least one of the plurality of first candidate reference blocks and the plurality of second candidate reference blocks is reordered based on a size of the first template region of the template samples and a size of the second template region of the template samples. The current block is reconstructed based on a received index value and based on the reordered at least one of the plurality of first candidate reference blocks and the plurality of second candidate reference blocks.
    Type: Application
    Filed: August 31, 2023
    Publication date: April 18, 2024
    Applicant: Tencent America LLC
    Inventors: Lien-Fei CHEN, Guichun LI, Xin ZHAO, Shan LIU
  • Publication number: 20240129505
    Abstract: In some examples, an apparatus for video decoding includes receiving circuitry and processing circuitry. The processing circuitry receives coded information of a current block in a current picture from a coded video bitstream. The coded information includes a syntax element with a value indicative of a merge with motion vector difference (MMVD) mode being applied on the current block. The processing circuitry determines, in response to a motion vector predictor of a merge candidate being a bi-predictor, whether the merge candidate for the current block satisfies a requirement for applying a bi-prediction motion refinement. The processing circuitry can constrain the merge candidate for use in the MMVD mode when the merge candidate for the current block satisfies the requirement. Then, the processing circuitry reconstructs the current block in the MMVD mode with the merge candidate being constrained for use in the MMVD mode.
    Type: Application
    Filed: August 31, 2023
    Publication date: April 18, 2024
    Applicant: Tencent America LLC
    Inventors: Lien-Fei CHEN, Guichun LI, Xin ZHAO, Shan LIU
  • Publication number: 20240129454
    Abstract: Aspects of the disclosure include methods and apparatuses for video coding. One of the apparatuses includes processing circuitry that receives a coded video bitstream that includes a current picture with a block. The processing circuitry determines a prediction block of the block using one of an intra block copy (IBC) mode and an intra template matching (IntraTMP) mode. If boundary filtering is to be applied to the block, the processing circuitry applies the boundary filtering to a prediction sample located at a position (x?,y?) in the prediction block by determining a parameter W of the boundary filtering based on coded information of the block; determining weights used in the boundary filtering by right shifting the parameter W according to the position (x?,y?); and generating a filtered prediction sample based on a linear combination of reference samples and the prediction sample according to the determined weights.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 18, 2024
    Applicant: Tencent America LLC
    Inventors: Xin ZHAO, Guichun LI, Lien-Fei CHEN, Shan LIU
  • Publication number: 20240129479
    Abstract: A video bitstream is received. The video bitstream includes a current block comprising a plurality of subblocks and a template region of the current block comprising a plurality of template subblocks adjacent to at least one of a top side and a left side of the current block. A motion vector (MV) located in a center position of the current block is determined. The MV is determined based on at least one MV of the plurality of subblocks of the current block. A MV for each of the plurality of template subblocks is determined based on the MV located in the center position of the current block and a respective MV of a corresponding subblock of the plurality of subblocks that is adjacent to the respective template subblock. The current block is reconstructed based on the determined MVs for the plurality of template subblocks.
    Type: Application
    Filed: August 31, 2023
    Publication date: April 18, 2024
    Applicant: Tencent America LLC
    Inventors: Lien-Fei CHEN, Guichun LI, Xin ZHAO, Xiaozhong XU, Shan LIU
  • Patent number: 11962441
    Abstract: A multi-tap Differential Feedforward Equalizer (DFFE) configuration with both precursor and postcursor taps is provided. The DFFE has reduced noise and/or crosstalk characteristics when compared to a Feedforward Equalizer (FFE) since DFFE uses decision outputs of slicers as inputs to a finite impulse response (FIR) unlike FFE which uses actual analog signal inputs. The digital outputs of the tentative decision slicers are multiplied with tap coefficients to reduce noise. Further, since digital outputs are used as the multiplier inputs, the multipliers effectively work as adders which are less complex to implement. The decisions at the outputs of the tentative decision slicers are tentative and are used in a FIR filter to equalize the signal; the equalized signal may be provided as input to the next stage slicers. The bit-error-rate (BER) of the final stage decisions are lower or better than the BER of the previous stage tentative decisions.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chaitanya Palusa, Rob Abbott, Wei-Li Chen, Po-Hsiang Lan, Dirk Pfaff, Cheng-Hsiang Hsieh
  • Patent number: 11962860
    Abstract: The disclosed computer-implemented method may include systems for generating personalized avatar reactions during live video broadcasts. For example, the systems and methods described herein can access a social networking system user's profile to identify an avatar associated with the social networking system user. The systems and methods can generate an avatar reaction by modifying one or more features of the avatar based on a corresponding emoticon reaction. Once generated, the social networking system user can select the avatar reaction for addition to an ephemeral reaction stream associated with a live video broadcast. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: April 16, 2024
    Assignee: Meta Platforms Technologies, LLC
    Inventors: David Ray Chen, King Hao Chen, Gian Paolo Pile Cruz, Michael Groseclose, Aaron Sidney Kaufer, Caio Mendonca Yassoyama, Xiao Chen, Naga Ramesh Kamisetti, Jonathan Zhang, Jay Quin, Dong Li, Zachary Rude, Gregory Reiner, Anthony Samaha, Hwa Young Jung, Eman Ashour Zomrawy Mohammed, Michael Sheppard Horowitz, Abhishek Jain, Erik Weiss, Xianda Wei, James Matthew Ryburn, Mireille Gonthier
  • Patent number: 11958090
    Abstract: The present disclosure relates to an apparatus and a method for wafer cleaning. The apparatus can include a wafer holder configured to hold a wafer; a cleaning nozzle configured to dispense a cleaning fluid onto a first surface (e.g., front surface) of the wafer; and a cleaning brush configured to clean a second surface (e.g., back surface) of the wafer. Using the cleaning fluid, the cleaning brush can clean the second surface of the wafer with a scrubbing motion and ultrasonic vibration.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo Chen Chen, Sheng-Wei Wu, Yung-Li Tsai
  • Patent number: 11958730
    Abstract: A carrier vehicle includes a front frame and a rear frame conveniently attachable to and detachable from the front frame. The front frame includes a frame body, at least one battery structure installed along an inner front side wall of the frame body and a connecting rod wheel component at a transverse bottom of the frame body. The rear frame comprises an operating handle, a handle joint base, a hydraulic component having an oil cylinder, a bearing component and a driving assembly. A bottom end of the operating handle is rotatably connected to the handle joint base, which includes a joint fixing base and a microswitch. The bearing component includes a bearing bridge having bridge lugs detachably connected to ends thereof, and a middle part sleeved on the oil cylinder. The front frame and rear frame are transportable in a separated compact configuration, with later simple and fast assembly.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: April 16, 2024
    Assignee: ZHEJIANG E-P EQUIPMENT CO., LTD.
    Inventors: Hongpeng Xu, Li Chen, Yongxian Ke, Tao Huang, Guoxiang Yang
  • Patent number: 11963369
    Abstract: The present disclosure relates to an integrated circuit. The integrated circuit has a plurality of bit-line stacks disposed over a substrate and respectively including a plurality of bit-lines stacked onto one another. A data storage structure is over the plurality of bit-line stacks and a selector is over the data storage structure. A word-line is over the selector. The selector is configured to selectively allow current to pass between the plurality of bit-lines and the word-line. The plurality of bit-line stacks include a first bit-line stack, a second bit-line stack, and a third bit-line stack. The first and third bit-line stacks are closest bit-line stacks to opposing sides of the second bit-line stack. The second bit-line stack is separated from the first bit-line stack by a first distance and is further separated from the third bit-line stack by a second distance larger than the first distance.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Chao-Ching Cheng, Jung-Piao Chiu, Tzu-Chiang Chen, Yu-Sheng Chen
  • Patent number: 11959375
    Abstract: A method for evaluating a downhole working condition of a PDC bit includes: performing an indoor test, including performing a drilling test in different full-sized cores by using the PDC bit with different degrees of abrasion and balling under condition of given WOB and rotational speed, to acquire change characteristics of a WOB, a rotational speed, a torque, a ROP and a bit vibration of the PDC bit in different time domains; improving and perfecting an existing prediction model and evaluation method for the downhole working condition through data obtained by the test to obtain the method; reading parameters of the WOB, the rotational speed, the torque and the ROP in real time during drilling; determining the downhole working condition of the PDC bit by using the method in the improving and perfecting.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: April 16, 2024
    Assignee: CNPC Engineering Technology R&D Company Limited
    Inventors: Guodong Ji, Haige Wang, Meng Cui, Zhao Meng, Qiang Wu, Li Liu, Jiawei Zhang, Changchang Chen, Liu Cui, Jing Yu
  • Patent number: 11959655
    Abstract: Provided are an air-conditioning system, a data transmission method and apparatus, and a non-transitory computer storage medium. A centralized air-conditioning controller, at least one air conditioner, and at least one environmental information collection module are provided.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: April 16, 2024
    Assignees: QINGDAO HAIER AIR-CONDITIONING ELECTRONIC CO., LTD., QINGDAO HAIER SMART TECHNOLOGY R&D CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Wei Wei, Yongjun Zhao, Li Chen Zhang
  • Publication number: 20240121437
    Abstract: A video bitstream comprising a current picture of a video is received. A first group of samples and a second group of samples in the current picture are determined. A first geometric transform is determined for the first group of samples in the current picture and a second geometric transform is determined for the second group of samples in the current picture. The first geometric transform is configured to adjust an orientation of the first group of samples in the current picture. The second geometric transform is different from the first geometric transform and configured to adjust an orientation of the second group of samples in the current picture. The picture is reconstructed, where the first group of samples is reconstructed based on the determined first geometric transform and the second group of samples is reconstructed based on the determined second geometric transform.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Applicant: Tencent America LLC
    Inventors: Xin ZHAO, Guichun LI, Lien-Fei CHEN, Shan LIU
  • Publication number: 20240117085
    Abstract: The present invention relates to an ethylene polymer and a process for preparing the same, wherein the ethylene polymer has an average particle size of 50-3000 ?m, a bulk density of 0.28-0.55 g/cm3, a true density of 0.930-0.980 g/cm3, a melt index at a load of 2.16 Kg at 190° C. of 0.01-2500 g/10 min, a crystallinity of 30-90%, a melting point of 105-147° C., a comonomer molar insertion rate of 0.01-5 mol %, a weight-average molecular weight of 2×104 g/mol-40×104 g/mol, and a molecular weight distribution of 1.8-10. In the preparation process, raw materials containing ethylene, hydrogen gas and a comonomer are subjected to a tank-type slurry polymerization with an alkane solvent having a boiling point of 5-55° C. or a mixed alkane solvent having a saturated vapor pressure of 20-150 KPa at 20° C. as the polymerization solvent in the presence of a polyethylene catalytic system, at the molar ratio of hydrogen gas to ethylene of 0.01-20:1, preferably 0.
    Type: Application
    Filed: January 26, 2022
    Publication date: April 11, 2024
    Inventors: Chuanfeng LI, Wenrui WANG, Kun JING, Yuejun XING, Huimin XIA, Minghua CHEN, Zhonglin YOU, Shaohui CHEN, Jianhong ZHAI, Feng GUO, Liu YANG, Li MEI
  • Publication number: 20240117335
    Abstract: Provided are fusion proteins that include an apolipoprotein B mRNA editing enzyme catalytic subunit 3A (APOBEC3A) and a clustered regularly interspaced short palindromic repeats (CRISPR)-associated (Cas) protein, optionally further with uracil glycosylase inhibitor (UGI). Such a fusion protein is able to conduct base editing in DNA by deaminating cytosine to uracil, even when the cytosine is in a GpC context or is methylated.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 11, 2024
    Inventors: Jia CHEN, Li Yang, Xingxu Huang, Bei Yang, Xiao Wang, Jianan Li
  • Publication number: 20240115607
    Abstract: The technology described herein is directed to Natural Killer (NK) cell CAR polypeptides comprising intracellular signaling domains, intracellular costimulatory domains, and/or transmembrane domains from NK-associated polypeptides. In various aspects, described herein are polynucleotides, vectors, or cells expressing said NK CAR polypeptides, and pharmaceutical compositions comprising said NK CAR polypeptides, polynucleotides, vectors, or cells. Also described herein are methods of using said NK CAR polypeptides, for example to treat various diseases and disorders, such as cancer or infectious diseases.
    Type: Application
    Filed: January 25, 2022
    Publication date: April 11, 2024
    Applicant: CYTOCARES (SHANGHAI) INC.
    Inventors: Qiming XU, Li CHEN, Huaxing ZHU
  • Patent number: 11955317
    Abstract: A radio frequency (RF) match assembly for a chemical vapor deposition processing chamber. The assembly includes a top electrically insulating column and a bottom electrically insulating column. The assembly further includes a one-piece RF match strap that has a head, a main body and a body extension. The main body of the one-piece RF match strap is configured to extend through the top electrically insulating column and the bottom electrically insulating column. A flexible chamber lid strap connects the processing chamber to the top of the one piece RF match strap.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Sze Chen, Yu Li Wang, Yin-Tun Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
  • Patent number: 11953955
    Abstract: A fixing mechanism is applied to an interface card assembly and an electronic apparatus. The fixing mechanism includes a movable window and an operation component. The movable window is slidably disposed on a casing of the interface card assembly. The operation component has a fixed end and a free end opposite to each other. The fixed end is disposed on the movable window. The free end is detachably engaged with the casing to position the movable window. The movable window is positioned on one of a first region and a second region of the casing for respectively fixing interface cards with different sizes to the casing.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 9, 2024
    Assignee: Wiwynn Corporation
    Inventors: Wei-Li Huang, Wei-Hao Chen
  • Patent number: 11956743
    Abstract: This disclosure provides systems, methods, apparatus, and computer programs encoded on computer storage media, for relative timing drift correction for distributed multi-user transmissions. In one aspect, a first access point (AP) may receive a first signal from a second AP. The first signal may be associated with a channel sounding procedure to be performed substantially simultaneously by the second AP and the first AP. The first AP may then receive a second signal from the second AP, and prior to a substantially simultaneous transmission by the second AP and the first AP. The second signal may include timing information relative to the first signal. The first AP may determine a start time of the substantially simultaneous transmission at the first AP based on the timing information, and may initiate the substantially simultaneous transmission according to the determined start time.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Sameer Vermani, Bin Tian, Lin Yang, Jialing Li Chen
  • Patent number: 11955527
    Abstract: A method includes forming a first sacrificial layer over a substrate, and forming a sandwich structure over the first sacrificial layer. The sandwich structure includes a first isolation layer, a two-dimensional material over the first isolation layer, and a second isolation layer over the two-dimensional material. The method further includes forming a second sacrificial layer over the sandwich structure, forming a first source/drain region and a second source/drain region on opposing ends of, and contacting sidewalls of, the two-dimensional material, removing the first sacrificial layer and the second sacrificial layer to generate spaces, and forming a gate stack filling the spaces.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Ching Cheng, Yi-Tse Hung, Hung-Li Chiang, Tzu-Chiang Chen, Lain-Jong Li, Jin Cai